PR c/77323
	* c-decl.c (declspecs_add_type): Set typespec_word even when __intN
	or _FloatN or _FloatNx is not supported.
	(finish_declspecs): Set type to integer_type_node when _FloatN or
	_FloatNx is not supported.

	* gcc.dg/pr77323.c: New test.

From-SVN: r239752

From-SVN: r239751

2016-08-24  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/77358
	* resolve.c (resolve_fl_procedure): Use the correct gfc_charlen
	for deferred character length module procedures.

2016-08-24  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/77358
	* gfortran.dg/submodule_17.f08: New test.

From-SVN: r239740

2016-08-24  Michael Collison <michael.collison@linaro.org>
	    Michael Collison <michael.collison@arm.com>

	* config/arm/arm-modes.def: Add new condition code mode CC_V
	to represent the overflow bit.
	* config/arm/arm.c (maybe_get_arm_condition_code):
	Add support for CC_Vmode.
	(arm_gen_unlikely_cbranch): New function to generate common
	rtl conditional branches for overflow patterns.
	* config/arm/arm-protos.h: Add prototype for
	arm_gen_unlikely_cbranch.
	* config/arm/arm.md (addv<mode>4, add<mode>3_compareV,
	addsi3_compareV_upper): New patterns to support signed
	builtin overflow add operations.
	(uaddv<mode>4, add<mode>3_compareC, addsi3_compareV_upper):
	New patterns to support unsigned builtin add overflow operations.
	(subv<mode>4, sub<mode>3_compare1): New patterns to support signed
	builtin overflow subtract operations,
	(usubv<mode>4): New patterns to support unsigned builtin subtract
	overflow operations.
	(negvsi3, negvdi3, negdi2_compare, negsi2_carryin_compare): New patterns
	to support builtin overflow negate operations.
	* gcc.target/arm/builtin_saddl.c: New testcase.
	* gcc.target/arm/builtin_saddll.c: New testcase.
	* gcc.target/arm/builtin_uaddl.c: New testcase.
	* gcc.target/arm/builtin_uaddll.c: New testcase.
	* gcc.target/arm/builtin_ssubl.c: New testcase.
	* gcc.target/arm/builtin_ssubll.c: New testcase.
	* gcc.target/arm/builtin_usubl.c: New testcase.
	* gcc.target/arm/builtin_usubll.c: New testcase.


Co-Authored-By: Michael Collison <michael.collison@arm.com>

From-SVN: r239739

	PR target/77270
	* gcc.dg/tree-ssa/loop-28.c: Also compile on 32bit x86 targets.
	(dg-options): Use -march=amdfam10 instead of -march=athlon.
	* gcc.dg/tree-ssa/update-unroll-1.c: Ditto.
	* gcc.dg/tree-ssa/prefetch-3.c: Ditto.
	* gcc.dg/tree-ssa/prefetch-4.c: Ditto.
	* gcc.dg/tree-ssa/prefetch-5.c: Ditto.
	* gcc.dg/tree-ssa/prefetch-6.c: Ditto.  Do not require sse2
	effective target.  Remove scan-assembler-times directives.
	* gcc.dg/tree-ssa/prefetch-7.c: Ditto.
	* gcc.dg/tree-ssa/prefetch-8.c: Ditto.
	* gcc.dg/tree-ssa/prefetch-9.c: Ditto.

From-SVN: r239737

This patch caused a bootstrap failure on AIX.

2016-08-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	Revert
	2016-08-23  Dominik Vogt  <vogt@linux.vnet.ibm.com>

	* explow.c (get_dynamic_stack_size): Take known alignment of stack
	pointer + STACK_DYNAMIC_OFFSET into account when calculating the
	size needed.

From-SVN: r239735

2016-08-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    * doc/fragments.texi (MULTILIB_REUSE): Mention that only options in
    MULTILIB_OPTIONS should be used.  Small wording fixes.
    * genmultilib: Memorize set of all option combinations in
    combination_space.  Detect if RHS of MULTILIB_REUSE uses an option not
    found in MULTILIB_OPTIONS by checking if option set is listed in
    combination_space.  Output new and existing error message to stderr.

From-SVN: r239734

t-aprofile (MULTILIB_MATCHES): Add mapping for -mcpu=cortex-a7, -mfpu=neon-fp16, -mfpu=fpv5-d16 and -mfpu=fp-armv8.

2016-08-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping for
    -mcpu=cortex-a7, -mfpu=neon-fp16, -mfpu=fpv5-d16 and -mfpu=fp-armv8.
    Fix typo in -mfpu=vfpv3-d16-fp16 mapping.
    (MULTILIB_REUSE): Remove reuse rules for option set including
    -mfpu=fp-armv8 and -mfpu=vfpv4

From-SVN: r239733

gcc/testsuite/

2016-08-24  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>

        * gcc.c-torture/execute/pr71083.c: Use UINT32_TYPE instead
        of unsigned int.
        * gcc.dg/zero_sign_ext_test.c: Require int32plus.

From-SVN: r239732

2016-08-24  Aditya Kumar  <hiraditya@msn.com>

	* include/bits/algorithmfwd.h: Remove trailing whitespace.
	* include/bits/shared_ptr_base.h: Likewise.

From-SVN: r239731

re PR testsuite/77317 (x86_64 --target_board=''unix/ unix/-m32'' parallel testrun gives inconsistent results in gcc.dg/vect)

Fix PR testsuite/77317

gcc/testsuite/
	* lib/target-supports.exp
	(check_effective_target_vect_aligned_arrays): Don't cache the result.
	(check_effective_target_vect_natural_alignment): Ditto.
	(check_effective_target_vector_alignment_reachable): Ditto.
	(check_effective_target_vector_alignment_reachable_for_64bit): Ditto.

From-SVN: r239730

gcc/

	* config/arm/t-rtems: Add vfp multilib.

From-SVN: r239727

From-SVN: r239726

gcc/:
	* config/s390/s390.c (s390_asm_file_start): Call
	default_file_start.
gcc/testsuite/:
	* gcc.target/s390/nolrl-1.c: Don't match the file name.

From-SVN: r239713

rs6000.c (rs6000_expand_vector_init): Set initialization of all 0's to the 0 constant, instead of directly generating XOR.

[gcc]
2016-08-23  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_expand_vector_init): Set
	initialization of all 0's to the 0 constant, instead of directly
	generating XOR.  Add support for V4SImode vector initialization on
	64-bit systems with direct move, and rework the ISA 3.0 V4SImode
	initialization.  Change variables used in V4SFmode vector
	intialization.  For V4SFmode vector splat on ISA 3.0, make sure
	any memory addresses are in index form.  Add support for using
	VSPLTH/VSPLTB to initialize vector short and vector char vectors
	with all of the same element.
	(regno_or_subregno): New helper function to return a register
	number for either REG or SUBREG.
	(rs6000_adjust_vec_address): Do not generate ADDI <reg>,R0,<num>.
	Use regno_or_subregno where possible.
	(rs6000_split_v4si_init_di_reg): New helper function to build up a
	DImode value from two SImode values in order to generate V4SImode
	vector initialization on 64-bit systems with direct move.
	(rs6000_split_v4si_init): Split up the insns for a V4SImode vector
	initialization.
	(rtx_is_swappable_p): V4SImode vector initialization insn is not
	swappable.
	* config/rs6000/rs6000-protos.h (rs6000_split_v4si_init): Add
	declaration.
	* config/rs6000/vsx.md (VSX_SPLAT_I): New mode iterators and
	attributes to initialize V8HImode and V16QImode vectors with the
	same element.
	(VSX_SPLAT_COUNT): Likewise.
	(VSX_SPLAT_SUFFIX): Likewise.
	(UNSPEC_VSX_VEC_INIT): New unspec.
	(vsx_concat_v2sf): Eliminate using 'preferred' register classes.
	Allow SFmode values to come from Altivec registers.
	(vsx_init_v4si): New insn/split for V4SImode vector initialization
	on 64-bit systems with direct move.
	(vsx_splat_<mode>, VSX_W iterator): Rework V4SImode and V4SFmode
	vector initializations, to allow V4SImode vector initializations
	on 64-bit systems with direct move.
	(vsx_splat_v4si): Likewise.
	(vsx_splat_v4si_di): Likewise.
	(vsx_splat_v4sf): Likewise.
	(vsx_splat_v4sf_internal): Likewise.
	(vsx_xxspltw_<mode>, VSX_W iterator): Eliminate using 'preferred'
	register classes.
	(vsx_xxspltw_<mode>_direct, VSX_W iterator): Likewise.
	(vsx_vsplt<VSX_SPLAT_SUFFIX>_di): New insns to support
	initializing V8HImode and V16QImode vectors with the same
	element.
	* config/rs6000/rs6000.h (TARGET_DIRECT_MOVE_64BIT): Disallow
	optimization if -maltivec=be.

[gcc/testsuite]
2016-08-23  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/vec-init-1.c: Add tests where the vector is
	being created from pointers to memory locations.
	* gcc.target/powerpc/vec-init-2.c: Likewise.

From-SVN: r239712

libcpp/ChangeLog:
	* include/line-map.h (source_range::from_locations): New method.

From-SVN: r239711

2016-08-23  Christophe Lyon  <christophe.lyon@linaro.org>

	* config/arm/arm.md (arm_movqi_insn): Swap predicable_short_it
	attribute for alternatives 3 and 4.

From-SVN: r239710

2016-08-23  Fritz Reese  <fritzoreese@gmail.com>

	gcc/fortran/
	* decl.c (gfc_match_structure_decl): Make gfc_structure_id static.

	gcc/testsuite/gfortran.dg/
	* dec_structure_12.f90: New testcase.

From-SVN: r239709

    
    Switch to a new method for determining the order in which import init
    functions are invoked: build an init fcn dependence DAG and walk the DAG
    to rewrite/adjust priorities to account for discrepancies introduced by
    "go test".
    
    This patch includes a change to the export data format generated
    by gccgo. Older versions of gccgo will not be able to read object files
    produced by a newer gccgo, but the new gcc will still be able to read
    old object files.
    
    Fixes golang/go#15738.
    
    Reviewed-on: https://go-review.googlesource.com/25301

From-SVN: r239708

gcc/ChangeLog:
	* selftest.c (selftest::assert_str_contains): New function.
	(selftest::test_assertions): Verify ASSERT_STR_CONTAINS.
	* selftest.h (selftest::assert_str_contains): New decl.
	(ASSERT_STR_CONTAINS): New macro.

From-SVN: r239707

2016-08-23  Fritz Reese  <fritzoreese@gmail.com>

	gcc/fortran/
	* interface.c (compare_components): Fix typo in name check conditional.

From-SVN: r239706

	* include/debug/array (array): Add _GLIBCXX17_CONSTEXPR.
	* include/profile/array (array): Likewise.
	(array::swap): Fix exception specification for zero-sized arrays.

From-SVN: r239705

2016-08-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/77286
	* tree-vect-loop.c (vect_analyze_loop_form_1): Do not modify
	the CFG here.
	(vect_transform_loop): Split exit edges of loop and scalar
	loop if required and at the appropriate time.

From-SVN: r239700

	PR libstdc++/77334
	* include/bits/stl_tree.h (_Rb_tree::_M_move_assign): New functions.
	(_Rb_tree::operator=(_Rb_tree&&)): Dispatch to _M_move_assign.
	* testsuite/23_containers/map/77334.cc: New test.

From-SVN: r239698

	* doc/xml/manual/using.xml: Remove reference to -pthreads option.
	* doc/html/*: Regenerate.

From-SVN: r239693

	* testsuite/experimental/feat-cxx14.cc: Only preprocess, not compile.
	* testsuite/experimental/feat-lib-fund.cc: Likewise.

From-SVN: r239692

	PR libstdc++/71771
	* include/bits/stl_iterator.h
	(operator-(reverse_iterator<Iter>, reverse_iterator<Iter>): Only
	define for C++98 mode.
	(operator-(move_iterator<Iter>, move_iterator<Iter>): Don't define.
	* testsuite/24_iterators/headers/iterator/synopsis.cc: Use
	-std=gnu++98.
	* testsuite/24_iterators/headers/iterator/synopsis_c++11.cc: New test.
	* testsuite/24_iterators/headers/iterator/synopsis_c++14.cc: New test.
	* testsuite/24_iterators/headers/iterator/synopsis_c++17.cc: New test.
	* testsuite/24_iterators/move_iterator/greedy_ops.cc: Don't test
	difference operator.
	* testsuite/24_iterators/reverse_iterator/greedy_ops.cc: Only test
	difference operator for C++98.
	* testsuite/24_iterators/reverse_iterator/71771.cc: New test.

From-SVN: r239691

	* include/bits/c++config (_GLIBCXX17_CONSTEXPR): Define.
	* include/bits/range_access.h (begin, end, rbegin, rend, crbegin)
	(crend): Add _GLIBCXX17_CONSTEXPR as per P0031R0.
	* include/bits/stl_iterator.h (reverse_iterator, move_iterator)
	(__make_reverse_iterator, make_reverse_iterator, make_move_iterator):
	Likewise.
	* include/bits/stl_iterator_base_funcs.h (__distance, __advance): Add
	_GLIBCXX14_CONSTEXPR.
	(distance, advance, next, prev): Add _GLIBCXX17_CONSTEXPR.
	* include/std/array (array::begin, array::end, array::rbegin)
	(array::rend, array::cbegin, array:cend, array::crbegin)
	(array::crend, array::operator[], array::at, array::front)
	(array::back, array::data): Likewise.
	* testsuite/24_iterators/headers/iterator/range_access.cc: Replace
	with separate tests for C++11, C++14, and C++17.
	* testsuite/24_iterators/headers/iterator/range_access_c++11.cc: New.
	* testsuite/24_iterators/headers/iterator/range_access_c++14.cc: New.
	* testsuite/24_iterators/headers/iterator/range_access_c++17.cc: New.

From-SVN: r239690

* get_dynamic_stack_size is passed a SIZE of a data block (which is
  allocated elsewhere), the SIZE_ALIGN of the SIZE (i.e. the alignment
  of the underlying memory units (e.g. 32 bytes split into 4 times 8
  bytes = 64 bit alignment) and the REQUIRED_ALIGN of the data portion
  of the allocated memory.

* Assuming the function is called with SIZE = 2, SIZE_ALIGN = 8 and
  REQUIRED_ALIGN = 64 it first adds 7 bytes to SIZE -> 9.  This is
  what is needed to have two bytes 8-byte-aligned at some memory
  location without any known alignment.

* Finally round_push is called to round up SIZE to a multiple of the
  stack slot size.

The key to understanding this is that the function assumes that
STACK_DYNMAIC_OFFSET is completely unknown at the time its called
and therefore it does not make assumptions about the alignment of
STACKPOINTER + STACK_DYNMAIC_OFFSET.  The latest patch simply
hard-codes that SP + SDO is supposed to be aligned to at least
stack slot size (and does that in a very complicated way).  Since
there is no guarantee that this is the case on all targets, the
patch is broken.  It may miscalculate a SIZE that is too small in
some cases.

However, on many targets there is some guarantee about the
alignment of SP + SDO even if the actual value of SDO is unknown.
On s390x it's always 8-byte-aligned (stack slot size).  So the
right fix should be to add knowledge about the target's guaranteed
alignment of SP + SDO to the function.  I'm right now testing a
much simpler patch that uses
REGNO_POINTER_ALIGN(VIRTUAL_STACK_DYNAMIC_REGNUM) as the
alignment.


gcc/ChangeLog:

2016-08-23  Dominik Vogt  <vogt@linux.vnet.ibm.com>

	* explow.c (get_dynamic_stack_size): Take known alignment of stack
	pointer + STACK_DYNAMIC_OFFSET into account when calculating the
	size needed.  Correct a typo in a comment.

From-SVN: r239688

gcc/testsuite/ChangeLog:

2016-08-23  Dominik Vogt  <vogt@linux.vnet.ibm.com>

	* gcc.target/s390/insv-1.c: Fix test when running with -m31.

From-SVN: r239687

THe attached patch improves checking of teh results of the subtests
"a" and "f".  As they share the same "vone" instruction, the duplicate
scan-assembler-times was bogus.  Moved "f" to a separate function to
fix this.  Also double check that no extra "vgmf" instructions are
used.

gcc/testsuite/ChangeLog:

2016-08-23  Dominik Vogt  <vogt@linux.vnet.ibm.com>

	* gcc.target/s390/zvector/vec-genmask-1.c: Improve result
	verification.

From-SVN: r239686

Split ~b & a to (b & a) ^ a.  This is benefitial on z Systems since we
otherwise need a big -1 constant to be loaded for the ~b.
	
gcc/ChangeLog:

2016-08-23  Dominik Vogt  <vogt@linux.vnet.ibm.com>

	* config/s390/s390.md ("*andc_split"): New splitter for and with
	complement.

gcc/testsuite/ChangeLog:

2016-08-23  Dominik Vogt  <vogt@linux.vnet.ibm.com>

	* gcc.target/s390/md/andc-splitter-1.c: New test case.
	* gcc.target/s390/md/andc-splitter-2.c: Likewise.

From-SVN: r239685

2016-08-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/27336
	* tree-vrp.c (infer_value_range): Handle stmts that can throw
	by looking for a non-EH edge.
	(process_assert_insertions_for): Likewise.

	* c-c++-common/pr27336.c: New testcase.

From-SVN: r239684

2016-08-23  Richard Biener  <rguenther@suse.de>

	PR middle-end/77305
	* statistics.c (statistics_counter_event): Robustify against
	NULL current_pass.

From-SVN: r239683

	* config/i386/i386.c (processor_alias_table): Enable PTA_PRFCHW
	for targets amdfam10 and barcelona.

From-SVN: r239682

From-SVN: r239680

	PR c++/77321
	* c-common.c (warn_for_memset): Check type for null.

	* g++.dg/cpp1y/pr77321.C: New test.

From-SVN: r239676

    
    When lowering method expressions of the form "P.M" where
    P is a pointer type (e.g. "type P *T") make sure we examine
    the method set of P and not T during method lookup.
    
    Fixes golang/go#15722.
    
    Reviewed-on: https://go-review.googlesource.com/24843

From-SVN: r239675

	* regex_executor.h(_M_handle_repeat, _M_handle_subexpr_begin)
	(_M_handle_subexpr_end, _M_handle_line_begin_assertion)
	(_M_handle_line_end_assertion, _M_handle_word_boundary)
	(_M_handle_subexpr_lookahead, _M_handle_match)
	(_M_handle_backref, _M_handle_accept, _M_handle_alternative):
	Add separate function declarations.
	* regex_executor.tcc: Split _M_dfs() into multiple handler functions.

From-SVN: r239673

	* config/i386/i386.md (*zero_extendsidi2): Add (*r,*k) alternative.
	(zero_extend<mode>di2): Ditto.
	(*zero_extend<mode>si2): Ditto.
	(*zero_extendqihi2): Ditto.

From-SVN: r239672