re PR fortran/58007 ([OOP] ICE in free_pi_tree(): Unresolved fixup - resolve_fixups does not fixup component of __class_bsr_Bsr_matrix)

fortran/
        PR fortran/58007
        * module.c (MOD_VERSION): Bump.
        (fp2, find_pointer2): Remove.
        (mio_component_ref): Don't forcedfully set the containing derived type
        symbol for loading.  Remove unused argument.
        (mio_ref): Update caller
        (mio_symbol): Dump component list earlier.
        (skip_list): New argument nest_level.  Initialize level with the new
        argument.
        (read_module): Add forced pointer components association for derived
        type symbols.

testsuite/
        PR fortran/58007
        * gfortran.dg/unresolved_fixup_1.f90: New test.
        * gfortran.dg/unresolved_fixup_2.f90: New test.

From-SVN: r206759

	PR bootstrap/59580
	PR bootstrap/59583
	* config.gcc (x86_archs): New variable.
	(x86_64_archs): Likewise.
	(x86_cpus): Likewise.
	Use $x86_archs, $x86_64_archs and $x86_cpus to check valid
	--with-arch/--with-cpu= options.
	Support --with-arch=/--with-cpu={nehalem,westmere,
	sandybridge,ivybridge,haswell,broadwell,bonnell,silvermont}.

From-SVN: r206756

	* config/i386/i386.c (ix86_adjust_cost): Reorder PROCESSOR_K8
	and PROCESSOR_ATHLON to simplify code.  Move "memory" calculation.

	* config/i386/i386.md (*swap<mode>): Rename from swap<mode>.

From-SVN: r206753

	PR target/58944
	* config/i386/i386-c.c (ix86_pragma_target_parse): Temporarily
	clear cpp_get_options (parse_in)->warn_unused_macros for
	ix86_target_macros_internal with cpp_define.

	* gcc.target/i386/pr58944.c: Drop -march=native from dg-options.
	Remove dg-prune-output lines.

From-SVN: r206750

gcc/
	* jump.c (delete_related_insns): Keep (use (insn))s.
	* reorg.c (redundant_insn): Check for barriers too.

From-SVN: r206749

	* config/i386/i386.c (ix86_split_lea_for_addr): Fix a comment
	typo.

From-SVN: r206745

pa.c (pa_attr_length_indirect_call): Don't output a short call to $$dyncall when TARGET_LONG_CALLS is true.

	* config/pa/pa.c (pa_attr_length_indirect_call): Don't output a short
	call to $$dyncall when TARGET_LONG_CALLS is true.

From-SVN: r206742

From-SVN: r206741

	PR go/59866
runtime: Force work variable in mgc0 to be aligned on 8-byte boundary.

From-SVN: r206738

       * ree.c (combine_set_extension): Temporarily disable test for
        changing number of hard registers.

From-SVN: r206735

	PR middle-end/58125
	* ipa-inline-analysis.c (inline_free_summary):
	Do not free summary of aliases.

From-SVN: r206734

2014-01-17  François Dumont  <fdumont@gcc.gnu.org>

	* include/profile/set.h (set): Implement C++11 allocator-aware
	container requirements.
	* include/profile/map.h (map): Likewise.
	* include/profile/multiset.h (multiset): Likewise.
	* include/profile/multimap.h (multimap): Likewise.
	* include/profile/set.h
	(set::operator=(const set&)): Define as default in C++11 mode.
	(set::operator=(set&&)): Likewise.
	* include/profile/map.h
	(map::operator=(const map&)): Likewise.
	(map::operator=(map&&)): Likewise.
	* include/profile/multiset.h
	(multiset::operator=(const multiset&)): Likewise.
	(multiset::operator=(multiset&&)): Likewise.
	* include/profile/multimap.h
	(multimap::operator=(const multimap&)): Likewise.
	(multimap::operator=(multimap&&)): Likewise.
	* include/profile/set.h (set::operator=(std::initializer_list<>)):
	Rely on the same operator from normal mode.
	* include/profile/map.h (map::operator=(std::initializer_list<>)):
	Likewise.
	* include/profile/multiset.h
	(multiset::operator=(std::initializer_list<>)): Likewise.
	* include/profile/multimap.h
	(multimap::operator=(std::initializer_list<>)): Likewise.
	* include/profile/set.h (set::swap(set&)): Add noexcept
	specification.
	* include/profile/map.h (map::swap(map&)): Likewise.
	* include/profile/multiset.h (multiset::swap(multiset&)): Likewise.
	* include/profile/multimap.h (multimap::swap(multimap&)): Likewise.

From-SVN: r206733

	PR middle-end/59706
	* gimplify.c (gimplify_expr): Use create_tmp_var
	instead of create_tmp_var_raw.  If cond doesn't have
	integral type, don't add the IFN_ANNOTATE builtin at all.

	* gfortran.dg/pr59706.f90: New test.
	* g++.dg/ext/pr59706.C: New test.

From-SVN: r206732

/cp
2014-01-17  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/59270
	PR c++/58811
	* init.c (build_value_init_noctor): Don't pass error_mark_node to
	build_value_init.

/testsuite
2014-01-17  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/59270
	PR c++/58811
	* g++.dg/cpp0x/decltype-incomplete1.C: New.
	* g++.dg/init/pr58811.C: Likewise.

From-SVN: r206731

2014-01-17  Martin Jambor  <mjambor@suse.cz>

	PR ipa/59736
	* ipa-cp.c (prev_edge_clone): New variable.
	(grow_next_edge_clone_vector): Renamed to grow_edge_clone_vectors.
	Also resize prev_edge_clone vector.
	(ipcp_edge_duplication_hook): Also update prev_edge_clone.
	(ipcp_edge_removal_hook): New function.
	(ipcp_driver): Register ipcp_edge_removal_hook.

From-SVN: r206729

2014-01-17  Andrew Pinski <apinski@cavium.com>
	    Steve Ellcey  <sellcey@mips.com>

	PR target/59462
	* config/mips/mips.c (mips_print_operand): Check operand mode instead
	of operator mode.

Co-Authored-By: Steve Ellcey <sellcey@mips.com>

From-SVN: r206724

re PR middle-end/57904 (Bogus(?) "invokes undefined behavior" warning with Fortran's finalization wrapper (gfortran.dg/class_48.f90))

	PR middle-end/57904
	* passes.def: Reorder pass_copy_prop, pass_unrolli, pass_ccp sequence
	so that pass_ccp runs first.

        PR middle-end/57904
	* gfortran.dg/pr57904.f90: New test.

From-SVN: r206723

	* config/i386/i386.c (ix86_lea_outperforms): Use TARGET_XXX.
	(ix86_adjust_cost): Use !TARGET_XXX.
	(do_reorder_for_imul): Likewise.
	(swap_top_of_ready_list): Likewise.
	(ix86_sched_reorder): Likewise.

From-SVN: r206720

From-SVN: r206719

/cp
2014-01-17  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/59269
	* init.c (build_value_init_noctor): Assert !TYPE_HAS_COMPLEX_DFLT
	only when errorcount == 0.

/testsuite
2014-01-17  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/59269
	* g++.dg/cpp0x/nsdmi-union4.C: New.

From-SVN: r206718

ix86_split_lea_for_addr transforms a single LEA instruction into a
series of MOV and ADD instructions.  For

lea 0x400(%edx, %ecx, 8), %edx

we get

mov %ecx, %edx
add %ecx, %edx
add %ecx, %edx
add %ecx, %edx
add %ecx, %edx
add %ecx, %edx
add %ecx, %edx
add %ecx, %edx
add $0x400, %edx

For -mtune=intel, we want to turn on X86_TUNE_OPT_AGU, but avoid
ix86_split_lea_for_addr to optimize for both Haswell and Silvermont.
This patch adds X86_TUNE_AVOID_LEA_FOR_ADDR and PROCESSOR_INTEL.
We keep PROCESSOR_INTEL the same as PROCESSOR_SILVERMONT, except that
X86_TUNE_AVOID_LEA_FOR_ADDR isn't turned on for PROCESSOR_INTEL.

	* config/i386/i386-c.c (ix86_target_macros_internal): Handle
	PROCESSOR_INTEL.  Treat like PROCESSOR_GENERIC.
	* config/i386/i386.c (intel_memcpy): New.  Duplicate slm_memcpy.
	(intel_memset): New.  Duplicate slm_memset.
	(intel_cost): New.  Duplicate slm_cost.
	(m_INTEL): New macro.
	(processor_target_table): Add "intel".
	(ix86_option_override_internal): Replace PROCESSOR_SILVERMONT
	with PROCESSOR_INTEL for "intel".
	(ix86_lea_outperforms): Support PROCESSOR_INTEL.  Duplicate
	PROCESSOR_SILVERMONT.
	(ix86_avoid_lea_for_addr): Check TARGET_AVOID_LEA_FOR_ADDR
	instead of TARGET_OPT_AGU.
	(ix86_issue_rate): Likewise.
	(ix86_adjust_cost): Likewise.
	(ia32_multipass_dfa_lookahead): Likewise.
	(swap_top_of_ready_list): Likewise.
	(ix86_sched_reorder): Likewise.
	* config/i386/i386.h (TARGET_INTEL): New.
	(TARGET_AVOID_LEA_FOR_ADDR): Likewise.
	(processor_type): Add PROCESSOR_INTEL.
	* config/i386/x86-tune.def: Support m_INTEL. Duplicate
	m_SILVERMONT.  Add X86_TUNE_AVOID_LEA_FOR_ADDR.

From-SVN: r206717

	PR c++/59838
cp/
	* cvt.c (ocp_convert): Don't segfault on non-existing
	ENUM_UNDERLYING_TYPE.
testsuite/
	* g++.dg/diagnostic/pr59838.C: New test.

From-SVN: r206716

re PR c/58346 (ICE with SIGFPE at -O1 and above on x86_64-linux-gnu (affecting trunk, 4.8, 4.7, and 4.6))

	PR c/58346
	* gimple-fold.c (fold_array_ctor_reference): Don't fold if element
	size is zero.
testsuite/
	* gcc.dg/pr58346.c: New test.

From-SVN: r206715

2014-01-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/46590
	* opts.c (default_options_table): Add entries for
	OPT_fbranch_count_reg, OPT_fmove_loop_invariants and OPT_ftree_pta,
	all enabled at -O1 but not for -Og.
	* common.opt (fbranch-count-reg): Remove Init(1).
	(fmove-loop-invariants): Likewise.
	(ftree-pta): Likewise.

From-SVN: r206714

i386.c (ix86_data_alignment): For compatibility with (incorrect) GCC 4.8 and earlier alignment assumptions...

	* config/i386/i386.c (ix86_data_alignment): For compatibility with
	(incorrect) GCC 4.8 and earlier alignment assumptions ensure we align
	decls to at least the GCC 4.8 used alignments.

From-SVN: r206713

re PR testsuite/58776 (gcc.dg/tree-ssa/gen-vect-32.c scan-tree-dump-times vect "vectorized 1 loops" 1)

	PR testsuite/58776
	* gcc.dg/tree-ssa-gen-vect-32.c: Add -fno-vect-cost-model to
	dg-options, use dg-additional-options for i?86/x86_64 to avoid
	option duplication.

From-SVN: r206712

	PR fortran/59440
	* tree-nested.c (convert_nonlocal_reference_stmt,
	convert_local_reference_stmt): For NAMELIST_DECLs in gimple_bind_vars
	of GIMPLE_BIND stmts, adjust associated decls.

	* gfortran.dg/pr59440-1.f90: New test.
	* gfortran.dg/pr59440-2.f90: New test.
	* gfortran.dg/pr59440-3.f90: New test.

From-SVN: r206711

	PR testsuite/59064
	* gcc.dg/vect/vect-ivdep-1.c: Replace two dg-bogus lines separately
	testing for " version" and " alias" with one testing for
	" version\[^\n\r]* alias".
	* gcc.dg/vect/vect-ivdep-2.c: Likewise.
	* gfortran.dg/vect/vect-do-concurrent-1.f90: Likewise.
	* g++.dg/vect/pr33426-ivdep.cc: Likewise.
	* g++.dg/vect/pr33426-ivdep-2.cc: Likewise.
	* g++.dg/vect/pr33426-ivdep-3.cc: Likewise.
	* g++.dg/vect/pr33426-ivdep-4.cc: Adjust comments similarly.

From-SVN: r206710

2014-01-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/46590
	* vec.h (vec<>::bseach): New member function implementing
	binary search according to C89 bsearch.
	(vec<>::qsort): Avoid calling ::qsort for vectors with sizes 0 or 1.
	* tree-ssa-loop-im.c (struct mem_ref): Make stored member a
	bitmap pointer again.  Make accesses_in_loop a flat array.
	(mem_ref_obstack): New global.
	(outermost_indep_loop): Adjust for mem_ref->stored changes.
	(mark_ref_stored): Likewise.
	(ref_indep_loop_p_2): Likewise.
	(set_ref_stored_in_loop): New helper function.
	(mem_ref_alloc): Allocate mem_refs on the mem_ref_obstack obstack.
	(memref_free): Adjust.
	(record_mem_ref_loc): Simplify.
	(gather_mem_refs_stmt): Adjust.
	(sort_locs_in_loop_postorder_cmp): New function.
	(analyze_memory_references): Sort accesses_in_loop after
	loop postorder number.
	(find_ref_loc_in_loop_cmp): New function.
	(for_all_locs_in_loop): Find relevant cluster of locs in
	accesses_in_loop and iterate without recursion.
	(execute_sm): Avoid uninit warning.
	(struct ref_always_accessed): Simplify.
	(ref_always_accessed::operator ()): Likewise.
	(ref_always_accessed_p): Likewise.
	(tree_ssa_lim_initialize): Initialize mem_ref_obstack, compute
	loop postorder numbers here.
	(tree_ssa_lim_finalize): Free mem_ref_obstack and loop postorder
	numbers.

From-SVN: r206709

	PR c++/57945
	* passes.c (rest_of_decl_compilation): Don't call varpool_finalize_decl
	on decls for which assemble_alias has been called.

	* c-c++-common/torture/pr57945.c: New test.

From-SVN: r206708

	* config/msp430/msp430.opt: (mcpu): New option.
	* config/msp430/msp430.c (msp430_mcu_name): Use target_mcu.
	(msp430_option_override): Parse target_cpu.  If the MCU name
	matches a generic string, clear target_mcu.
	(msp430_attr): Allow numeric interrupt values up to 63.
	(msp430_expand_epilogue): No longer invert operand 1 of gen_popm.
	* config/msp430/msp430.h (ASM_SPEC): Convert -mcpu into a -mmcu
	option.
	* config/msp430/t-msp430: (MULTILIB_MATCHES): Remove mcu matches.
	Add mcpu matches.
	* config/msp430/msp430.md (popm): Use %J rather than %I.
	(addsi3): Use msp430_nonimmediate_operand for operand 2.
	(addhi_cy_i): Use immediate_operand for operand 2.
	* doc/invoke.texi: Document -mcpu option.

From-SVN: r206705

2014-01-17  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/38518
	* df.h (df_analyze_loop): Declare.
	* df-core.c: Include cfgloop.h.
	(df_analyze_1): Split out main part of df_analyze.
	(df_analyze): Adjust.
	(loop_inverted_post_order_compute): New function.
	(loop_post_order_compute): Likewise.
	(df_analyze_loop): New function avoiding whole-function
	postorder computes.
	* loop-invariant.c (find_defs): Use df_analyze_loop.
	(find_invariants): Adjust.
	* loop-iv.c (iv_analysis_loop_init): Use df_analyze_loop.

From-SVN: r206702

From-SVN: r206700

ChangeLog:
2014-01-17  Zhenqiang Chen  <zhenqiang.chen@arm.com>

	* config/arm/arm.c (arm_v7m_tune): Set max_insns_skipped to 2.
	(thumb2_final_prescan_insn): Set max to MAX_INSN_PER_IT_BLOCK.

testsuite/ChangeLog:
2014-01-17  Zhenqiang Chen  <zhenqiang.chen@arm.com>

	* gcc.target/arm/its.c: New test.

From-SVN: r206698

       * ipa-ref.c (ipa_remove_stmt_references): Fix references
       traversal when removing references.

From-SVN: r206697

	* go-gcc.cc (Gcc_backend::conditional_expression): Add btype
	parameter.
	(operator_to_tree_code): New static function.
	(Gcc_backend::binary_expression): New function.

From-SVN: r206696

	PR ipa/59775
	* tree.c (get_binfo_at_offset): Look harder for virtual bases.

From-SVN: r206694

From-SVN: r206693

2014-01-17  Tim Shen  <timshen91@gmail.com>

	* include/bits/regex_automaton.tcc (_StateSeq<>::_M_clone()): Do not
	use std::map.
	* include/bits/regex_automaton.h: Do not use std::set.
	* include/bits/regex_compiler.h (_BracketMatcher<>::_M_add_char(),
	_BracketMatcher<>::_M_add_collating_element(),
	_BracketMatcher<>::_M_add_equivalence_class(),
	_BracketMatcher<>::_M_make_range()): Likewise.
	* include/bits/regex_compiler.tcc (_BracketMatcher<>::_M_apply()):
	Likewise.
	* include/bits/regex_executor.h: Do not use std::queue.
	* include/bits/regex_executor.tcc (_Executor<>::_M_main(),
	_Executor<>::_M_dfs()): Likewise.
	* include/std/regex: Remove <map>, <set> and <queue>.

2014-01-17  Tim Shen  <timshen91@gmail.com>

	* include/bits/regex.h (__compile_nfa<>(), basic_regex<>::basic_regex(),
	basic_regex<>::assign()): Change __compile_nfa to accept
	const _CharT* only.
	* include/bits/regex_compiler.h: Change _Compiler's template
	argument from <_FwdIter, _TraitsT> to <_TraitsT>.
	* include/bits/regex_compiler.tcc: Likewise.

2014-01-17  Tim Shen  <timshen91@gmail.com>

	* include/bits/regex_compiler.h: Change _ScannerT into char-type
	templated.
	* include/bits/regex_scanner.h (_Scanner<>::_Scanner()): Separate
	_ScannerBase from _Scanner; Change _Scanner's template argument from
	_FwdIter to _CharT. Avoid use of std::map and std::set by using arrays
	instead.
	* include/bits/regex_scanner.tcc (_Scanner<>::_Scanner(),
	_Scanner<>::_M_scan_normal(), _Scanner<>::_M_eat_escape_ecma(),
	_Scanner<>::_M_eat_escape_posix(), _Scanner<>::_M_eat_escape_awk()):
	Likewise.
	* include/std/regex: Add <cstring> for using strchr.

2014-01-17  Tim Shen  <timshen91@gmail.com>

	* bits/regex_automaton.tcc: Indentation fix.
	* bits/regex_compiler.h (__compile_nfa<>(), _Compiler<>,
	_RegexTranslator<> _AnyMatcher<>, _CharMatcher<>,
	_BracketMatcher<>): Add bool option template parameters and
	specializations to make matching more efficient and space saving.
	* bits/regex_compiler.tcc: Likewise.

From-SVN: r206690

        PR middle-end/56791
        * reload.c (find_reloads_address_1): Do not use RELOAD_OTHER
        * when
        pushing a reload for an autoinc when we had previously reloaded an
        inner part of the address.

From-SVN: r206688