1. 15 Mar, 2014 8 commits
    • Baseline symbols for m68k · dcf39d82
      * config/abi/post/m68k-linux-gnu/baseline_symbols.txt: New file.
      
      From-SVN: r208594
      Andreas Schwab committed
    • regex.h: Add/modify comments. · ee54a3b3
      2014-03-15  Tim Shen  <timshen91@gmail.com>
      
      	* include/bits/regex.h: Add/modify comments.
      	* include/bits/regex_compiler.h: Likewise.
      	* include/bits/regex_executor.h: Likewise.
      	* include/bits/regex_executor.tcc: Likewise.
      	* include/bits/regex_scanner.h: Likewise.
      
      From-SVN: r208593
      Tim Shen committed
    • re PR fortran/58324 (Bogus END-of-line error with list-directed I/O of file… · f1182dd2
      re PR fortran/58324 (Bogus END-of-line error with list-directed I/O of file without trailing sequential record marker)
      
      2014-03-15  Jerry DeLisle  <jvdelisle@gcc.gnu>
      
      	PR libfortran/58324
      	* gfortran.dg/list_read_12.f90: New test.
      
      From-SVN: r208592
      Jerry DeLisle committed
    • re PR fortran/58324 (Bogus END-of-line error with list-directed I/O of file… · e9471044
      re PR fortran/58324 (Bogus END-of-line error with list-directed I/O of file without trailing sequential record marker)
      
      2014-03-15  Jerry DeLisle  <jvdelisle@gcc.gnu>
      
      	PR libfortran/58324
      	* io/list_read.c (finish_list_read): Read one character to check
      	for the end of the file.  If it is the end, then issue the file
      	end error message.  If not, use eat_line to reach the end
      	without giving error.  The next attempt to read will then
      	issue the error as described above.
      
      From-SVN: r208591
      Jerry DeLisle committed
    • re PR fortran/55207 ([F08] Variables declared in the main program should… · 68a23044
      re PR fortran/55207 ([F08] Variables declared in the main program should implicitly get the SAVE attribute)
      
      2014-03-15  Janus Weil  <janus@gcc.gnu.org>
      
      	PR fortran/55207
      	* decl.c (match_attr_spec): Variables in the main program implicitly
      	get the SAVE attribute in Fortran 2008.
      
      
      2014-03-15  Janus Weil  <janus@gcc.gnu.org>
      
      	PR fortran/55207
      	* gfortran.dg/assumed_rank_7.f90: Explicitly deallocate variables.
      	* gfortran.dg/c_ptr_tests_16.f90: Put into subroutine.
      	* gfortran.dg/inline_sum_bounds_check_1.f90: Add
      	-Wno-aggressive-loop-optimizations and remove an unused variable.
      	* gfortran.dg/intent_optimize_1.f90: Put into subroutine.
      	* gfortran.dg/pointer_init_9.f90: New.
      	* gfortran.dg/volatile4.f90: Put into subroutine.
      	* gfortran.dg/volatile6.f90: Ditto.
      
      From-SVN: r208590
      Janus Weil committed
    • re PR target/60525 (ICE: in final_scan_insn, at final.c:2952) · cfce90ac
      PR target/60525
      
      	* config/i386/i386.md (floathi<X87MODEF>2): Delete expander; rename
      	define_insn from *floathi<X87MODEF>2_i387; allow nonimmediate_operand.
      	(*floathi<X87MODEF>2_i387_with_temp): Remove.
      	(floathi splitters): Remove.
      	(float<SWI48x>xf2): New pattern.
      	(float<SWI48><MODEF>2): Rename from float<SWI48x><X87MODEF>2.  Drop
      	code that tried to handle DImode for 32-bit, but which was excluded
      	by the pattern's condition.  Drop allocation of stack temporary.
      	(*floatsi<MODEF>2_vector_mixed_with_temp): Remove.
      	(*float<SWI48><MODEF>2_mixed_with_temp): Remove.
      	(*float<SWI48><MODEF>2_mixed_interunit): Remove.
      	(*float<SWI48><MODEF>2_mixed_nointerunit): Remove.
      	(*floatsi<MODEF>2_vector_sse_with_temp): Remove.
      	(*float<SWI48><MODEF>2_sse_with_temp): Remove.
      	(*float<SWI48><MODEF>2_sse_interunit): Remove.
      	(*float<SWI48><MODEF>2_sse_nointerunit): Remove.
      	(*float<SWI48x><X87MODEF>2_i387_with_temp): Remove.
      	(*float<SWI48x><X87MODEF>2_i387): Remove.
      	(all float _with_temp splitters): Remove.
      	(*float<SWI48x><MODEF>2_i387): New pattern.
      	(*float<SWI48><MODEF>2_sse): New pattern.
      	(float TARGET_USE_VECTOR_CONVERTS splitters): Merge them.
      	(float TARGET_SSE_PARTIAL_REG_DEPENDENCY splitters): Merge them.
      
      From-SVN: r208587
      Richard Henderson committed
    • re PR c++/60532 (r208573 causes Firefox build failure) · 47b5d284
      	PR c++/60532
      	PR c++/58678
      	* search.c (get_pure_virtuals): Handle abstract dtor here.
      	(dfs_get_pure_virtuals): Not here.
      
      From-SVN: r208586
      Jason Merrill committed
    • Daily bump. · 265a9ea7
      From-SVN: r208585
      GCC Administrator committed
  2. 14 Mar, 2014 12 commits
  3. 13 Mar, 2014 20 commits
    • * regex.c (bzero) [!_LIBC]: Cast the call to memcpy to (void). · dd19cdda
      From-SVN: r208558
      Uros Bizjak committed
    • re PR middle-end/36282 (Spurious warning "asm declaration ignored due to… · 39a1ebb3
      re PR middle-end/36282 (Spurious warning "asm declaration ignored due to conflict with previous rename")
      
      	PR middle-end/36282
      	* c-pragma.c (apply_pragma_weak): Only look at
      	TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl)) if
      	DECL_ASSEMBLER_NAME_SET_P (decl).
      	(maybe_apply_pending_pragma_weaks): Exit early if
      	vec_safe_is_empty (pending_weaks) rather than only when
      	!pending_weaks.
      	(maybe_apply_pragma_weak): Likewise.  If !DECL_ASSEMBLER_NAME_SET_P,
      	set assembler name back to NULL afterwards.
      
      	* c-c++-common/pr36282-1.c: New test.
      	* c-c++-common/pr36282-2.c: New test.
      	* c-c++-common/pr36282-3.c: New test.
      	* c-c++-common/pr36282-4.c: New test.
      
      From-SVN: r208557
      Jakub Jelinek committed
    • re PR debug/60438 (dwarf2cfi :2239 still assert,not the same cause as PR 59575) · 3386d77e
      PR debug/60438
      
              * config/i386/i386.c (ix86_split_fp_branch): Remove pushed argument.
              (ix86_force_to_memory, ix86_free_from_memory): Remove.
              * config/i386/i386-protos.h: Likewise.
              * config/i386/i386.md (floathi<X87MODEF>2): Use assign_386_stack_local
              in the expander instead of a splitter.
              (float<SWI48x><X87MODEF>2): Use assign_386_stack_local if there is
              any possibility of requiring a memory.
              (*floatsi<MODEF>2_vector_mixed): Remove, and the splitters.
              (*floatsi<MODEF>2_vector_sse): Remove, and the splitters.
              (fp branch splitters): Update for ix86_split_fp_branch.
              (*jcc<X87MODEF>_<SWI24>_i387): Remove r/f alternative.
              (*jcc<X87MODEF>_<SWI24>_r_i387): Likewise.
              (splitter for jcc<X87MODEF>_<SWI24>_i387 r/f): Remove.
              (*fop_<MODEF>_2_i387): Remove f/r alternative.
              (*fop_<MODEF>_3_i387): Likewise.
              (*fop_xf_2_i387, *fop_xf_3_i387): Likewise.
              (splitters for the fop_* register patterns): Remove.
              (fscalexf4_i387): Rename from *fscalexf4_i387.
              (ldexpxf3): Use gen_floatsixf2 and gen_fscalexf4_i387.
      
      From-SVN: r208556
      Richard Henderson committed
    • re PR tree-optimization/59779 (FAIL: gcc.dg/autopar/outer-1.c… · 5b5d7f31
      re PR tree-optimization/59779 (FAIL: gcc.dg/autopar/outer-1.c scan-tree-dump-times parloops "parallelizing outer loop")
      
      	PR tree-optimization/59779
      	* tree-dfa.c (get_ref_base_and_extent): Use double_int
      	type for bitsize and maxsize instead of HOST_WIDE_INT.
      
      From-SVN: r208554
      Jakub Jelinek committed
    • regex.c (bzero): Define without coma expression. · 52684bb3
      	* regex.c (bzero) [!_LIBC]: Define without coma expression.
      	(regerror): Cast the call to memcpy to (void) to avoid unused
      	value warnings.
      
      From-SVN: r208553
      Uros Bizjak committed
    • re PR rtl-optimization/57320 (Shrink-wrapping leaves unreachable blocks in the CFG) · bdc6e1ae
      	PR rtl-optimization/57320
      	* function.c (rest_of_handle_thread_prologue_and_epilogue): Cleanup
      	the CFG after thread_prologue_and_epilogue_insns.
      
      From-SVN: r208551
      Steven Bosscher committed
    • re PR c++/60383 (ICE with invalid template specialization) · b0a87402
      /cp
      2014-03-13  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	PR c++/60383
      	* pt.c (maybe_process_partial_specialization): Check return value
      	of check_specialization_namespace.
      
      /testsuite
      2014-03-13  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	PR c++/60383
      	* g++.dg/template/crash118.C: New.
      	* g++.dg/template/crash95.C: Adjust.
      
      From-SVN: r208550
      Paolo Carlini committed
    • re PR rtl-optimization/57189 (Vector register is spilled for vector extract pattern) · 7891065a
      2014-03-13  Vladimir Makarov  <vmakarov@redhat.com>
      
      	PR rtl-optimization/57189
      	* lra-constraints.c (process_alt_operands): Disfavor spilling
      	vector pseudos.
      
      2014-03-13  Vladimir Makarov  <vmakarov@redhat.com>
      
      	PR rtl-optimization/57189
      	* gcc.target/i386/pr57189.c: New.
      
      From-SVN: r208549
      Vladimir Makarov committed
    • re PR ada/51483 (cstand.adb:Register_Float_Type makes invalid assumption about FP modes) · 00c5acd3
      	PR ada/51483
      	* cstand.adb (Register_Float_Type): Add 'precision' parameter and use
      	it to set the RM size.  Use directly 'size' for the Esize.
      	(Create_Back_End_Float_Types): Adjust call to above.
      	* get_targ.ads (Register_Type_Proc): Add 'precision' parameter.
      	* set_targ.ads (FPT_Mode_Entry): Add 'precision' component.
      	(Write_Target_Dependent_Values): Adjust comment.
      	* set_targ.adb (Register_Float_Type): Add 'precision' parameter and
      	deal with it.
      	(Write_Target_Dependent_Values): Write the precision in lieu of size.
      	(Initialization): Read the precision in lieu of size and compute the
      	size from the precision and the alignment.
      	* gcc-interface/gigi.h (enumerate_modes): Add integer parameter.
      	* gcc-interface/misc.c (enumerate_modes): Likewise.  Do not register
      	types for vector modes, pass the size in addition to the precision.
      
      From-SVN: r208546
      Eric Botcazou committed
    • re PR c++/60254 ([c++11] ICE with non-const expression in static_assert) · 9299bde0
      /cp
      2014-03-13  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	PR c++/60254
      	* semantics.c (finish_static_assert): Call cxx_constant_value only
      	if require_potential_rvalue_constant_expression returns true.
      
      /testsuite
      2014-03-13  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	PR c++/60254
      	* g++.dg/cpp0x/static_assert10.C: New.
      	* g++.dg/cpp0x/static_assert11.C: Likewise.
      	* g++.dg/cpp0x/static_assert3.C: Adjust.
      
      From-SVN: r208538
      Paolo Carlini committed
    • lto-wrapper.c (maybe_unlink_file): Suppress diagnostic messages. · eba14fca
      2014-03-13  Cesar Philippidis  <cesar@codesourcery.com>
      
      	* lto-wrapper.c (maybe_unlink_file): Suppress diagnostic
      	messages.
      
      From-SVN: r208537
      Cesar Philippidis committed
    • lto.exp (lto-execute): Fix error catching for dg-final. · 11a860e3
      2014-03-13  Richard Biener  <rguenther@suse.de>
      
      	* lib/lto.exp (lto-execute): Fix error catching for dg-final.
      
      From-SVN: r208536
      Richard Biener committed
    • re PR tree-optimization/59025 (Revision 203979 causes failure in CPU2006 benchmark 435.gromacs) · f661b085
      	PR tree-optimization/59025
      	PR middle-end/60418
      	* tree-ssa-reassoc.c (sort_by_operand_rank): For SSA_NAMEs with the
      	same rank, sort by bb_rank and gimple_uid of SSA_NAME_DEF_STMT first.
      
      From-SVN: r208535
      Jakub Jelinek committed
    • re PR target/60486 ([avr] superfluous or missing comparision after addition or subtraction) · 8f3a3138
      	PR target/60486
      	* config/avr/avr.c (avr_out_plus): Swap cc_plus and cc_minus in
      	calls of avr_out_plus_1.
      
      From-SVN: r208532
      Georg-Johann Lay committed
    • ChangeLog: Fix whitespace. · 0bb29a05
      	* ChangeLog: Fix whitespace.
      	* testsuite/ChangeLog: Ditto.
      
      From-SVN: r208530
      Uros Bizjak committed
    • re PR libfortran/38199 (missed optimization: I/O performance) · 3b63b663
      2014-03-12  Jerry DeLisle  <jvdelisle@gcc.gnu>
      
      	PR libfortran/38199
      	* io/read.c (read_decimal): Quickly skip spaces to avoid calls
      	to next_char.
      	* io/unit.c (is_trim_ok): New helper function to check various
      	conditions to see if its OK to trim the internal unit string.
      	(get_internal_unit): Use LEN_TRIM to shorten selected internal
      	unit strings for optimizing READ. Enable this optimization for
      	formatted READ.
      	* io/list_read.c (finish_list_read): Don't call eat_line for
      	internal units.
      
      From-SVN: r208528
      Jerry DeLisle committed
    • tree-cfgcleanup.c (remove_forwarder_block_with_phi): Record BB's single pred and… · d731ee04
      tree-cfgcleanup.c (remove_forwarder_block_with_phi): Record BB's single pred and update the father loop's latch info later.
      
      
      	* tree-cfgcleanup.c (remove_forwarder_block_with_phi): Record
      	BB's single pred and update the father loop's latch info later.
      
      From-SVN: r208527
      Bin Cheng committed
    • Daily bump. · 9f493d9d
      From-SVN: r208525
      GCC Administrator committed
    • vector.md (VEC_L): Add V1TI mode to vector types. · a16a872d
      [gcc]
      2014-03-12  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	* config/rs6000/vector.md (VEC_L): Add V1TI mode to vector types.
      	(VEC_M): Likewise.
      	(VEC_N): Likewise.
      	(VEC_R): Likewise.
      	(VEC_base): Likewise.
      	(mov<MODE>, VEC_M modes): If we are loading TImode into VSX
      	registers, we need to swap double words in little endian mode.
      
      	* config/rs6000/rs6000-modes.def (V1TImode): Add new vector mode
      	to be a container mode for 128-bit integer operations added in ISA
      	2.07.  Unlike TImode and PTImode, the preferred register set is
      	the Altivec/VMX registers for the 128-bit operations.
      
      	* config/rs6000/rs6000-protos.h (rs6000_move_128bit_ok_p): Add
      	declarations.
      	(rs6000_split_128bit_ok_p): Likewise.
      
      	* config/rs6000/rs6000-builtin.def (BU_P8V_AV_3): Add new support
      	macros for creating ISA 2.07 normal and overloaded builtin
      	functions with 3 arguments.
      	(BU_P8V_OVERLOAD_3): Likewise.
      	(VPERM_1T): Add support for V1TImode in 128-bit vector operations
      	for use as overloaded functions.
      	(VPERM_1TI_UNS): Likewise.
      	(VSEL_1TI): Likewise.
      	(VSEL_1TI_UNS): Likewise.
      	(ST_INTERNAL_1ti): Likewise.
      	(LD_INTERNAL_1ti): Likewise.
      	(XXSEL_1TI): Likewise.
      	(XXSEL_1TI_UNS): Likewise.
      	(VPERM_1TI): Likewise.
      	(VPERM_1TI_UNS): Likewise.
      	(XXPERMDI_1TI): Likewise.
      	(SET_1TI): Likewise.
      	(LXVD2X_V1TI): Likewise.
      	(STXVD2X_V1TI): Likewise.
      	(VEC_INIT_V1TI): Likewise.
      	(VEC_SET_V1TI): Likewise.
      	(VEC_EXT_V1TI): Likewise.
      	(EQV_V1TI): Likewise.
      	(NAND_V1TI): Likewise.
      	(ORC_V1TI): Likewise.
      	(VADDCUQ): Add support for 128-bit integer arithmetic instructions
      	added in ISA 2.07.  Add both normal 'altivec' builtins, and the
      	overloaded builtin.
      	(VADDUQM): Likewise.
      	(VSUBCUQ): Likewise.
      	(VADDEUQM): Likewise.
      	(VADDECUQ): Likewise.
      	(VSUBEUQM): Likewise.
      	(VSUBECUQ): Likewise.
      
      	* config/rs6000/rs6000-c.c (__int128_type): New static to hold
      	__int128_t and __uint128_t types.
      	(__uint128_type): Likewise.
      	(altivec_categorize_keyword): Add support for vector __int128_t,
      	vector __uint128_t, vector __int128, and vector unsigned __int128
      	as a container type for TImode operations that need to be done in
      	VSX/Altivec registers.
      	(rs6000_macro_to_expand): Likewise.
      	(altivec_overloaded_builtins): Add ISA 2.07 overloaded functions
      	to support 128-bit integer instructions vaddcuq, vadduqm,
      	vaddecuq, vaddeuqm, vsubcuq, vsubuqm, vsubecuq, vsubeuqm.
      	(altivec_resolve_overloaded_builtin): Add support for V1TImode.
      
      	* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Add support
      	for V1TImode, and set up preferences to use VSX/Altivec
      	registers.  Setup VSX reload handlers.
      	(rs6000_debug_reg_global): Likewise.
      	(rs6000_init_hard_regno_mode_ok): Likewise.
      	(rs6000_preferred_simd_mode): Likewise.
      	(vspltis_constant): Do not allow V1TImode as easy altivec
      	constants.
      	(easy_altivec_constant): Likewise.
      	(output_vec_const_move): Likewise.
      	(rs6000_expand_vector_set): Convert V1TImode set and extract to
      	simple move.
      	(rs6000_expand_vector_extract): Likewise.
      	(reg_offset_addressing_ok_p): Setup V1TImode to use VSX reg+reg
      	addressing.
      	(rs6000_const_vec): Add support for V1TImode.
      	(rs6000_emit_le_vsx_load): Swap double words when loading or
      	storing TImode/V1TImode.
      	(rs6000_emit_le_vsx_store): Likewise.
      	(rs6000_emit_le_vsx_move): Likewise.
      	(rs6000_emit_move): Add support for V1TImode.
      	(altivec_expand_ld_builtin): Likewise.
      	(altivec_expand_st_builtin): Likewise.
      	(altivec_expand_vec_init_builtin): Likewise.
      	(altivec_expand_builtin): Likewise.
      	(rs6000_init_builtins): Add support for V1TImode type.  Add
      	support for ISA 2.07 128-bit integer builtins.  Define type names
      	for the VSX/Altivec vector types.
      	(altivec_init_builtins): Add support for overloaded vector
      	functions with V1TImode type.
      	(rs6000_preferred_reload_class): Prefer Altivec registers for
      	V1TImode.
      	(rs6000_move_128bit_ok_p): Move 128-bit move/split validation to
      	external function.
      	(rs6000_split_128bit_ok_p): Likewise.
      	(rs6000_handle_altivec_attribute): Create V1TImode from vector
      	__int128_t and vector __uint128_t.
      
      	* config/rs6000/vsx.md (VSX_L): Add V1TImode to vector iterators
      	and mode attributes.
      	(VSX_M): Likewise.
      	(VSX_M2): Likewise.
      	(VSm): Likewise.
      	(VSs): Likewise.
      	(VSr): Likewise.
      	(VSv): Likewise.
      	(VS_scalar): Likewise.
      	(VS_double): Likewise.
      	(vsx_set_v1ti): New builtin function to create V1TImode from
      	TImode.
      
      	* config/rs6000/rs6000.h (TARGET_VADDUQM): New macro to say
      	whether we support the ISA 2.07 128-bit integer arithmetic
      	instructions.
      	(ALTIVEC_OR_VSX_VECTOR_MODE): Add V1TImode.
      	(enum rs6000_builtin_type_index): Add fields to hold V1TImode
      	and TImode types for use with the builtin functions.
      	(V1TI_type_node): Likewise.
      	(unsigned_V1TI_type_node): Likewise.
      	(intTI_type_internal_node): Likewise.
      	(uintTI_type_internal_node): Likewise.
      
      	* config/rs6000/altivec.md (UNSPEC_VADDCUQ): New unspecs for ISA
      	2.07 128-bit builtin functions.
      	(UNSPEC_VADDEUQM): Likewise.
      	(UNSPEC_VADDECUQ): Likewise.
      	(UNSPEC_VSUBCUQ): Likewise.
      	(UNSPEC_VSUBEUQM): Likewise.
      	(UNSPEC_VSUBECUQ): Likewise.
      	(VM): Add V1TImode to vector mode iterators.
      	(VM2): Likewise.
      	(VI_unit): Likewise.
      	(altivec_vadduqm): Add ISA 2.07 128-bit binary builtins.
      	(altivec_vaddcuq): Likewise.
      	(altivec_vsubuqm): Likewise.
      	(altivec_vsubcuq): Likewise.
      	(altivec_vaddeuqm): Likewise.
      	(altivec_vaddecuq): Likewise.
      	(altivec_vsubeuqm): Likewise.
      	(altivec_vsubecuq): Likewise.
      
      	* config/rs6000/rs6000.md (FMOVE128_GPR): Add V1TImode to vector
      	mode iterators.
      	(BOOL_128): Likewise.
      	(BOOL_REGS_OUTPUT): Likewise.
      	(BOOL_REGS_OP1): Likewise.
      	(BOOL_REGS_OP2): Likewise.
      	(BOOL_REGS_UNARY): Likewise.
      	(BOOL_REGS_AND_CR0): Likewise.
      
      	* config/rs6000/altivec.h (vec_vaddcuq): Add support for ISA 2.07
      	128-bit integer builtin support.
      	(vec_vadduqm): Likewise.
      	(vec_vaddecuq): Likewise.
      	(vec_vaddeuqm): Likewise.
      	(vec_vsubecuq): Likewise.
      	(vec_vsubeuqm): Likewise.
      	(vec_vsubcuq): Likewise.
      	(vec_vsubuqm): Likewise.
      
      	* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
      	Document vec_vaddcuq, vec_vadduqm, vec_vaddecuq, vec_vaddeuqm,
      	vec_subecuq, vec_subeuqm, vec_vsubcuq, vec_vsubeqm builtins adding
      	128-bit integer add/subtract to ISA 2.07.
      
      [gcc/testsuite]
      2014-03-12  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	* gcc.target/powerpc/p8vector-int128-1.c: New test to test ISA
      	2.07 128-bit arithmetic.
      	* gcc.target/powerpc/p8vector-int128-2.c: Likewise.
      
      	* gcc.target/powerpc/timode_off.c: Restrict cpu type to power5,
      	due to when TImode is allowed in VSX registers, the allowable
      	address modes for TImode is just a single indirect address in
      	order for the value to be loaded and store in either GPR or VSX
      	registers.  This affects the generated code, and it would cause
      	this test to fail, when such an option is used.
      
      From-SVN: r208522
      Michael Meissner committed
    • arc.c (arc_predicate_delay_insns): Fix third argument passed to conditionalize_nonjump. · eeac7d15
              * config/arc/arc.c (arc_predicate_delay_insns): 
              Fix third argument passed to conditionalize_nonjump.
      
      From-SVN: r208521
      Joern Rennecke committed