re PR rtl-optimization/57189 (Vector register is spilled for vector extract pattern)

2014-03-13  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/57189
	* lra-constraints.c (process_alt_operands): Disfavor spilling
	vector pseudos.

2014-03-13  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/57189
	* gcc.target/i386/pr57189.c: New.

From-SVN: r208549

gcc/ChangeLog

+2014-03-13  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR rtl-optimization/57189
+	* lra-constraints.c (process_alt_operands): Disfavor spilling
+	vector pseudos.
+
 2014-03-13  Cesar Philippidis  <cesar@codesourcery.com>
 
 	* lto-wrapper.c (maybe_unlink_file): Suppress diagnostic

gcc/lra-constraints.c

@@ -2302,9 +2302,20 @@ process_alt_operands (int only_alternative)
 		  if (lra_dump_file != NULL)
 		    fprintf
 		      (lra_dump_file,
-		       "            %d Spill pseudo in memory: reject+=3\n",
+		       "            %d Spill pseudo into memory: reject+=3\n",
 		       nop);
 		  reject += 3;
+		  if (VECTOR_MODE_P (mode))
+		    {
+		      /* Spilling vectors into memory is usually more
+			 costly as they contain big values.  */
+		      if (lra_dump_file != NULL)
+			fprintf
+			  (lra_dump_file,
+			   "            %d Spill vector pseudo: reject+=2\n",
+			   nop);
+		      reject += 2;
+		    }
 		}
 
 #ifdef SECONDARY_MEMORY_NEEDED

gcc/testsuite/ChangeLog

+2014-03-13  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR rtl-optimization/57189
+	* gcc.target/i386/pr57189.c: New.
+
 2014-03-13  Paolo Carlini  <paolo.carlini@oracle.com>
 
 	PR c++/60254

gcc/testsuite/gcc.target/i386/pr57189.c

+/* { dg-do compile } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
+/* { dg-final { scan-assembler-not "movaps" } } */
+
+typedef int __v4si __attribute__ ((__vector_size__ (16)));
+
+int test (__v4si __A)
+{
+  return __builtin_ia32_vec_ext_v4si (__A, 0);
+}