2019-10-18  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
	    Richard Sandiford  <richard.sandiford@arm.com>

	PR target/86753
	* tree-vectorizer.h (scalar_cond_masked_key): New struct,
	and define hashmap traits for it.
	(loop_vec_info::scalar_cond_masked_set): New member.
	(vect_record_loop_mask): Adjust prototype.
	* tree-vectorizer.c (scalar_cond_masked_key::get_cond_ops_from_tree):
	Implement method.
	* tree-vect-loop.c (vectorizable_reduction): Pass NULL as last arg to
	vect_record_loop_mask.
	(vectorizable_live_operation): Likewise.
	(vect_record_loop_mask): New param scalar_mask. Add entry
	cond, loop_mask	to scalar_cond_masked_set if scalar_mask is non NULL.
	* tree-vect-stmts.c (check_load_store_masking): New param scalar_mask.
	Pass it as last arg to vect_record_loop_mask.
	(vectorizable_call): Pass scalar_mask as last arg to
	vect_record_loop_mask.
	(vectorizable_store): Likewise.
	(vectorizable_load): Likewise.
	(vectorizable_condition): Check if another part of vectorized code
	applies loop_mask to condition or to it's inverse, and if yes,
	apply loop_mask to result of vector comparison.

testsuite/
	* gcc.target/aarch64/sve/cond_cnot_2.c: Remove XFAIL
	from { scan-assembler-not {\tsel\t}.
	* gcc.target/aarch64/sve/cond_convert_1.c: Adjust to make
	only one load conditional.
	* gcc.target/aarch64/sve/cond_convert_4.c: Likewise.
	* gcc.target/aarch64/sve/cond_unary_2.c: Likewise.
	* gcc.target/aarch64/sve/vcond_4.c: Remove XFAIL's.
	* gcc.target/aarch64/sve/vcond_5.c: Likewise.

Co-Authored-By: Richard Sandiford <richard.sandiford@arm.com>

From-SVN: r277141

From-SVN: r277140

	* config/pa/pa.c (pa_output_indirect_call): Fix typos in last change.

From-SVN: r277135

	PR tree-optimization/92056
	* tree-ssa-strlen.c (determine_min_objsize): Call init_object_sizes
	before calling compute_builtin_object_size.

	* gcc.dg/tree-ssa/pr92056.c: New test.

From-SVN: r277134

/cp
2019-10-17  Paolo Carlini  <paolo.carlini@oracle.com>

	* decl.c (grokfndecl): Remove redundant use of in_system_header_at.
	(compute_array_index_type_loc): Likewise.
	(grokdeclarator): Likewise.
	* error.c (cp_printer): Likewise.
	* lambda.c (add_default_capture): Likewise.
	* parser.c (cp_parser_primary_expression): Likewise.
	(cp_parser_selection_statement): Likewise.
	(cp_parser_toplevel_declaration): Likewise.
	(cp_parser_enumerator_list): Likewise.
	(cp_parser_using_declaration): Likewise.
	(cp_parser_member_declaration): Likewise.
	(cp_parser_exception_specification_opt): Likewise.
	(cp_parser_std_attribute_spec): Likewise.
	* pt.c (do_decl_instantiation): Likewise.
	(do_type_instantiation): Likewise.
	* typeck.c (cp_build_unary_op): Likewise.

	* decl.c (check_tag_decl): Pass to in_system_header_at the same
	location used for the permerror.
	(grokdeclarator): Likewise.

	* decl.c (check_tag_decl): Use locations[ds_typedef] in error_at.

/testsuite
2019-10-17  Paolo Carlini  <paolo.carlini@oracle.com>

	* g++.old-deja/g++.other/decl9.C: Check locations too.

From-SVN: r277133

The current Darwin load/store lo_sum patterns have neither predicate nor
constraint.  This means that most parts of the backend, which rely on
recog() to validate the rtx, can produce invalid combinations/selections.

For 32bit cases this isn't a problem since we can load/store to unaligned
addresses using D-mode insns.

Conversely, for 64bit instructions that use DS mode, this can manifest as
assemble errors (for an assembler that checks the LO14 relocations), or as
crashes caused by wrong offsets (or worse, wrong content for the two LSBs).

What we want to check for "Y" on Darwin is:
  - that the alignment of the Symbols' target is sufficient for DS mode
  - that the offset is suitable for DS mode.
(while looking through the Mach-O PIC unspecs).

So, the patch removes the Darwin-specific lo_sum patterns (we begin using
the movdi_internal64 patterns).  We also we need to extend the handling of the
mem_operand_gpr constraint to allow looking through Mach-O PIC UNSPECs in
the lo_sum cases.

gcc/ChangeLog:

2019-10-17  Iain Sandoe  <iain@sandoe.co.uk>

	PR target/65342
	* config/rs6000/darwin.md (movdi_low, movsi_low_st): Delete.
	(movdi_low_st): Delete.
	* config/rs6000/rs6000.c
	(darwin_rs6000_legitimate_lo_sum_const_p): New.
	(mem_operand_gpr): Validate Mach-O LO_SUM cases separately.
	* config/rs6000/rs6000.md (movsi_low): Delete.

From-SVN: r277130

	* .gitattributes: Avoid {} in filename pattern.

Brace-expansion is a bash feature, not part of glob(7).

From-SVN: r277129

	* cp-gimplify.c (cp_gimplify_expr): Use get_initialized_tmp_var.

The comment for get_formal_tmp_var says that it shouldn't be used for
expressions whose value might change between initialization and use, and in
this case we're creating a temporary precisely because the value might
change, so we should use get_initialized_tmp_var instead.

I also noticed that many callers of get_initialized_tmp_var pass NULL for
post_p, so it seems appropriate to make it a default argument.

gcc/
	* gimplify.h (get_initialized_tmp_var): Add default argument to
	post_p.
	* gimplify.c (gimplify_self_mod_expr, gimplify_omp_atomic): Remove
	NULL post_p argument.
	* targhooks (std_gimplify_va_arg_expr): Likewise.

From-SVN: r277128

2019-10-17  Richard Biener  <rguenther@suse.de>

	* tree-vectorizer.h (_stmt_vec_info::cond_reduc_code): Remove.
	(STMT_VINFO_VEC_COND_REDUC_CODE): Likewise.
	* tree-vectorizer.c (vec_info::new_stmt_vec_info): Do not
	initialize STMT_VINFO_VEC_COND_REDUC_CODE.
	* tree-vect-loop.c (vect_is_simple_reduction): Set
	STMT_VINFO_REDUC_CODE.
	(vectorizable_reduction): Remove dead and redundant code, use
	STMT_VINFO_REDUC_CODE instead of STMT_VINFO_VEC_COND_REDUC_CODE.

From-SVN: r277126

This won't do anything by default, because __cplusplus is set to 201402L
when Doxygen runs. If/when that changes, these headers should be
processed.

	* doc/doxygen/user.cfg.in (INPUT): Add new C++17 and C++20 headers.

From-SVN: r277121

Define std::identity, std::ranges::equal_to, std::ranges::not_equal_to,
std::ranges::greater, std::ranges::less, std::ranges::greater_equal and
std::ranges::less_equal.

	* include/Makefile.am: Add new header.
	* include/Makefile.in: Regenerate.
	* include/bits/range_cmp.h: New header for C++20 function objects.
	* include/std/functional: Include new header.
	* testsuite/20_util/function_objects/identity/1.cc: New test.
	* testsuite/20_util/function_objects/range.cmp/equal_to.cc: New test.
	* testsuite/20_util/function_objects/range.cmp/greater.cc: New test.
	* testsuite/20_util/function_objects/range.cmp/greater_equal.cc: New
	test.
	* testsuite/20_util/function_objects/range.cmp/less.cc: New test.
	* testsuite/20_util/function_objects/range.cmp/less_equal.cc: New test.
	* testsuite/20_util/function_objects/range.cmp/not_equal_to.cc: New
	test.

From-SVN: r277120

	* config/avr/avr.c (avr_option_override): Remove set of
	PARAM_ALLOW_STORE_DATA_RACES.
	* common/config/avr/avr-common.c (avr_option_optimization_table)
	[OPT_LEVELS_ALL]: Turn on -fallow-store-data-races.

From-SVN: r277115

i386.h has

 #define CLEAR_RATIO(speed) ((speed) ? MIN (6, ix86_cost->move_ratio) : 2)

It is impossible to have CLEAR_RATIO > 6.  This patch adds clear_ratio
to processor_costs, sets it to the minimum of 6 and move_ratio in all
cost models and defines CLEAR_RATIO with clear_ratio.

	* config/i386/i386.h (processor_costs): Add clear_ratio.
	(CLEAR_RATIO): Remove MIN and use ix86_cost->clear_ratio.
	* config/i386/x86-tune-costs.h: Set clear_ratio to the minimum
	of 6 and move_ratio in all cost models.

From-SVN: r277114

The container requirements say that for move assignment "All existing
elements of [the target] are either move assigned or destroyed". Some of
our containers currently use __make_move_if_noexcept which makes the
move depend on whether the element type is nothrow move constructible.
This is incorrect, because the standard says we must move assign, not
move or copy depending on the move constructor.

Use make_move_iterator instead so that we move unconditionally. This
ensures existing elements won't be copy assigned.

	PR libstdc++/92124
	* include/bits/forward_list.h
	(_M_move_assign(forward_list&&, false_type)): Do not use
	__make_move_if_noexcept, instead move unconditionally.
	* include/bits/stl_deque.h (_M_move_assign2(deque&&, false_type)):
	Likewise.
	* include/bits/stl_list.h (_M_move_assign(list&&, false_type)):
	Likewise.
	* include/bits/stl_vector.h (_M_move_assign(vector&&, false_type)):
	Likewise.
	* testsuite/23_containers/vector/92124.cc: New test.

From-SVN: r277113

2019-10-17  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.c (check_reduction_path): Compute reduction
	operation here.
	(vect_is_simple_reduction): Remove special-case of single-stmt
	reduction path detection.

From-SVN: r277112

According to GAS, the Marvell PJ4 CPU has a VFPv3-D16 floating point
unit, but GCC's CPU configuration tables omits this meaning that
-mfpu=auto will not correctly select the FPU.  This patch fixes this
by adding the +fp option to the architecture specification for this
device.

	* config/arm/arm-cpus.in (marvel-pj4): Add +fp to the architecture.

From-SVN: r277111

2019-10-17  Yuliang Wang  <yuliang.wang@arm.com>

gcc/
	* config/aarch64/aarch64-sve2.md (aarch64_sve2_eor3<mode>)
	(aarch64_sve2_nor<mode>, aarch64_sve2_nand<mode>)
	(aarch64_sve2_bsl<mode>, aarch64_sve2_nbsl<mode>)
	(aarch64_sve2_bsl1n<mode>, aarch64_sve2_bsl2n<mode>):
	New combine patterns.
	* config/aarch64/iterators.md (BSL_DUP): New int iterator for the
	above.
	(bsl_1st, bsl_2nd, bsl_dup, bsl_mov): Attributes for the above.

gcc/testsuite/
	* gcc.target/aarch64/sve2/eor3_1.c: New test.
	* gcc.target/aarch64/sve2/nlogic_1.c: As above.
	* gcc.target/aarch64/sve2/nlogic_2.c: As above.
	* gcc.target/aarch64/sve2/bitsel_1.c: As above.
	* gcc.target/aarch64/sve2/bitsel_2.c: As above.
	* gcc.target/aarch64/sve2/bitsel_3.c: As above.
	* gcc.target/aarch64/sve2/bitsel_4.c: As above.

From-SVN: r277110

From-SVN: r277108

	PR tree-optimization/92131
	* tree-vrp.c (value_range_base::dump): Display +INF for both
	pointers and integers when appropriate.

From-SVN: r277107

gcc/ChangeLog:
2019-10-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* tree-vect-loop.c (vect_analyze_loop_2): Use same condition to decide
	when to use versioning threshold.

From-SVN: r277105

gcc/ChangeLog:
2019-10-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* tree-vect-loop.c (determine_peel_for_niter): New function contained
	outlined code from ...
	(vect_analyze_loop_2): ... here.

From-SVN: r277103

https://gcc.gnu.org/ml/gcc-patches/2019-10/msg01283.html
	* decl.c (builtin_function_1): Merge into ...
	(cxx_builtin_function): ... here.  Nadger the decl before maybe
	copying it.  Set the context.
	(cxx_builtin_function_ext_scope): Push to top level, then call
	cxx_builtin_function.

From-SVN: r277102

gcc/ChangeLog:
2019-10-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* tree-vect-loop.c (vect_transform_loop): Move code from here...
	* tree-vect-loop-manip.c (vect_loop_versioning): ... to here.
	* tree-vectorizer.h (vect_loop_versioning): Remove unused parameters.

From-SVN: r277101

2019-10-17  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.c (needs_fold_left_reduction_p): Export.
	(vect_is_simple_reduction): Move all validity checks ...
	(vectorizable_reduction): ... here.  Compute whether we
	need a fold-left reduction here.
	* tree-vect-patterns.c (vect_reassociating_reduction_p): Merge
	both overloads, check needs_fold_left_reduction_p directly.
	* tree-vectorizer.h (needs_fold_left_reduction_p): Declare.

From-SVN: r277100

The arm_arch_v8a_ok effective-target lacks a closing bracket in these
tests, resulting in it being ignored.

2019-10-17  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/testsuite/
	* gcc.target/arm/vseleqdf.c: Add missing closing bracket.
	* gcc.target/arm/vseleqsf.c: Likewise.
	* gcc.target/arm/vselgedf.c: Likewise.
	* gcc.target/arm/vselgesf.c: Likewise.
	* gcc.target/arm/vselgtdf.c: Likewise.
	* gcc.target/arm/vselgtsf.c: Likewise.
	* gcc.target/arm/vselledf.c: Likewise.
	* gcc.target/arm/vsellesf.c: Likewise.
	* gcc.target/arm/vselltdf.c: Likewise.
	* gcc.target/arm/vselltsf.c: Likewise.
	* gcc.target/arm/vselnedf.c: Likewise.
	* gcc.target/arm/vselnesf.c: Likewise.
	* gcc.target/arm/vselvcdf.c: Likewise.
	* gcc.target/arm/vselvcsf.c: Likewise.
	* gcc.target/arm/vselvsdf.c: Likewise.
	* gcc.target/arm/vselvssf.c: Likewise.

From-SVN: r277099

2019-10-17  Richard Biener  <rguenther@suse.de>

	* tree-ssa-pre.c (create_component_ref_by_pieces_1): Fix
	TARGET_MEM_REF creation.

From-SVN: r277098

From-SVN: r277097

gcc/testsuite/
	* gcc.target/avr/progmem-error-1.cpp: Fix location of the
	expected diagnostic.

From-SVN: r277096

PR testsuite/92125

2019-10-17  Feng Xue  <fxue@os.amperecomputing.com>

        PR testsuite/92125
        * gcc.dg/ipa/pr91088.c: Change char conversion to bitand.

From-SVN: r277095

2019-10-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/92129
	* tree-vect-loop.c (vectorizable_reduction): Also fail
	on GIMPLE_SINGLE_RHS.

From-SVN: r277094

	PR tree-optimization/92056
	* tree-object-size.c (cond_expr_object_size): Return early if then_
	processing resulted in unknown size.

	* gcc.c-torture/compile/pr92056.c: New test.

From-SVN: r277093

	PR tree-optimization/92115
	* tree-ssa-ifcombine.c (ifcombine_ifandif): Force condition into
	temporary if it could trap.

	* gcc.dg/pr92115.c: New test.

From-SVN: r277092

	PR fortran/87752
	* gfortran.dg/gomp/pr87752.f90: New test.

From-SVN: r277091

2019-10-17  Richard Biener  <rguenther@suse.de>

	PR debug/91887
	* dwarf2out.c (gen_formal_parameter_die): Also try to match
	context_die against a DW_TAG_GNU_formal_parameter_pack parent.

	* g++.dg/debug/dwarf2/pr91887.C: New testcase.

From-SVN: r277090

I've found this stale reference while looking at cp-gimplify.c. tree-gimple.c
no longer exists and its contents were merged into gimple.c.

Seems obvious enough.

gcc/cp/ChangeLog:

2019-10-16  Luis Machado  <luis.machado@linaro.org>

	* cp-gimplify.c: Fix reference to non-existing tree-gimple.c file.

From-SVN: r277089

From-SVN: r277088

	* decl.c (cxx_maybe_build_cleanup): When clearing location of cleanup,
	if cleanup is a nop, clear location of its operand too.

From-SVN: r277084

	* tree-ssa-strlen.c (maybe_invalidate): Use
	HOST_WIDE_INT_PRINT_UNSIGNED instead of "%zu".

From-SVN: r277083

This finishes the part 1 of 2 patch submitted by Andrew Burgess on Aug 19.
This adds the argument registers but not t0 (aka x5) to SIBCALL_REGS.  It
also adds the missing riscv_regno_to_class change.

Tested with cross riscv32-elf and riscv64-linux toolchain build and check.
There were no regressions.  I see about a 0.01% code size reduction for the
C and libstdc++ libraries.

	gcc/
	* config/riscv/riscv.h (REG_CLASS_CONTENTS): Add argument passing
	regs to SIBCALL_REGS.
	* config/riscv/riscv.c (riscv_regno_to_class): Change argument
	passing regs to SIBCALL_REGS.

Co-Authored-By: Jim Wilson <jimw@sifive.com>

From-SVN: r277082

gcc/ChangeLog:

	PR tree-optimization/83821
	* tree-ssa-strlen.c (maybe_invalidate): Add argument.  Consider
	the length of a string when available.
	(handle_builtin_memset) Add argument.
	(handle_store, strlen_check_and_optimize_call): Same.
	(check_and_optimize_stmt): Same.  Pass it to callees.

gcc/testsuite/ChangeLog:

	PR tree-optimization/83821
	* c-c++-common/Warray-bounds-4.c: Remove XFAIL.
	* gcc.dg/strlenopt-82.c: New test.
	* gcc.dg/strlenopt-83.c: Same.
	* gcc.dg/strlenopt-84.c: Same.
	* gcc.dg/strlenopt-85.c: Same.
	* gcc.dg/strlenopt-86.c: Same.
	* gcc.dg/tree-ssa/calloc-4.c: Same.
	* gcc.dg/tree-ssa/calloc-5.c: Same.

From-SVN: r277080