PR target/78439
	* config/arm/vfp.md (*movdi_vfp_cortexa8): Use 'q' constraints for the
	register operand in alternatives 4,5,6.

	* gcc.c-torture/compile/pr78439.c: New test.

From-SVN: r242695

re PR target/77904 ([ARM Cortex-M0] Frame pointer thrashes registers if assembly statements with "sp" clobber are used)

2016-11-22  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    PR target/77904
    * config/arm/arm.c (thumb1_compute_save_reg_mask): Mark frame pointer
    in save register mask if it is needed.

    gcc/testsuite/
    PR target/77904
    * gcc.target/arm/pr77904.c: New test.

From-SVN: r242693

gcc/testsuite/

	* gcc.target/mips/interrupt_handler-bug-1.c (dg-options): Add
	isa_rev>=2.

From-SVN: r242692

	PR tree-optimization/78436
	* gimple-ssa-store-merging.c (zero_char_buf): Removed.
	(shift_bytes_in_array, shift_bytes_in_array_right,
	merged_store_group::apply_stores): Formatting fixes.
	(clear_bit_region): Likewise.  Use memset.
	(encode_tree_to_bitpos): Formatting fixes.  Fix comment typos - EPXR
	instead of EXPR and inerted instead of inserted.  Use memset instead
	of zero_char_buf.  For !BYTES_BIG_ENDIAN decrease byte_size by 1
	if shift_amnt is 0.

	* gcc.c-torture/execute/pr78436.c: New test.

From-SVN: r242691

	PR middle-end/78416
	* expmed.c (expand_divmod): Use wide_int for computation of
	op1_is_pow2.  Don't set it if op1 is 0.  Formatting fixes.
	Use size <= HOST_BITS_PER_WIDE_INT instead of
	HOST_BITS_PER_WIDE_INT >= size.

	* gcc.dg/torture/pr78416.c: New test.

From-SVN: r242690

	PR tree-optimization/78445
	* tree-if-conv.c (tree_if_conversion): If any_pred_load_store or
	any_complicated_phi, version loop even if flag_tree_loop_if_convert is
	1.  Formatting fix.

	* gcc.dg/pr78445.c: New test.

From-SVN: r242689

ARM and AArch64 may not support trapping so runtime and
compile time check can differ.

gcc/testsuite/
	PR libgfortran/78449 
	* gfortran.dg/ieee/ieee_8.f90 (aarch64*gnu, arm*gnu*): Mark xfail.

From-SVN: r242688

	PR ipa/78309
	* ipa-icf.c (void sem_item::set_hash): Update m_hash_set.
	(sem_function::get_hash): Use the new field.
	(sem_function::parse): Remove an argument from ctor.
	(sem_variable::parse): Likewise.
	(sem_variable::get_hash): Use the new field.
	(sem_item_optimizer::read_section): Use new ctor and set hash.
	* ipa-icf.h: _hash is removed from sem_item::sem_item,
	sem_variable::sem_variable, sem_function::sem_function.

From-SVN: r242687

From-SVN: r242686

re PR target/68538 (ICE in gen_reg_rtx, at emit-rtl.c:1027 when cross-compiling for cris-linux-gnu target)

	PR target/68538
	* config/cris/cris.md: Don't call copy_to_mode_reg unless
	can_create_pseudo_p is true.

        PR target/68538
	* gcc.c-torture/compile/pr68538.c: New test.

From-SVN: r242682

We didn't have patterns yet for rl[wd]imi insns that do a rotate by 0.
This fixes it.


	PR target/68803
	* config/rs6000/rs6000.md (*rotlsi3_insert_5, *rotldi3_insert_6,
	*rotldi3_insert_7): New define_insns.

From-SVN: r242681

rs6000.md (movdi_internal32): Change constraints so that DImode can be allocated to FP/vector registers in...

[gcc]
2016-11-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.md (movdi_internal32): Change constraints
	so that DImode can be allocated to FP/vector registers in more
	cases, and we can avoid direct move operations.  If the register
	needs reloading, prefer GPRs over FP/vector registers.  In the
	case of FPR vs. Altivec registers, prefer FPR registers unless we
	have the ISA 3.0 reg+offset scalar instructions.
	(movdi_internal64): Likewise.

[gcc/testsuite]
2016-11-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/ppc-round2.c: Allow XSCVDPSXWS and XSCVDPUXWS
	to be generated instead of FCTIWUZ or FCTIWZ.

From-SVN: r242679

	PR middle-end/67335
	* omp-simd-clone.c (simd_clone_adjust_argument_types): Use NULL prefix
	for tmp simd array if DECL_NAME (parm) is NULL.

	* g++.dg/vect/simd-clone-7.cc: New test.

From-SVN: r242678

	PR c++/71973
	* g++.dg/torture/pr53321.C (size_t): Use __SIZE_TYPE__ instead of
	long unsigned int.
	* g++.dg/torture/pr63512.C (::strlen): Use __SIZE_TYPE__ instead of
	unsigned long.

From-SVN: r242677

	PR target/25128
	* config/m68k/predicates.md (swap_peephole_relational_operator): New
	predicate.
	* config/m68k/m68k.md (relational tests against 65535/65536): New
	peephole2.

	PR target/25128
	* gcc.target/m68k/pr25128.c: New test.

From-SVN: r242676

	* tree-ssa-loop-prefetch.c: Delete FIXME after the includes.

From-SVN: r242675

gcc/c-family/ChangeLog:

	* c.opt (-fprintf-return-value): Enable by default.

gcc/ChangeLog:

	* doc/invoke.texi (-fprintf-return-value): Document that option
	is enabled by default.

From-SVN: r242674

gcc/
	* config/avr/avr-c.c (avr_register_target_pragmas): Use C++
	for-loop declaration of loop variable.
	(avr_register_target_pragmas, avr_cpu_cpp_builtins): Same.
	* config/avr/avr.c (avr_popcount_each_byte)
	(avr_init_expanders, avr_regs_to_save, sequent_regs_live)
	(get_sequence_length, avr_prologue_setup_frame, avr_map_metric)
	(avr_expand_epilogue, avr_function_arg_advance)
	(avr_out_compare, avr_out_plus_1, avr_out_bitop, avr_out_fract)
	(avr_rotate_bytes, _reg_unused_after, avr_assemble_integer)
	(avr_adjust_reg_alloc_order, output_reload_in_const)
	(avr_conditional_register_usage, avr_find_unused_d_reg)
	(avr_map_decompose, avr_fold_builtin): Same.

From-SVN: r242672

	libstdc++-v3:
	* acinclude.m4 (GLIBCXX_CHECK_MATH11_PROTO): Update comments.
	(__CORRECT_ISO_CPP11_MATH_H_PROTO): Rename to ...
	(__CORRECT_ISO_CPP11_MATH_H_PROTO_FP): ... this.
	Add test for C++11 <math.h> integral overloads.
	* configure: Regenerate.
	* config.h.in: Regenerate.

	* include/c_global/cmath [__cplusplus >= 201103L]: Reflect
	__CORRECT_ISO_CPP11_MATH_H_PROTO to
	__CORRECT_ISO_CPP11_MATH_H_PROTO_FP rename.
	* include/c_global/cmath [_GLIBCXX_USE_C99_MATH &&
	!_GLIBCXX_USE_C99_FP_MACROS_DYNAMIC && __cplusplus >= 201103L]
	(std::fpclassify): Wrap in !__CORRECT_ISO_CPP11_MATH_H_PROTO_INT.
	(std::isfinite): Likewise.
	(std::isinf): Likewise.
	(std::isnan): Likewise.
	(std::isnormal): Likewise.
	(std::signbit): Likewise.
	(std::isgreater): Likewise.
	(std::isgreaterequal): Likewise.
	(std::isless): Likewise.
	(std::islessequal): Likewise.
	(std::islessgreater): Likewise.
	(std::isunordered): Likewise.
	[__cplusplus >= 201103L && _GLIBCXX_USE_C99_MATH_TR1]
	(std::acosh): Likewise.
	(std::asinh): Likewise.
	(std::atanh): Likewise.
	(std::cbrt): Likewise.
	(std::copysign): Likewise.
	(std::erf): Likewise.
	(std::erfc): Likewise.
	(std::exp2): Likewise.
	(std::expm1): Likewise.
	(std::fdim): Likewise.
	(std::fma): Likewise.
	(std::fmax): Likewise.
	(std::fmin): Likewise.
	(std::hypot): Likewise.
	(std::ilogb): Likewise.
	(std::lgamma): Likewise.
	(std::llrint): Likewise.
	(std::llround): Likewise.
	(std::log1p): Likewise.
	(std::log2): Likewise.
	(std::logb): Likewise.
	(std::lrint): Likewise.
	(std::lround): Likewise.
	(std::nearbyint): Likewise.
	(std::nextafter): Likewise.
	(std::nexttoward): Likewise.
	(std::remainder): Likewise.
	(std::remquo): Likewise.
	(std::rint): Likewise.
	(std::round): Likewise.
	(std::scalbln): Likewise.
	(std::scalbn): Likewise.
	(std::tgamma): Likewise.
	(std::trunc): Likewise.
	* include/tr1/cmath [_GLIBCXX_USE_C99_MATH_TR1 && __cplusplus >=
	201103L]: Reflect __CORRECT_ISO_CPP11_MATH_H_PROTO to
	__CORRECT_ISO_CPP11_MATH_H_PROTO_FP rename.

	fixincludes:
	* inclhack.def (solaris_math_12): New fix.
	(hpux11_fabsf): Replace bypass by *-hp-hpux11* mach selector.
	* fixincl.x: Regenerate.
	* tests/base/math.h [SOLARIS_MATH_12_CHECK]: New test.

From-SVN: r242671

gcc/
	* config/avr/avr.c (avr_popcount): Remove static function.
	(avr_popcount_each_byte, avr_out_bitop): Use popcount_hwi instead.

From-SVN: r242670

	* arm.opt (mapcs-float): Delete option
	* arm.c (arm_option_override): Remove hunk relating to
	TARGET_APCS_FLOAT.
	* doc/invoke.texi (arm options): Remove documentation for -mapcs-float.

From-SVN: r242669

We treated this g as a sibling call to f:

      int f (int);
      int g (void) { return f (1); }

but not this one:

      struct s { int i; };
      struct s f (int);
      struct s g (void) { return f (1); }

We treated them both as sibcalls on x86 before the first patch for PR36326,
so I suppose this is a regression of sorts from 4.3.

The patch allows function returns to be local aggregate variables as well
as gimple registers.

gcc/
	* tree-tailcall.c (process_assignment): Simplify the check for
	a valid copy, allowing the source to be a local variable as
	well as an SSA name.
	(find_tail_calls): Allow copies between local variables to follow
	the call.  Allow the result to be stored in any local variable,
	even if it's an aggregate.
	(eliminate_tail_call): Check whether the result is an SSA name
	before updating its SSA_NAME_DEF_STMT.

gcc/testsuite/
	* gcc.dg/tree-ssa/tailcall-7.c: New test.

From-SVN: r242668

gcc/ChangeLog:
	PR preprocessor/78324
	* input.c (get_substring_ranges_for_loc): Fail gracefully if
	-ftrack-macro-expansion has a value other than 2.

gcc/testsuite/ChangeLog:
	PR preprocessor/78324
	* gcc.dg/plugin/diagnostic-test-string-literals-1.c
	(test_multitoken_macro): New function.
	* gcc.dg/plugin/diagnostic-test-string-literals-3.c: New test
	case.
	* gcc.dg/plugin/diagnostic-test-string-literals-4.c: New test
	case.
	* gcc.dg/plugin/plugin.exp (plugin_test_list): Add the new test
	cases.
	* gcc.dg/tree-ssa/builtin-sprintf-warn-1.c (test_sprintf_note):
	Move to...
	* gcc.dg/tree-ssa/builtin-sprintf-warn-4.c: ...here.  Drop
	-ftrack-macro-expansion=0.
	(test_sprintf_note): Remove "P" macro.  Add
	dg-begin/end-multiline-output directives.
	(LINE, buffer, ptr): Copy from builtin-sprintf-warn-1.c.

From-SVN: r242667

gcc/testsuite/
	* lib/target-supports.exp (check_effective_target_tiny) [avr]:
	Return 1 for AVR_TINY.

From-SVN: r242666

gcc/testsuite/
	PR rtl-optimization/71785
	* gcc.target/powerpc/pr71785.c: New file.

From-SVN: r242665

	gcc/testsuite
	PR testsuite/78114
	* gfortran.dg/vect/fast-math-mgrid-resid.f: Add additional
	options.  Refine test by checking predictive commining PHI
	nodes in vectorized loop wrto vector factor.

From-SVN: r242664

With my previous patch the compiler ICEs if you use --enable-checking=df.
This patch fixes it, by calling df_update_entry_exit_and_calls instead of
df_update_entry_block_defs and df_update_exit_block_uses.


	PR rtl-optimization/78400
	* shrink-wrap.c (try_shrink_wrapping_separate): Call
	df_update_entry_exit_and_calls instead of df_update_entry_block_defs
	and df_update_exit_block_uses.

From-SVN: r242663

gcc:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	PR c++/71973
	* doc/invoke.texi (-Wno-builtin-declaration-mismatch): Document the
	new default-enabled warning..
	* builtin-types.def (BT_CONST_TM_PTR): New primitive type.
	(BT_PTR_CONST_STRING): Updated.
	(BT_FN_SIZE_STRING_SIZE_CONST_STRING_CONST_PTR): Removed.
	(BT_FN_SIZE_STRING_SIZE_CONST_STRING_CONST_TM_PTR): New function type.
	* builtins.def (DEF_TM_BUILTIN): Disable BOTH_P for TM builtins.
	(strftime): Update builtin function.
	* tree-core.h (TI_CONST_TM_PTR_TYPE): New enum value.
	* tree.h (const_tm_ptr_type_node): New type node.
	* tree.c (free_lang_data, build_common_tree_nodes): Initialize
	const_tm_ptr_type_node.

c-family:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	PR c++/71973
	* c.opt (-Wbuiltin-declaration-mismatch): New warning.
	* c-common.c (c_common_nodes_and_builtins): Initialize
	const_tm_ptr_type_node.

c:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	PR c++/71973
	* c-decl.c (diagnose_mismatched_decls): Use
	OPT_Wbuiltin_declaration_mismatch here too.

cp:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	PR c++/71973
	* decl.c (duplicate_decls): Warn when a built-in function is redefined.
	Don't overload builtin functions with C++ functions.
	Handle const_tm_ptr_type_node like file_ptr_node.
	Copy the TREE_NOTHROW flag unmodified to the old decl.

lto:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	PR c++/71973
	* lto-lang.c (lto_init): Assert const_tm_ptr_type_node is sane.

testsuite:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	PR c++/71973
	* g++.dg/pr71973-1.C: New test.
	* g++.dg/pr71973-2.C: New test.
	* g++.dg/pr71973-3.C: New test.
	* g++.dg/lto/pr68811_0.C: Add -w to first lto-options.
	* g++.dg/lookup/extern-c-redecl4.C: Adjust test expectations.
	* g++.old-deja/g++.mike/p700.C: Add -Wno-builtin-declaration-mismatch
	to dg-options.
	* g++.old-deja/g++.other/realloc.C: Likewise.
	* g++.old-deja/g++.other/builtins10.C: Adjust test expectations.

From-SVN: r242662

[gcc]

2016-11-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	PR tree-optimization/78413
	* tree-if-conv.c (versionable_outer_loop_p): Require that both
	inner and outer loop latches have single predecessors.

[gcc/testsuite]

2016-11-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	PR tree-optimization/78413
	* gcc.dg/tree-ssa/pr78413.c: New test.

From-SVN: r242661

re PR target/78093 ([avr] New variable attribute "absdata" and option "-mabsdata" to enable LDS / STS on Reduced Tiny)

	PR target/78093
	* config/avr/avr.c (avr_decl_maybe_lds_p): New static function.
	(avr_encode_section_info) [TARGET_ABSDATA && AVR_TINY]: Use it.

From-SVN: r242660

2016-11-21  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/testsuite/
    * gcc.target/arm/empty_fiq_handler.c: Skip if -mthumb is passed in and
    target is Thumb-only.

From-SVN: r242658

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* rtl.h: Adjust prototype.
	* rtlanal.c (dead_or_set_p): Change argument type to rtx_insn *.
	(dead_or_set_regno_p): Likewise.

From-SVN: r242657

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* rtl.h: Adjust prototype.
	* rtlanal.c (add_int_reg_note): Change argument type to rtx_insn *.

From-SVN: r242656

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* function.c (contains): Change argument type to rtx_insn *.
	(prologue_contains): Likewise.
	(epilogue_contains): Likewise.
	(prologue_epilogue_contains): Likewise.
	* function.h: Adjust prototype.

From-SVN: r242655

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* optabs.c (emit_libcall_block): Change argument type to
	rtx_insn *.
	* optabs.h: Adjust prototype.

From-SVN: r242654

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* cfgrtl.c (delete_insn): Change argument type to rtx_insn *.
	(fixup_reorder_chain): Adjust.
	* cfgrtl.h: Adjust prototype.

From-SVN: r242653

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* rtl.h: Adjust prototype.
	* rtlanal.c (replace_label_in_insn): Change argument type to
	rtx_insn *.

From-SVN: r242652

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* config/v850/v850.c (expand_prologue): Adjust.
	(expand_epilogue): Likewise.
	* expr.c (init_expr_target): Likewise.
	* genrecog.c (print_subroutine): Always make the argument type
	rtx_insn *.
	* recog.h: Adjust prototype.

From-SVN: r242651

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* config/aarch64/aarch64.c (aarch64_emit_unlikely_jump): split
	up variables to make some rtx_insn *.
	* config/alpha/alpha.c (emit_unlikely_jump): Likewise.
	* config/arc/arc.c: Likewise.
	* config/arm/arm.c: Likewise.
	* config/mn10300/mn10300.c (mn10300_legitimize_pic_address):
	Likewise.
	* config/rs6000/rs6000.c (rs6000_expand_split_stack_prologue):
	Likewise.
	* config/spu/spu.c (spu_emit_branch_hint): Likewise.

From-SVN: r242650

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* config/arm/arm.c (legitimize_pic_address): Change to use
	rtx_insn * as the type of variables.
	(arm_pic_static_addr): Likewise.
	(arm_emit_movpair): Likewise.
	* config/c6x/c6x.c (reorg_split_calls): Likewise.
	* config/darwin.c (machopic_legitimize_pic_address): Likewise.
	* config/frv/frv.c (frv_optimize_membar_local): Likewise.
	* config/frv/frv.md: Likewise.
	* config/i386/i386-protos.h: Likewise.
	* config/i386/i386.c (ix86_expand_split_stack_prologue):
	Likewise.
	(ix86_split_fp_branch): Likewise.
	(predict_jump): Likewise.
	* config/ia64/ia64.c: Likewise.
	* config/mcore/mcore.c: Likewise.
	* config/rs6000/rs6000.c (rs6000_legitimize_tls_address):
	Likewise.
	* config/s390/s390.c: Likewise.
	* config/s390/s390.md: Likewise.
	* config/spu/spu.md: Likewise.
	* config/tilegx/tilegx.c (tilegx_legitimize_tls_address):
	Likewise.
	* lower-subreg.c (resolve_simple_move): Likewise.

From-SVN: r242649