From-SVN: r267494

gcc/
	* cse.c (invalidate_reg): New function extracted from...
	(invalidate): ...here.
	(canonicalize_insn): Check for clobber high.
	(invalidate_from_clobbers): invalidate clobber highs.
	(invalidate_from_sets_and_clobbers): Likewise.
	(count_reg_usage): Check for clobber high.
	(insn_live_p): Likewise.
	* cselib.c (cselib_expand_value_rtx_1):Likewise.
	(cselib_invalidate_regno): Check for clobber in setter.
	(cselib_invalidate_rtx): Pass through setter.
	(cselib_invalidate_rtx_note_stores):
	(cselib_process_insn): Check for clobber high.
	* cselib.h (cselib_invalidate_rtx): Add operand.

From-SVN: r263330

This patch generalises various places that used hwi rtx accessors so
that they can handle poly_ints instead.  In many cases these changes
are by inspection rather than because something had shown them to be
necessary.

2018-06-12  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* poly-int.h (can_div_trunc_p): Add new overload in which all values
	are poly_ints.
	* alias.c (get_addr): Extend CONST_INT handling to poly_int_rtx_p.
	(memrefs_conflict_p): Likewise.
	(init_alias_analysis): Likewise.
	* cfgexpand.c (expand_debug_expr): Likewise.
	* combine.c (combine_simplify_rtx, force_int_to_mode): Likewise.
	* cse.c (fold_rtx): Likewise.
	* explow.c (adjust_stack, anti_adjust_stack): Likewise.
	* expr.c (emit_block_move_hints): Likewise.
	(clear_storage_hints, push_block, emit_push_insn): Likewise.
	(store_expr_with_bounds, reduce_to_bit_field_precision): Likewise.
	(emit_group_load_1): Use rtx_to_poly_int64 for group offsets.
	(emit_group_store): Likewise.
	(find_args_size_adjust): Use strip_offset.  Use rtx_to_poly_int64
	to read the PRE/POST_MODIFY increment.
	* calls.c (store_one_arg): Use strip_offset.
	* rtlanal.c (rtx_addr_can_trap_p_1): Extend CONST_INT handling to
	poly_int_rtx_p.
	(set_noop_p): Use rtx_to_poly_int64 for the elements selected
	by a VEC_SELECT.
	* simplify-rtx.c (avoid_constant_pool_reference): Use strip_offset.
	(simplify_binary_operation_1): Extend CONST_INT handling to
	poly_int_rtx_p.
	* var-tracking.c (compute_cfa_pointer): Take a poly_int64 rather
	than a HOST_WIDE_INT.
	(hard_frame_pointer_adjustment): Change from HOST_WIDE_INT to
	poly_int64.
	(adjust_mems, add_stores): Update accodingly.
	(vt_canonicalize_addr): Track polynomial offsets.
	(emit_note_insn_var_location): Likewise.
	(vt_add_function_parameter): Likewise.
	(vt_initialize): Likewise.

From-SVN: r261530

cse.c (try_back_substitute_reg): Move any REG_ARGS_SIZE note when successfully back substituting a reg.

	* cse.c (try_back_substitute_reg): Move any REG_ARGS_SIZE note when
	successfully back substituting a reg.

	* gcc.c-torture/compile/reg-args-size.c: New test.

From-SVN: r257598

This patch changes GET_MODE_SIZE from unsigned short to poly_uint16.
The non-mechanical parts were handled by previous patches.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* machmode.h (mode_size): Change from unsigned short to
	poly_uint16_pod.
	(mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
	(GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
	or if measurement_type is not polynomial.
	(fixed_size_mode::includes_p): Check for constant-sized modes.
	* genmodes.c (emit_mode_size_inline): Make mode_size_inline
	return a poly_uint16 rather than an unsigned short.
	(emit_mode_size): Change the type of mode_size from unsigned short
	to poly_uint16_pod.  Use ZERO_COEFFS for the initializer.
	(emit_mode_adjustments): Cope with polynomial vector sizes.
	* lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
	for GET_MODE_SIZE.
	* lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
	for GET_MODE_SIZE.
	* auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
	* builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
	* caller-save.c (setup_save_areas): Likewise.
	(replace_reg_with_saved_mem): Likewise.
	* calls.c (emit_library_call_value_1): Likewise.
	* combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
	* combine.c (simplify_set, make_extraction, simplify_shift_const_1)
	(gen_lowpart_for_combine): Likewise.
	* convert.c (convert_to_integer_1): Likewise.
	* cse.c (equiv_constant, cse_insn): Likewise.
	* cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
	(cselib_subst_to_values): Likewise.
	* dce.c (word_dce_process_block): Likewise.
	* df-problems.c (df_word_lr_mark_ref): Likewise.
	* dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
	* dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
	(concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
	(rtl_for_decl_location): Likewise.
	* emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
	* expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
	* expr.c (emit_group_load_1, clear_storage_hints): Likewise.
	(emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
	(expand_expr_real_1): Likewise.
	* function.c (assign_parm_setup_block_p, assign_parm_setup_block)
	(pad_below): Likewise.
	* gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
	* gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
	* ira.c (get_subreg_tracking_sizes): Likewise.
	* ira-build.c (ira_create_allocno_objects): Likewise.
	* ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
	(ira_sort_regnos_for_alter_reg): Likewise.
	* ira-costs.c (record_operand_costs): Likewise.
	* lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
	(resolve_simple_move): Likewise.
	* lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
	(process_addr_reg, simplify_operand_subreg, curr_insn_transform)
	(lra_constraints): Likewise.
	(CONST_POOL_OK_P): Reject variable-sized modes.
	* lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
	(add_pseudo_to_slot, lra_spill): Likewise.
	* omp-low.c (omp_clause_aligned_alignment): Likewise.
	* optabs-query.c (get_best_extraction_insn): Likewise.
	* optabs-tree.c (expand_vec_cond_expr_p): Likewise.
	* optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
	(expand_mult_highpart, valid_multiword_target_p): Likewise.
	* recog.c (offsettable_address_addr_space_p): Likewise.
	* regcprop.c (maybe_mode_change): Likewise.
	* reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
	* regrename.c (build_def_use): Likewise.
	* regstat.c (dump_reg_info): Likewise.
	* reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
	(find_reloads, find_reloads_subreg_address): Likewise.
	* reload1.c (eliminate_regs_1): Likewise.
	* rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
	* simplify-rtx.c (avoid_constant_pool_reference): Likewise.
	(simplify_binary_operation_1, simplify_subreg): Likewise.
	* targhooks.c (default_function_arg_padding): Likewise.
	(default_hard_regno_nregs, default_class_max_nregs): Likewise.
	* tree-cfg.c (verify_gimple_assign_binary): Likewise.
	(verify_gimple_assign_ternary): Likewise.
	* tree-inline.c (estimate_move_cost): Likewise.
	* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
	* tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
	(get_address_cost_ainc): Likewise.
	* tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
	(vect_supportable_dr_alignment): Likewise.
	* tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
	(vectorizable_reduction): Likewise.
	* tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
	(vectorizable_operation, vectorizable_load): Likewise.
	* tree.c (build_same_sized_truth_vector_type): Likewise.
	* valtrack.c (cleanup_auto_inc_dec): Likewise.
	* var-tracking.c (emit_note_insn_var_location): Likewise.
	* config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
	(ADDR_VEC_ALIGN): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r256201

This patch changes GET_MODE_PRECISION from an unsigned short
to a poly_uint16.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* machmode.h (mode_precision): Change from unsigned short to
	poly_uint16_pod.
	(mode_to_precision): Return a poly_uint16 rather than an unsigned
	short.
	(GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
	or if measurement_type is not polynomial.
	(HWI_COMPUTABLE_MODE_P): Turn into a function.  Optimize the case
	in which the mode is already known to be a scalar_int_mode.
	* genmodes.c (emit_mode_precision): Change the type of mode_precision
	from unsigned short to poly_uint16_pod.  Use ZERO_COEFFS for the
	initializer.
	* lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
	for GET_MODE_PRECISION.
	* lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
	for GET_MODE_PRECISION.
	* combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
	as polynomial.
	(try_combine, find_split_point, combine_simplify_rtx): Likewise.
	(expand_field_assignment, make_extraction): Likewise.
	(make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
	(get_last_value): Likewise.
	* convert.c (convert_to_integer_1): Likewise.
	* cse.c (cse_insn): Likewise.
	* expr.c (expand_expr_real_1): Likewise.
	* lra-constraints.c (simplify_operand_subreg): Likewise.
	* optabs-query.c (can_atomic_load_p): Likewise.
	* optabs.c (expand_atomic_load): Likewise.
	(expand_atomic_store): Likewise.
	* ree.c (combine_reaching_defs): Likewise.
	* rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
	* rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
	* tree.h (type_has_mode_precision_p): Likewise.
	* ubsan.c (instrument_si_overflow): Likewise.

gcc/ada/
	* gcc-interface/misc.c (enumerate_modes): Treat GET_MODE_PRECISION
	as polynomial.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r256198

This patch makes some pieces of code operate directly on the new
CONST_VECTOR encoding.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* cse.c (hash_rtx_cb): Hash only the encoded elements.
	* cselib.c (cselib_hash_rtx): Likewise.
	* expmed.c (make_tree): Build VECTOR_CSTs directly from the
	CONST_VECTOR encoding.

From-SVN: r256192

From-SVN: r256169

This patch changes SUBREG_BYTE from an int to a poly_int.
Since valid SUBREG_BYTEs must be contained within the mode of the
SUBREG_REG, the required range is the same as for GET_MODE_SIZE,
i.e. unsigned short.  The patch therefore uses poly_uint16(_pod)
for the SUBREG_BYTE.

Using poly_uint16_pod rtx fields requires a new field code ('p').
Since there are no other uses of 'p' besides SUBREG_BYTE, the patch
doesn't add an XPOLY or whatever; all uses should go via SUBREG_BYTE
instead.

The patch doesn't bother implementing 'p' support for legacy
define_peepholes, since none of the remaining ones have subregs
in their patterns.

As it happened, the rtl documentation used SUBREG as an example of a
code with mixed field types, accessed via XEXP (x, 0) and XINT (x, 1).
Since there's no direct replacement for XINT, and since people should
never use it even if there were, the patch changes the example to use
INT_LIST instead.

The patch also changes subreg-related helper functions so that they too
take and return polynomial offsets.  This makes the patch quite big, but
it's mostly mechanical.  The patch generally sticks to existing choices
wrt signedness.

2017-12-20  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* doc/rtl.texi: Update documentation of SUBREG_BYTE.  Document the
	'p' format code.  Use INT_LIST rather than SUBREG as the example of
	a code with an XINT and an XEXP.  Remove the implication that
	accessing an rtx field using XINT is expected to work.
	* rtl.def (SUBREG): Change format from "ei" to "ep".
	* rtl.h (rtunion::rt_subreg): New field.
	(XCSUBREG): New macro.
	(SUBREG_BYTE): Use it.
	(subreg_shape): Change offset from an unsigned int to a poly_uint16.
	Update constructor accordingly.
	(subreg_shape::operator ==): Update accordingly.
	(subreg_shape::unique_id): Return an unsigned HOST_WIDE_INT rather
	than an unsigned int.
	(subreg_lsb, subreg_lowpart_offset, subreg_highpart_offset): Return
	a poly_uint64 rather than an unsigned int.
	(subreg_lsb_1): Likewise.  Take the offset as a poly_uint64 rather
	than an unsigned int.
	(subreg_size_offset_from_lsb, subreg_size_lowpart_offset)
	(subreg_size_highpart_offset): Return a poly_uint64 rather than
	an unsigned int.  Take the sizes as poly_uint64s.
	(subreg_offset_from_lsb): Return a poly_uint64 rather than
	an unsigned int.  Take the shift as a poly_uint64 rather than
	an unsigned int.
	(subreg_regno_offset, subreg_offset_representable_p): Take the offset
	as a poly_uint64 rather than an unsigned int.
	(simplify_subreg_regno): Likewise.
	(byte_lowpart_offset): Return the memory offset as a poly_int64
	rather than an int.
	(subreg_memory_offset): Likewise.  Take the subreg offset as a
	poly_uint64 rather than an unsigned int.
	(simplify_subreg, simplify_gen_subreg, subreg_get_info)
	(gen_rtx_SUBREG, validate_subreg): Take the subreg offset as a
	poly_uint64 rather than an unsigned int.
	* rtl.c (rtx_format): Describe 'p' in comment.
	(copy_rtx, rtx_equal_p_cb, rtx_equal_p): Handle 'p'.
	* emit-rtl.c (validate_subreg, gen_rtx_SUBREG): Take the subreg
	offset as a poly_uint64 rather than an unsigned int.
	(byte_lowpart_offset): Return the memory offset as a poly_int64
	rather than an int.
	(subreg_memory_offset): Likewise.  Take the subreg offset as a
	poly_uint64 rather than an unsigned int.
	(subreg_size_lowpart_offset, subreg_size_highpart_offset): Take the
	mode sizes as poly_uint64s rather than unsigned ints.  Return a
	poly_uint64 rather than an unsigned int.
	(subreg_lowpart_p): Treat subreg offsets as poly_ints.
	(copy_insn_1): Handle 'p'.
	* rtlanal.c (set_noop_p): Treat subregs offsets as poly_uint64s.
	(subreg_lsb_1): Take the subreg offset as a poly_uint64 rather than
	an unsigned int.  Return the shift in the same way.
	(subreg_lsb): Return the shift as a poly_uint64 rather than an
	unsigned int.
	(subreg_size_offset_from_lsb): Take the sizes and shift as
	poly_uint64s rather than unsigned ints.  Return the offset as
	a poly_uint64.
	(subreg_get_info, subreg_regno_offset, subreg_offset_representable_p)
	(simplify_subreg_regno): Take the offset as a poly_uint64 rather than
	an unsigned int.
	* rtlhash.c (add_rtx): Handle 'p'.
	* genemit.c (gen_exp): Likewise.
	* gengenrtl.c (type_from_format, gendef): Likewise.
	* gensupport.c (subst_pattern_match, get_alternatives_number)
	(collect_insn_data, alter_predicate_for_insn, alter_constraints)
	(subst_dup): Likewise.
	* gengtype.c (adjust_field_rtx_def): Likewise.
	* genrecog.c (find_operand, find_matching_operand, validate_pattern)
	(match_pattern_2): Likewise.
	(rtx_test::SUBREG_FIELD): New rtx_test::kind_enum.
	(rtx_test::subreg_field): New function.
	(operator ==, safe_to_hoist_p, transition_parameter_type)
	(print_nonbool_test, print_test): Handle SUBREG_FIELD.
	* genattrtab.c (attr_rtx_1): Say that 'p' is deliberately not handled.
	* genpeep.c (match_rtx): Likewise.
	* print-rtl.c (print_poly_int): Include if GENERATOR_FILE too.
	(rtx_writer::print_rtx_operand): Handle 'p'.
	(print_value): Handle SUBREG.
	* read-rtl.c (apply_int_iterator): Likewise.
	(rtx_reader::read_rtx_operand): Handle 'p'.
	* alias.c (rtx_equal_for_memref_p): Likewise.
	* cselib.c (rtx_equal_for_cselib_1, cselib_hash_rtx): Likewise.
	* caller-save.c (replace_reg_with_saved_mem): Treat subreg offsets
	as poly_ints.
	* calls.c (expand_call): Likewise.
	* combine.c (combine_simplify_rtx, expand_field_assignment): Likewise.
	(make_extraction, gen_lowpart_for_combine): Likewise.
	* loop-invariant.c (hash_invariant_expr_1, invariant_expr_equal_p):
	Likewise.
	* cse.c (remove_invalid_subreg_refs): Take the offset as a poly_uint64
	rather than an unsigned int.  Treat subreg offsets as poly_ints.
	(exp_equiv_p): Handle 'p'.
	(hash_rtx_cb): Likewise.  Treat subreg offsets as poly_ints.
	(equiv_constant, cse_insn): Treat subreg offsets as poly_ints.
	* dse.c (find_shift_sequence): Likewise.
	* dwarf2out.c (rtl_for_decl_location): Likewise.
	* expmed.c (extract_low_bits): Likewise.
	* expr.c (emit_group_store, undefined_operand_subword_p): Likewise.
	(expand_expr_real_2): Likewise.
	* final.c (alter_subreg): Likewise.
	(leaf_renumber_regs_insn): Handle 'p'.
	* function.c (assign_parm_find_stack_rtl, assign_parm_setup_stack):
	Treat subreg offsets as poly_ints.
	* fwprop.c (forward_propagate_and_simplify): Likewise.
	* ifcvt.c (noce_emit_move_insn, noce_emit_cmove): Likewise.
	* ira.c (get_subreg_tracking_sizes): Likewise.
	* ira-conflicts.c (go_through_subreg): Likewise.
	* ira-lives.c (process_single_reg_class_operands): Likewise.
	* jump.c (rtx_renumbered_equal_p): Likewise.  Handle 'p'.
	* lower-subreg.c (simplify_subreg_concatn): Take the subreg offset
	as a poly_uint64 rather than an unsigned int.
	(simplify_gen_subreg_concatn, resolve_simple_move): Treat
	subreg offsets as poly_ints.
	* lra-constraints.c (operands_match_p): Handle 'p'.
	(match_reload, curr_insn_transform): Treat subreg offsets as poly_ints.
	* lra-spills.c (assign_mem_slot): Likewise.
	* postreload.c (move2add_valid_value_p): Likewise.
	* recog.c (general_operand, indirect_operand): Likewise.
	* regcprop.c (copy_value, maybe_mode_change): Likewise.
	(copyprop_hardreg_forward_1): Likewise.
	* reginfo.c (simplifiable_subregs_hasher::hash, simplifiable_subregs)
	(record_subregs_of_mode): Likewise.
	* rtlhooks.c (gen_lowpart_general, gen_lowpart_if_possible): Likewise.
	* reload.c (operands_match_p): Handle 'p'.
	(find_reloads_subreg_address): Treat subreg offsets as poly_ints.
	* reload1.c (alter_reg, choose_reload_regs): Likewise.
	(compute_reload_subreg_offset): Likewise, and return an poly_int64.
	* simplify-rtx.c (simplify_truncation, simplify_binary_operation_1):
	(test_vector_ops_duplicate): Treat subreg offsets as poly_ints.
	(simplify_const_poly_int_tests<N>::run): Likewise.
	(simplify_subreg, simplify_gen_subreg): Take the subreg offset as
	a poly_uint64 rather than an unsigned int.
	* valtrack.c (debug_lowpart_subreg): Likewise.
	* var-tracking.c (var_lowpart): Likewise.
	(loc_cmp): Handle 'p'.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r255882

This patch adds an rtl representation of poly_int values.
There were three possible ways of doing this:

(1) Add a new rtl code for the poly_ints themselves and store the
    coefficients as trailing wide_ints.  This would give constants like:

      (const_poly_int [c0 c1 ... cn])

    The runtime value would be:

      c0 + c1 * x1 + ... + cn * xn

(2) Like (1), but use rtxes for the coefficients.  This would give
    constants like:

      (const_poly_int [(const_int c0)
                       (const_int c1)
                       ...
                       (const_int cn)])

    although the coefficients could be const_wide_ints instead
    of const_ints where appropriate.

(3) Add a new rtl code for the polynomial indeterminates,
    then use them in const wrappers.  A constant like c0 + c1 * x1
    would then look like:

      (const:M (plus:M (mult:M (const_param:M x1)
                               (const_int c1))
                       (const_int c0)))

There didn't seem to be that much to choose between them.  The main
advantage of (1) is that it's a more efficient representation and
that we can refer to the cofficients directly as wide_int_storage.

2017-12-20  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* doc/rtl.texi (const_poly_int): Document.  Also document the
	rtl sharing behavior.
	* gengenrtl.c (excluded_rtx): Return true for CONST_POLY_INT.
	* rtl.h (const_poly_int_def): New struct.
	(rtx_def::u): Add a cpi field.
	(CASE_CONST_UNIQUE, CASE_CONST_ANY): Add CONST_POLY_INT.
	(CONST_POLY_INT_P, CONST_POLY_INT_COEFFS): New macros.
	(wi::rtx_to_poly_wide_ref): New typedef
	(const_poly_int_value, wi::to_poly_wide, rtx_to_poly_int64)
	(poly_int_rtx_p): New functions.
	(trunc_int_for_mode): Declare a poly_int64 version.
	(plus_constant): Take a poly_int64 instead of a HOST_WIDE_INT.
	(immed_wide_int_const): Take a poly_wide_int_ref rather than
	a wide_int_ref.
	(strip_offset): Declare.
	(strip_offset_and_add): New function.
	* rtl.def (CONST_POLY_INT): New rtx code.
	* rtl.c (rtx_size): Handle CONST_POLY_INT.
	(shared_const_p): Use poly_int_rtx_p.
	* emit-rtl.h (gen_int_mode): Take a poly_int64 instead of a
	HOST_WIDE_INT.
	(gen_int_shift_amount): Likewise.
	* emit-rtl.c (const_poly_int_hasher): New class.
	(const_poly_int_htab): New variable.
	(init_emit_once): Initialize it when NUM_POLY_INT_COEFFS > 1.
	(const_poly_int_hasher::hash): New function.
	(const_poly_int_hasher::equal): Likewise.
	(gen_int_mode): Take a poly_int64 instead of a HOST_WIDE_INT.
	(immed_wide_int_const): Rename to...
	(immed_wide_int_const_1): ...this and make static.
	(immed_wide_int_const): New function, taking a poly_wide_int_ref
	instead of a wide_int_ref.
	(gen_int_shift_amount): Take a poly_int64 instead of a HOST_WIDE_INT.
	(gen_lowpart_common): Handle CONST_POLY_INT.
	* cse.c (hash_rtx_cb, equiv_constant): Likewise.
	* cselib.c (cselib_hash_rtx): Likewise.
	* dwarf2out.c (const_ok_for_output_1): Likewise.
	* expr.c (convert_modes): Likewise.
	* print-rtl.c (rtx_writer::print_rtx, print_value): Likewise.
	* rtlhash.c (add_rtx): Likewise.
	* explow.c (trunc_int_for_mode): Add a poly_int64 version.
	(plus_constant): Take a poly_int64 instead of a HOST_WIDE_INT.
	Handle existing CONST_POLY_INT rtxes.
	* expmed.h (expand_shift): Take a poly_int64 instead of a
	HOST_WIDE_INT.
	* expmed.c (expand_shift): Likewise.
	* rtlanal.c (strip_offset): New function.
	(commutative_operand_precedence): Give CONST_POLY_INT the same
	precedence as CONST_DOUBLE and put CONST_WIDE_INT between that
	and CONST_INT.
	* rtl-tests.c (const_poly_int_tests): New struct.
	(rtl_tests_c_tests): Use it.
	* simplify-rtx.c (simplify_const_unary_operation): Handle
	CONST_POLY_INT.
	(simplify_const_binary_operation): Likewise.
	(simplify_binary_operation_1): Fold additions of symbolic constants
	and CONST_POLY_INTs.
	(simplify_subreg): Handle extensions and truncations of
	CONST_POLY_INTs.
	(simplify_const_poly_int_tests): New struct.
	(simplify_rtx_c_tests): Use it.
	* wide-int.h (storage_ref): Add default constructor.
	(wide_int_ref_storage): Likewise.
	(trailing_wide_ints): Use GTY((user)).
	(trailing_wide_ints::operator[]): Add a const version.
	(trailing_wide_ints::get_precision): New function.
	(trailing_wide_ints::extra_size): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r255862

This patch adds a helper routine that constructs rtxes
for constant shift amounts, given the mode of the value
being shifted.  As well as helping with the SVE patches, this
is one step towards allowing CONST_INTs to have a real mode.

One long-standing problem has been to decide what the mode
of a shift count should be for arbitrary rtxes (as opposed to those
directly tied to a target pattern).  Realistic choices would be
the mode of the shifted elements, word_mode, QImode, a 64-bit mode,
or the same mode as the shift optabs (in which case what should the
mode be when the target doesn't have a pattern?)

For now the patch picks a 64-bit mode, but with a ??? comment.

2017-12-20  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* emit-rtl.h (gen_int_shift_amount): Declare.
	* emit-rtl.c (gen_int_shift_amount): New function.
	* asan.c (asan_emit_stack_protection): Use gen_int_shift_amount
	instead of GEN_INT.
	* calls.c (shift_return_value): Likewise.
	* cse.c (fold_rtx): Likewise.
	* dse.c (find_shift_sequence): Likewise.
	* expmed.c (init_expmed_one_mode, store_bit_field_1, expand_shift_1)
	(expand_shift, expand_smod_pow2): Likewise.
	* lower-subreg.c (shift_cost): Likewise.
	* optabs.c (expand_superword_shift, expand_doubleword_mult)
	(expand_unop, expand_binop, shift_amt_for_vec_perm_mask)
	(expand_vec_perm_var): Likewise.
	* simplify-rtx.c (simplify_unary_operation_1): Likewise.
	(simplify_binary_operation_1): Likewise.
	* combine.c (try_combine, find_split_point, force_int_to_mode)
	(simplify_shift_const_1, simplify_shift_const): Likewise.
	(change_zero_ext): Likewise.  Use simplify_gen_binary.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r255861

From-SVN: r255746

This patch adds a helper routine that constructs rtxes
for constant shift amounts, given the mode of the value
being shifted.  As well as helping with the SVE patches, this
is one step towards allowing CONST_INTs to have a real mode.

One long-standing problem has been to decide what the mode
of a shift count should be for arbitrary rtxes (as opposed to those
directly tied to a target pattern).  Realistic choices would be
the mode of the shifted elements, word_mode, QImode, or the same
mode as the shift optabs (in which case what should the mode
be when the target doesn't have a pattern?)

For now the patch picks the mode of the shifted elements,
but with a ??? comment.

2017-11-06  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* emit-rtl.h (gen_int_shift_amount): Declare.
	* emit-rtl.c (gen_int_shift_amount): New function.
	* asan.c (asan_emit_stack_protection): Use gen_int_shift_amount
	instead of GEN_INT.
	* calls.c (shift_return_value): Likewise.
	* cse.c (fold_rtx): Likewise.
	* dse.c (find_shift_sequence): Likewise.
	* expmed.c (init_expmed_one_mode, store_bit_field_1, expand_shift_1)
	(expand_shift, expand_smod_pow2): Likewise.
	* lower-subreg.c (shift_cost): Likewise.
	* optabs.c (expand_superword_shift, expand_doubleword_mult)
	(expand_unop, expand_binop, shift_amt_for_vec_perm_mask)
	(expand_vec_perm_var): Likewise.
	* simplify-rtx.c (simplify_unary_operation_1): Likewise.
	(simplify_binary_operation_1): Likewise.
	* combine.c (try_combine, find_split_point, force_int_to_mode)
	(simplify_shift_const_1, simplify_shift_const): Likewise.
	(change_zero_ext): Likewise.  Use simplify_gen_binary.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r255745

This patch completes the infrastructure for the introduction of
statement frontiers in C-family languages.

It brings in all the code remaining code needed to introduce and
transform begin stmt trees, gimple stmts, insns and notes, and
ultimately use them to generate the is_stmt column in DWARF2+ line
number tables/programs, however none of it is activated: the option
that would do so will be introduced in a subsequent patch.

This patch depends on an earlier patch with not-quite-boilerplate
changes towards SFN.

for  gcc/c-family/ChangeLog

	* c-semantics.c (pop_stmt_list): Move begin stmt marker into
	subsequent statement list.

for  gcc/c/ChangeLog

	* c-objc-common.h (LANG_HOOKS_EMITS_BEGIN_STMT): Redefine as true.
	* c-parser.c (add_debug_begin_stmt): New.
	(c_parser_declaration_or_fndef): Call it.
	(c_parser_compound_statement_nostart): Likewise.
	(c_parser_statement_after_labels): Likewise.
	* c-typeck (c_finish_stmt_expr): Skip begin stmts markers.

for  gcc/cp/ChangeLog

	* constexpr.c (check_constexpr_ctor_body_1): Skip begin stmt
	markers.
	(constexpr_fn_retval): Likewise.
	(potential_constant_expression_1): Likewise.
	(cxx_eval_statement_list): Check that a begin stmt marker is
	not used as the value of a statement list.
	(cxx_eval_constant_expression): Return begin stmt markers
	unchanged.
	* cp-array-notation.c (stmt_location): New.
	(cp_expand_cond_array_notations): Use it.
	* cp-objcp-common.h (LANG_HOOKS_EMITS_BEGIN_STMT): Redefine as true.
	* parser.c (add_debug_begin_stmt): New.
	(cp_parser_statement): Call it.
	* pt.c (tsubst_copy): Handle begin stmt markers.

for  gcc/ChangeLog

	* cfgexpand.c (expand_gimple_basic_block): Handle begin stmt
	markers.  Integrate source bind into debug stmt expand loop.
	(pass_expand::execute): Check debug marker limit.  Avoid deep
	TER and expand debug locations for debug bind insns only.
	* cse.c (insn_live_p): Keep nonbind markers and debug bindings
	followed by them.
	* df-scan.c (df_insn_delete): Accept out-of-block debug insn.
	* final.c (reemit_insn_block_notes): Take current block from
	nonbind markers.  Declare note where it's first set.
	(final_scan_insn): Handle begin stmt notes.  Emit is_stmt according to
	begin stmt markers if enabled.
	(notice_source_line): Handle nonbind markers.  Fail if their
	location is unknown or that of builtins.
	(rest_of_handle_final): Convert begin stmt markers to notes if
	var-tracking didn't run.
	(rest_of_clean_state): Skip begin stmt markers.
	* gimple-pretty-print.c (dump_gimple_debug): Handle begin stmt
	markers.
	* function.c (allocate_struct_function): Set begin_stmt_markers.
	* function.h (struct function): Add debug_marker_count counter
	and debug_nonbind_markers flag.
	* gimple-iterator.c (gsi_remove): Adjust debug_marker_count.
	* gimple-low.c (lower_function_body): Adjust
	debug_nonbind_markers.
	(lower_stmt): Drop or skip gimple debug stmts.
	(lower_try_catch): Skip debug stmts.
	* gimple.c (gimple_build_debug_begin_stmt): New.
	(gimple_copy): Increment debug_marker_count if copying one.
	* gimple.h (gimple_build_debug_begin_stmt): Declare.
	* gimplify.c (rexpr_location): New.
	(rexpr_has_location): New.
	(warn_switch_unreachable_r): Handle gimple debug stmts.
	(shortcut_cond_r): Call expr_location.
	(find_goto): New.
	(find_goto_label): New.
	(shortcut_cond_expr): Call expr_has_location, expr_location, and
	find_goto_label.
	(gimplify_cond_expr): Call find_goto_label, expr_has_location, and
	expr_location.
	(gimplify_expr): Handle begin stmt markers.  Reject debug expr decls.
	* langhooks-def.h (LANG_HOOKS_EMITS_BEGIN_STMT): New.  Add to...
	(LANG_HOOKS_INITIALIZER): ... this.
	* langhooks.h (struct lang_hooks): Add emits_begin_stmt.
	* lra-contraints.c (inherit_reload_reg): Tolerate between-blocks
	debug insns.
	(update_ebb_live_info): Skip debug insn markers.
	* lra.c (debug_insn_static_data): Rename to...
	(debug_bind_static_data): ... this.
	(debug_marker_static_data): New.
	(lra_set_insn_recog_data): Select one of the above depending
	on debug insn kind.
	(lra_update_isn_regno_info): Don't assume debug insns have
	freqs.
	(push_insns): Skip debug insns.
	* lto-streamer-in.c (input_function): Drop debug stmts
	depending on active options.  Adjust debug_nonbind_markers.
	* params.def (PARAM_MAX_DEBUG_MARKER_COUNT): New.
	* print-rtl.c (rtx_writer::print_rtx_operand_code_0): Handle
	begin stmt marker notes.
	(print_insn): Likewise.
	* recog.c (extract_insn): Recognize rtl for debug markers.
	* rtl.def (DEBUG_MARKER): New.
	* tree-inline.c: Include params.h.
	(remap_gimple_stmt): Handle nonbind markers.
	(maybe_move_debug_stmts_to_successors): Likewise.
	(copy_debug_stmt): Likewise.
	* tree-iterator.c (append_to_statement_list_1): Append begin stmt
	markers regardless of no side effects.
	(tsi_link_before): Don't update container's side effects when adding
	a begin stmt marker.
	(tsi_link_after): Likewise.
	(expr_first): Skip begin stmt markers.
	(expr_last): Likewise.
	* tree-pretty-print (dump_generic_node): Handle begin stmt markers.
	* tree-ssa-threadedge.c (propagate_threaded_block_debug_info):
	Disregard nonbind markers.
	* tree.c (make_node_stat): Don't set side effects for begin stmt
	markers.
	(build1_stat): Likewise.
	* tree.def (DEBUG_BEGIN_STMT): New.
	* tree.h (GOTO_DESTINATION): Require a GOTO_EXPR.
	* var-tracking.c (delete_debug_insns): Renamed to...
	(delete_vta_debug_insns): ... this.
	(reemit_marker_as_note): New.
	(vt_initialize): Reemit markers.
	(delete_vta_debug_insns): Likewise.
	(vt_debug_insns_local): Reemit or delete markers.
	(variable_tracking_main_1): Likewise.
	* doc/generic.texi (DEBUG_BEGIN_STMT): Document.
	* doc/gimple.texi (gimple_debug_begin_stmt_p): New.
	(gimple_debug_nonbind_marker_p): New.
	(gimple_build_debug_bind): Adjust.
	(gimple_build_debug_begin_stmt): New.
	* doc/invoke.texi (max-debug-marker-count): New param.
	* doc/rtl.texi (debug_implicit_ptr, entry_value): New.
	(debug_parameter_ref, debug_marker): New.
	(NOTE_INSN_BEGIN_STMT): New.
	(DEBUG_INSN): Describe begin stmt markers.

From-SVN: r255568

This patch introduces a number of new macros and functions that will
be used to distinguish between different kinds of debug stmts, insns
and notes, namely, preexisting debug bind ones and to-be-introduced
nonbind markers.

In a seemingly mechanical way, it adjusts several uses of the macros
and functions, so that they refer to narrower categories when
appropriate.

These changes, by themselves, should not have any visible effect in
the compiler behavior, since the upcoming debug markers are never
created with this patch alone.

for  gcc/ChangeLog

	* gimple.h (enum gimple_debug_subcode): Add
	GIMPLE_DEBUG_BEGIN_STMT.
	(gimple_debug_begin_stmt_p): New.
	(gimple_debug_nonbind_marker_p): New.
	* tree.h (MAY_HAVE_DEBUG_MARKER_STMTS): New.
	(MAY_HAVE_DEBUG_BIND_STMTS): Renamed from....
	(MAY_HAVE_DEBUG_STMTS): ... this.  Check both.
	* insn-notes.def (BEGIN_STMT): New.
	* rtl.h (MAY_HAVE_DEBUG_MARKER_INSNS): New.
	(MAY_HAVE_DEBUG_BIND_INSNS): Renamed from....
	(MAY_HAVE_DEBUG_INSNS): ... this.  Check both.
	(NOTE_MARKER_LOCATION, NOTE_MARKER_P): New.
	(DEBUG_BIND_INSN_P, DEBUG_MARKER_INSN_P): New.
	(INSN_DEBUG_MARKER_KIND): New.
	(GEN_RTX_DEBUG_MARKER_BEGIN_STMT_PAT): New.
	(INSN_VAR_LOCATION): Check for VAR_LOCATION.
	(INSN_VAR_LOCATION_PTR): New.
	* cfgexpand.c (expand_debug_locations): Handle debug bind insns
	only.
	(expand_gimple_basic_block): Likewise.  Emit debug temps for TER
	deps only if debug bind insns are enabled.
	(pass_expand::execute): Avoid deep TER and expand
	debug locations for debug bind insns only.
	* cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Narrow
	debug stmts special handling down to debug bind stmts.
	* combine.c (try_combine): Narrow debug insns special handling
	down to debug bind insns.
	* cse.c (delete_trivially_dead_insns): Handle debug bindings.
	Narrow debug insns preexisting special handling down to debug
	bind insns.
	* dce.c (rest_of_handle_ud_dce): Narrow debug insns special
	handling down to debug bind insns.
	* function.c (instantiate_virtual_regs): Skip debug markers,
	adjust handling of debug binds.
	* gimple-ssa-backprop.c (backprop::prepare_change): Try debug
	temp insertion iff MAY_HAVE_DEBUG_BIND_STMTS.
	* haifa-sched.c (schedule_insn): Narrow special handling of debug
	insns to debug bind insns.
	* ipa-param-manipulation.c (ipa_modify_call_arguments): Narrow
	special handling of debug stmts to debug bind stmts.
	* ipa-split.c (split_function): Likewise.
	* ira.c (combine_and_move_insns): Adjust debug bind insns only.
	* loop-unroll.c (apply_opt_in_copies): Adjust tests on bind
	debug insns.
	* reg-stack.c (convert_regs_1): Use DEBUG_BIND_INSN_P.
	* regrename.c (build_def_use): Likewise.
	* regcprop.c (copyprop_hardreg_forward_1): Likewise.
	(pass_cprop_hardreg): Narrow special casing of debug insns to
	debug bind insns.
	* regstat.c (regstat_init_n_sets_and_refs): Likewise.
	* reload1.c (reload): Likewise.
	* sese.c (sese_insert_phis_for_liveouts): Narrow special
	casing of debug stmts to debug bind stmts.
	* shrink-wrap.c (move_insn_for_shrink_wrap): Likewise.
	* ssa-iterators.h (num_imm_uses): Likewise.
	* tree-cfg.c (gimple_merge_blocks): Narrow special casing of
	debug stmts to debug bind stmts.
	* tree-inline.c	(tree_function_versioning): Narrow special casing
	of debug stmts to debug bind stmts.
	* tree-loop-distribution.c (generate_loops_for_partition):
	Narrow special casing of debug stmts to debug bind stmts.
	* tree-sra.c (analyze_access_subtree): Narrow special casing
	of debug stmts to debug bind stmts.
	* tree-ssa-dce.c (remove_dead_stmt): Narrow special casing of debug
	stmts to debug bind stmts.
	* tree-ssa-loop-ivopt.c (remove_unused_ivs): Narrow special
	casing of debug stmts to debug bind stmts.
	* tree-ssa-reassoc.c (reassoc_remove_stmt): Likewise.
	* tree-ssa-tail-merge.c (tail_merge_optimize): Narrow special
	casing of debug stmts to debug bind stmts.
	* tree-ssa-threadedge.c (propagate_threaded_block_debug_info):
	Likewise.
	* tree-ssa.c (flush_pending_stmts): Narrow special casing of
	debug stmts to debug bind stmts.
	(gimple_replace_ssa_lhs): Likewise.
	(insert_debug_temp_for_var_def): Likewise.
	(insert_debug_temps_for_defs): Likewise.
	(reset_debug_uses): Likewise.
	* tree-ssanames.c (release_ssa_name_fn): Likewise.
	* tree-vect-loop-manip.c (adjust_debug_stmts_now): Likewise.
	(adjust_debug_stmts): Likewise.
	(adjust_phi_and_debug_stmts): Likewise.
	(vect_do_peeling): Likewise.
	* tree-vect-loop.c (vect_transform_loop): Likewise.
	* valtrack.c (propagate_for_debug): Use BIND_DEBUG_INSN_P.
	* var-tracking.c (adjust_mems): Narrow special casing of debug
	insns to debug bind insns.
	(dv_onepart_p, dataflow_set_clar_at_call, use_type): Likewise.
	(compute_bb_dataflow, vt_find_locations): Likewise.
	(vt_expand_loc, emit_notes_for_changes): Likewise.
	(vt_init_cfa_base): Likewise.
	(vt_emit_notes): Likewise.
	(vt_initialize): Likewise.
	(vt_finalize): Likewise.

From-SVN: r255565

This patch is like the earlier GET_MODE_UNIT_SIZE one,
but for precisions rather than sizes.  There is one behavioural
change in expand_debug_expr: we shouldn't use lowpart subregs
for non-scalar truncations, since that would just reinterpret
some of the scalars and drop the rest.  (This probably doesn't
trigger in practice.)  Using TRUNCATE is fine for scalars,
since simplify_gen_unary knows when a subreg can be used.

2017-10-22  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* cfgexpand.c (expand_debug_expr): Use GET_MODE_UNIT_PRECISION.
	(expand_debug_source_expr): Likewise.
	* combine.c (combine_simplify_rtx): Likewise.
	* cse.c (fold_rtx): Likewise.
	* optabs.c (expand_float): Likewise.
	* simplify-rtx.c (simplify_unary_operation_1): Likewise.
	(simplify_binary_operation_1): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r253991

This patch is like the previous GET_MODE_UNIT_SIZE one,
but for bit rather than byte sizes.

2017-10-13  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* cfgexpand.c (expand_debug_expr): Use GET_MODE_UNIT_BITSIZE.
	(expand_debug_source_expr): Likewise.
	* combine.c (combine_simplify_rtx): Likewise.
	* cse.c (fold_rtx): Likewise.
	* fwprop.c (canonicalize_address): Likewise.
	* targhooks.c (default_shift_truncation_mask): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r253716

This patch uses subreg_lowpart_offset in places that open-coded
the calculation.  It also uses it in regcprop.c to test whether,
after a mode change, the first register in a multi-register group
is still the right one.

2017-10-13  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* calls.c (expand_call): Use subreg_lowpart_offset.
	* cse.c (cse_insn): Likewise.
	* regcprop.c (copy_value): Likewise.
	(copyprop_hardreg_forward_1): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r253713

This patch adds a partial_subreg_p predicate to go alongside
paradoxical_subreg_p.

Like the paradoxical_subreg_p patch, this one replaces some tests that
were based on GET_MODE_SIZE rather than GET_MODE_PRECISION.  In each
case the change should be a no-op or an improvement.

The regcprop.c patch prevents some replacements of the 82-bit RFmode
with the 80-bit XFmode on ia64.  I don't understand the target details
here particularly well, but from the way the modes are described in
ia64-modes.def, it isn't valid to assume that an XFmode can carry an
RFmode payload.  A comparison of the testsuite assembly output for one
target per CPU showed no other differences.

Some of the places changed here are tracking the widest access mode
found for a register.  The series tries to standardise on:

  if (partial_subreg_p (widest_seen, new_mode))
    widest_seen = new_mode;

rather than:

  if (paradoxical_subreg_p (new_mode, widest_seen))
    widest_seen = new_mode;

Either would have been OK.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* rtl.h (partial_subreg_p): New function.
	* caller-save.c (save_call_clobbered_regs): Use it.
	* calls.c (expand_call): Likewise.
	* combine.c (combinable_i3pat): Likewise.
	(simplify_set): Likewise.
	(make_extraction): Likewise.
	(make_compound_operation_int): Likewise.
	(gen_lowpart_or_truncate): Likewise.
	(force_to_mode): Likewise.
	(make_field_assignment): Likewise.
	(reg_truncated_to_mode): Likewise.
	(record_truncated_value): Likewise.
	(move_deaths): Likewise.
	* cse.c (record_jump_cond): Likewise.
	(cse_insn): Likewise.
	* cselib.c (cselib_lookup_1): Likewise.
	* expmed.c (extract_bit_field_using_extv): Likewise.
	* function.c (assign_parm_setup_reg): Likewise.
	* ifcvt.c (noce_convert_multiple_sets): Likewise.
	* ira-build.c (create_insn_allocnos): Likewise.
	* lra-coalesce.c (merge_pseudos): Likewise.
	* lra-constraints.c (match_reload): Likewise.
	(simplify_operand_subreg): Likewise.
	(curr_insn_transform): Likewise.
	* lra-lives.c (process_bb_lives): Likewise.
	* lra.c (new_insn_reg): Likewise.
	(lra_substitute_pseudo): Likewise.
	* regcprop.c (mode_change_ok): Likewise.
	(maybe_mode_change): Likewise.
	(copyprop_hardreg_forward_1): Likewise.
	* reload.c (push_reload): Likewise.
	(find_reloads): Likewise.
	(find_reloads_subreg_address): Likewise.
	* reload1.c (alter_reg): Likewise.
	(eliminate_regs_1): Likewise.
	* simplify-rtx.c (simplify_unary_operation_1): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r251536

This patch uses opt_scalar_int_mode rather than machine_mode
when iterating over scalar_int_modes, in cases where that helps
with future patches.  (Using machine_mode is still OK in places
that don't really care about the mode being a scalar integer.)

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* cse.c (cse_insn): Use opt_scalar_int_mode for the mode iterator.
	* explow.c (hard_function_value): Likewise.
	* expmed.c (extract_fixed_bit_field_1): Likewise.  Move the
	convert_to_mode call outside the loop.
	* expr.c (alignment_for_piecewise_move): Use opt_scalar_int_mode
	for the mode iterator.  Require the mode specified by max_pieces
	to exist.
	(emit_block_move_via_movmem): Use opt_scalar_int_mode for the
	mode iterator.
	(copy_blkmode_to_reg): Likewise.
	(set_storage_via_setmem): Likewise.
	* optabs.c (prepare_cmp_insn): Likewise.
	* rtlanal.c (init_num_sign_bit_copies_in_rep): Likewise.
	* stor-layout.c (finish_bitfield_representative): Likewise.

gcc/fortran/
	* trans-types.c (gfc_init_kinds): Use opt_scalar_int_mode for
	the mode iterator.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r251503

This patch adds asserting as_a <scalar_int_mode> conversions
to contexts in which the input is known to be a scalar integer mode.

In expand_divmod, op1 is always a scalar_int_mode if
op1_is_constant (but might not be otherwise).

In expand_binop, the patch reverses a < comparison in order to
avoid splitting a long line.

gcc/
2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

	* cfgexpand.c (convert_debug_memory_address): Use
	as_a <scalar_int_mode>.
	* combine.c (expand_compound_operation): Likewise.
	(make_extraction): Likewise.
	(change_zero_ext): Likewise.
	(simplify_comparison): Likewise.
	* cse.c (cse_insn): Likewise.
	* dwarf2out.c (minmax_loc_descriptor): Likewise.
	(mem_loc_descriptor): Likewise.
	(loc_descriptor): Likewise.
	* expmed.c (init_expmed_one_mode): Likewise.
	(synth_mult): Likewise.
	(emit_store_flag_1): Likewise.
	(expand_divmod): Likewise.  Use HWI_COMPUTABLE_MODE_P instead
	of a comparison with size.
	* expr.c (expand_assignment): Use as_a <scalar_int_mode>.
	(reduce_to_bit_field_precision): Likewise.
	* function.c (expand_function_end): Likewise.
	* internal-fn.c (expand_arith_overflow_result_store): Likewise.
	* loop-doloop.c (doloop_modify): Likewise.
	* optabs.c (expand_binop): Likewise.
	(expand_unop): Likewise.
	(expand_copysign_absneg): Likewise.
	(prepare_cmp_insn): Likewise.
	(maybe_legitimize_operand): Likewise.
	* recog.c (const_scalar_int_operand): Likewise.
	* rtlanal.c (get_address_mode): Likewise.
	* simplify-rtx.c (simplify_unary_operation_1): Likewise.
	(simplify_cond_clz_ctz): Likewise.
	* tree-nested.c (get_nl_goto_field): Likewise.
	* tree.c (build_vector_type_for_mode): Likewise.
	* var-tracking.c (use_narrower_mode): Likewise.

gcc/c-family/
2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

	* c-common.c (c_common_type_for_mode): Use as_a <scalar_int_mode>.

gcc/lto/
2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

	* lto-lang.c (lto_type_for_mode): Use as_a <scalar_int_mode>.

From-SVN: r251487

This patch adds is_a <scalar_int_mode> checks to various places
that were explicitly or implicitly restricted to integers already,
in cases where adding an explicit is_a <scalar_int_mode> is useful
for later patches.

In simplify_if_then_else, the:

  GET_MODE (XEXP (XEXP (t, 0), N))

expressions were equivalent to:

  GET_MODE (XEXP (t, 0))

due to the type of operation.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* combine.c (sign_extend_short_imm): Add is_a <scalar_int_mode>
	checks.
	(try_combine): Likewise.
	(simplify_if_then_else): Likewise.
	* cse.c (cse_insn): Likewise.
	* dwarf2out.c (mem_loc_descriptor): Likewise.
	* emit-rtl.c (gen_lowpart_common): Likewise.
	* simplify-rtx.c (simplify_truncation): Likewise.
	(simplify_binary_operation_1): Likewise.
	(simplify_const_relational_operation): Likewise.
	(simplify_ternary_operation): Likewise.
	* tree-ssa-loop-ivopts.c (force_expr_to_var_cost): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r251480

This patch adds is_a <scalar_int_mode> checks before load_extend_op/
LOAD_EXTEND_OP calls, if that becomes useful for later patches.
(load_extend_op will return UNKNOWN for any other type of mode.)

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* cse.c (cse_insn): Add is_a <scalar_int_mode> checks.
	* reload.c (push_reload): Likewise.
	(find_reloads): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r251479

Replace checks of "GET_MODE_CLASS (...) == MODE_INT" with
"is_int_mode (..., &var)", in cases where it becomes useful
to refer to the mode as a scalar_int_mode.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* machmode.h (is_int_mode): New fuction.
	* combine.c (find_split_point): Use it.
	(combine_simplify_rtx): Likewise.
	(simplify_if_then_else): Likewise.
	(simplify_set): Likewise.
	(simplify_shift_const_1): Likewise.
	(simplify_comparison): Likewise.
	* config/aarch64/aarch64.c (aarch64_rtx_costs): Likewise.
	* cse.c (notreg_cost): Likewise.
	(cse_insn): Likewise.
	* cselib.c (cselib_lookup_1): Likewise.
	* dojump.c (do_jump_1): Likewise.
	(do_compare_rtx_and_jump): Likewise.
	* dse.c (get_call_args): Likewise.
	* dwarf2out.c (rtl_for_decl_init): Likewise.
	(native_encode_initializer): Likewise.
	* expmed.c (emit_store_flag_1): Likewise.
	(emit_store_flag): Likewise.
	* expr.c (convert_modes): Likewise.
	(store_field): Likewise.
	(expand_expr_real_1): Likewise.
	* fold-const.c (fold_read_from_constant_string): Likewise.
	* gimple-ssa-sprintf.c (get_format_string): Likewise.
	* optabs-libfuncs.c (gen_int_libfunc): Likewise.
	* optabs.c (expand_binop): Likewise.
	(expand_unop): Likewise.
	(expand_abs_nojump): Likewise.
	(expand_one_cmpl_abs_nojump): Likewise.
	* simplify-rtx.c (mode_signbit_p): Likewise.
	(val_signbit_p): Likewise.
	(val_signbit_known_set_p): Likewise.
	(val_signbit_known_clear_p): Likewise.
	(simplify_relational_operation_1): Likewise.
	* tree.c (vector_type_mode): Likewise.

gcc/go/
	* go-lang.c (go_langhook_type_for_mode): Use is_int_mode.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r251472

The new iterators are:

- FOR_EACH_MODE_IN_CLASS: iterate over all the modes in a mode class.

- FOR_EACH_MODE_FROM: iterate over all the modes in a class,
  starting at a given mode.

- FOR_EACH_WIDER_MODE: iterate over all the modes in a class,
  starting at the next widest mode after a given mode.

- FOR_EACH_2XWIDER_MODE: same, but considering only modes that
  are two times wider than the previous mode.

- FOR_EACH_MODE_UNTIL: iterate over all the modes in a class until
  a given mode is reached.

- FOR_EACH_MODE: iterate over all the modes in a class between
  two given modes, inclusive of the first but not the second.

These help with the stronger type checking added by later patches,
since every new mode will be in the same class as the previous one.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
            Alan Hayward  <alan.hayward@arm.com>
            David Sherwood  <david.sherwood@arm.com>

gcc/
	* machmode.h (mode_traits): New structure.
	(get_narrowest_mode): New function.
	(mode_iterator::start): Likewise.
	(mode_iterator::iterate_p): Likewise.
	(mode_iterator::get_wider): Likewise.
	(mode_iterator::get_known_wider): Likewise.
	(mode_iterator::get_2xwider): Likewise.
	(FOR_EACH_MODE_IN_CLASS): New mode iterator.
	(FOR_EACH_MODE): Likewise.
	(FOR_EACH_MODE_FROM): Likewise.
	(FOR_EACH_MODE_UNTIL): Likewise.
	(FOR_EACH_WIDER_MODE): Likewise.
	(FOR_EACH_2XWIDER_MODE): Likewise.
	* builtins.c (expand_builtin_strlen): Use new mode iterators.
	* combine.c (simplify_comparison): Likewise
	* config/i386/i386.c (type_natural_mode): Likewise.
	* cse.c (cse_insn): Likewise.
	* dse.c (find_shift_sequence): Likewise.
	* emit-rtl.c (init_derived_machine_modes): Likewise.
	(init_emit_once): Likewise.
	* explow.c (hard_function_value): Likewise.
	* expmed.c (extract_fixed_bit_field_1): Likewise.
	(extract_bit_field_1): Likewise.
	(expand_divmod): Likewise.
	(emit_store_flag_1): Likewise.
	* expr.c (init_expr_target): Likewise.
	(convert_move): Likewise.
	(alignment_for_piecewise_move): Likewise.
	(widest_int_mode_for_size): Likewise.
	(emit_block_move_via_movmem): Likewise.
	(copy_blkmode_to_reg): Likewise.
	(set_storage_via_setmem): Likewise.
	(compress_float_constant): Likewise.
	* omp-low.c (omp_clause_aligned_alignment): Likewise.
	* optabs-query.c (get_best_extraction_insn): Likewise.
	* optabs.c (expand_binop): Likewise.
	(expand_twoval_unop): Likewise.
	(expand_twoval_binop): Likewise.
	(widen_leading): Likewise.
	(widen_bswap): Likewise.
	(expand_parity): Likewise.
	(expand_unop): Likewise.
	(prepare_cmp_insn): Likewise.
	(prepare_float_lib_cmp): Likewise.
	(expand_float): Likewise.
	(expand_fix): Likewise.
	(expand_sfix_optab): Likewise.
	* postreload.c (move2add_use_add2_insn): Likewise.
	* reg-stack.c (reg_to_stack): Likewise.
	* reginfo.c (choose_hard_reg_mode): Likewise.
	* rtlanal.c (init_num_sign_bit_copies_in_rep): Likewise.
	* stor-layout.c (mode_for_size): Likewise.
	(smallest_mode_for_size): Likewise.
	(mode_for_vector): Likewise.
	(finish_bitfield_representative): Likewise.
	* tree-ssa-math-opts.c (target_supports_divmod_p): Likewise.
	* tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
	* tree-vect-stmts.c (vectorizable_conversion): Likewise.
	* var-tracking.c (prepare_call_arguments): Likewise.

gcc/ada/
	* gcc-interface/misc.c (fp_prec_to_size): Use new mode iterators.
	(fp_size_to_prec): Likewise.

gcc/c-family/
	* c-common.c (c_common_fixed_point_type_for_size): Use new mode
	iterators.
	* c-cppbuiltin.c (c_cpp_builtins): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r251455

	PR rtl-optimization/81747
	* cse.c (cse_extended_basic_block): Don't attempt to record
	equivalences for degenerate conditional branches that branch
	to their fall-through.

From-SVN: r251349

This patch makes more use of the existing paradoxical_subreg_p
predicate and also adds a version that operates on outer and
inner modes.

Some of the affected tests were based on GET_MODE_SIZE rather than
GET_MODE_PRECISION and so the patch could change the result for modes
that have the same size but different precisions.  I think in each
case the change should be a no-op or more correct, since a mode with
precision N bits can't be expected to hold all of a mode with precision
M>N bits.

The patch changes the branch taken in simplify_subreg for modes with
equal precision, but the new form matches the commentary more closely.
Both branches should be equally good in that situation.

2017-08-22  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* rtl.h (paradoxical_subreg_p): Define inline, and add a version
	that takes the outer and inner modes.
	* doc/rtl.texi: Use paradoxical_subreg_p instead of a GET_MODE_SIZE
	comparison as the canonical test for a paradoxical subreg.
	* combine.c (simplify_set): Use paradoxical_subreg_p.
	(make_extraction): Likewise.
	(force_to_mode): Likewise.
	(rtx_equal_for_field_assignment_p): Likewise.
	(gen_lowpart_for_combine): Likewise.
	(simplify_comparison): Likewise.
	* cse.c (equiv_constant): Likewise.
	* expmed.c (store_bit_field_1): Likewise.
	* final.c (alter_subreg): Likewise.
	* fwprop.c (propagate_rtx): Likewise.
	(forward_propagate_subreg): Likewise.
	* ira-conflicts.c (ira_build_conflicts): Likewise.
	* lower-subreg.c (simplify_gen_subreg_concatn): Likewise.
	* lra-constraints.c (curr_insn_transform): Likewise.
	(split_reg): Likewise.
	* lra-eliminations.c (move_plus_up): Likewise.
	(lra_eliminate_regs_1): Likewise.
	* recog.c (general_operand): Likewise.
	* ree.c (combine_reaching_defs): Likewise.
	* reload.c (push_reload): Likewise.
	(find_reloads): Likewise.
	* reload1.c (elimination_effects): Likewise.
	(compute_reload_subreg_offset): Likewise.
	(choose_reload_regs): Likewise.
	* rtlanal.c (subreg_lsb_1): Likewise.
	* simplify-rtx.c (simplify_unary_operation_1): Likewise.
	(simplify_subreg): Likewise.
	* var-tracking.c (track_loc_p): Likewise.
	* emit-rtl.c (byte_lowpart_offset): Likewise.
	(paradoxical_subreg_p): Delete out-of-line definition.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r251282

2017-03-14  Richard Biener  <rguenther@suse.de>

	* alias.c (struct alias_set_entry): Pack properly.
	* cfgloop.h (struct loop): Likewise.
	* cse.c (struct set): Likewise.
	* ipa-utils.c (struct searchc_env): Likewise.
	* loop-invariant.c (struct invariant): Likewise.
	* lra-remat.c (struct cand): Likewise.
	* recog.c (struct change_t): Likewise.
	* rtl.h (struct address_info): Likewise.
	* symbol-summary.h (function_summary): Likewise.
	* tree-loop-distribution.c (struct partition): Likewise.
	* tree-object-size.c (struct object_size_info): Likewise.
	* tree-ssa-loop-ivopts.c (struct cost_pair): Likewise.
	* tree-ssa-threadupdate.c (struct ssa_local_info_t): Likewise.
	* tree-vect-data-refs.c (struct _vect_peel_info): Likewise.
	* tree-vect-slp.c (struct _slp_oprnd_info): Likewise.
	* tree-vect-stmts.c (struct simd_call_arg_info): Likewise.
	* tree-vectorizer.h (struct _loop_vec_info): Likewise.
	(struct _stmt_vec_info): Likewise.

From-SVN: r246121

From-SVN: r243994

LOAD_EXTEND_OP only applies to scalar integer modes that are narrower
than a word.  However, callers weren't consistent about which of these
checks they made beforehand, and also weren't consistent about whether
"smaller" was based on (bit)size or precision (IMO it's the latter).
This patch adds a wrapper to try to make the macro easier to use.

LOAD_EXTEND_OP is often used to disable transformations that aren't
beneficial when extends from memory are free, so being stricter about
the check accidentally exposed more optimisation opportunities.

"SUBREG_BYTE (...) == 0" and subreg_lowpart_p are implied by
paradoxical_subreg_p, so the patch also removes some redundant tests.

The patch doesn't change reload, since different checks could have
unforeseen consequences.

gcc/
2016-11-15  Richard Sandiford  <richard.sandiford@arm.com>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

	* rtl.h (load_extend_op): Declare.
	* rtlanal.c (load_extend_op): New function.
	(nonzero_bits1): Use it.
	(num_sign_bit_copies1): Likewise.
	* cse.c (cse_insn): Likewise.
	* fold-const.c (fold_single_bit_test): Likewise.
	(fold_unary_loc): Likewise.
	* fwprop.c (free_load_extend): Likewise.
	* postreload.c (reload_cse_simplify_set): Likewise.
	(reload_cse_simplify_operands): Likewise.
	* combine.c (try_combine): Likewise.
	(simplify_set): Likewise.  Remove redundant SUBREG_BYTE and
	subreg_lowpart_p checks.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r242444

	* defaults.h (LOAD_EXTEND_OP): Define if not already defined.
	* combine.c (LOAD_EXTEND_OP): Delete.
	(simplify_comparison): Fix comment about LOAD_EXTEND_OP.
	* cse.c (LOAD_EXTEND_OP): Delete.
	* fold-const.c (LOAD_EXTEND_OP): Likewise.
	* fwprop.c (free_load_extend): Remove #ifdef LOAD_EXTEND_OP/#endif.
	* postreload.c (LOAD_EXTEND_OP): Delete.
	* reload.c (push_reload): Remove #ifdef LOAD_EXTEND_OP/#endif.
	Convert conditional compilation based on WORD_REGISTER_OPERATIONS.
	(find_reloads): Likewise.
	* reload1.c (eliminate_regs_1): Likewise.
	* rtlanal.c (nonzero_bits1): Remove #ifdef LOAD_EXTEND_OP/#endif.
	(num_sign_bit_copies1): Likewise.

From-SVN: r241855

While changing LABEL_REF_LABEL it might as well become an inline
function, so that its clearer what types are involved.  Unfortunately
because it is still possible to use XEXP and related macros on a
LABEL_REF rtx you can still set the field to be a non insn rtx.  The
other unfortunate thing is that the generators actually create LABEL_REF
rtx that refer to MATCH_x rtx, so there we actually need to use XEXP to
bypass the checking this patch adds.

gcc/ChangeLog:

2016-10-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* rtl.h (label_ref_label): New function.
	(set_label_ref_label): New function.
	(LABEL_REF_LABEL): Delete.
	* alias.c (rtx_equal_for_memref_p): Adjust.
	* cfgbuild.c (make_edges): Likewise.
	(purge_dead_tablejump_edges): Likewise.
	* cfgexpand.c (convert_debug_memory_address): Likewise.
	* cfgrtl.c (patch_jump_insn): Likewise.
	* combine.c (distribute_notes): Likewise.
	* cse.c (hash_rtx_cb): Likewise.
	(exp_equiv_p): Likewise.
	(fold_rtx): Likewise.
	(check_for_label_ref): Likewise.
	* cselib.c (rtx_equal_for_cselib_1): Likewise.
	(cselib_hash_rtx): Likewise.
	* emit-rtl.c (mark_label_nuses): Likewise.
	* explow.c (convert_memory_address_addr_space_1): Likewise.
	* final.c (output_asm_label): Likewise.
	(output_addr_const): Likewise.
	* gcse.c (add_label_notes): Likewise.
	* genconfig.c (walk_insn_part): Likewise.
	* genrecog.c (validate_pattern): Likewise.
	* ifcvt.c (cond_exec_get_condition): Likewise.
	(noce_emit_store_flag): Likewise.
	(noce_get_alt_condition): Likewise.
	(noce_get_condition): Likewise.
	* jump.c (maybe_propagate_label_ref): Likewise.
	(mark_jump_label_1): Likewise.
	(redirect_exp_1): Likewise.
	(rtx_renumbered_equal_p): Likewise.
	* lra-constraints.c (operands_match_p): Likewise.
	* print-rtl.c (print_value): Likewise.
	* reload.c (find_reloads): Likewise.
	* reload1.c (set_label_offsets): Likewise.
	* reorg.c (get_branch_condition): Likewise.
	* rtl-tests.c (test_uncond_jump): Likewise.
	* rtl.c (rtx_equal_p_cb): Likewise.
	(rtx_equal_p): Likewise.
	* rtlanal.c (reg_mentioned_p): Likewise.
	(rtx_referenced_p): Likewise.
	(get_condition): Likewise.
	* varasm.c (const_hash_1): Likewise.
	(compare_constant): Likewise.
	(const_rtx_hash_1): Likewise.
	(output_constant_pool_1): Likewise.

From-SVN: r241401

2016-10-13  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * coretypes.h: Move MEMMODEL_* macros and enum memmodel definition
    into ...
    * memmodel.h: This file.
    * alias.c, asan.c, auto-inc-dec.c, bb-reorder.c, bt-load.c,
      caller-save.c, calls.c, ccmp.c, cfgbuild.c, cfgcleanup.c,
      cfgexpand.c, cfgloopanal.c, cfgrtl.c, cilk-common.c, combine.c,
      combine-stack-adj.c, common/config/aarch64/aarch64-common.c,
      common/config/arm/arm-common.c, common/config/bfin/bfin-common.c,
      common/config/c6x/c6x-common.c, common/config/i386/i386-common.c,
      common/config/ia64/ia64-common.c, common/config/nvptx/nvptx-common.c,
      compare-elim.c, config/aarch64/aarch64-builtins.c,
      config/aarch64/aarch64-c.c, config/aarch64/cortex-a57-fma-steering.c,
      config/arc/arc.c, config/arc/arc-c.c, config/arm/arm-builtins.c,
      config/arm/arm-c.c, config/avr/avr.c, config/avr/avr-c.c,
      config/avr/avr-log.c, config/bfin/bfin.c, config/c6x/c6x.c,
      config/cr16/cr16.c, config/cris/cris.c, config/darwin-c.c,
      config/darwin.c, config/epiphany/epiphany.c,
      config/epiphany/mode-switch-use.c,
      config/epiphany/resolve-sw-modes.c, config/fr30/fr30.c,
      config/frv/frv.c, config/ft32/ft32.c, config/h8300/h8300.c,
      config/i386/i386-c.c, config/i386/winnt.c, config/iq2000/iq2000.c,
      config/lm32/lm32.c, config/m32c/m32c.c, config/m32r/m32r.c,
      config/m68k/m68k.c, config/mcore/mcore.c,
      config/microblaze/microblaze.c, config/mmix/mmix.c,
      config/mn10300/mn10300.c, config/moxie/moxie.c,
      config/msp430/msp430.c, config/nds32/nds32-cost.c,
      config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
      config/nds32/nds32-memory-manipulation.c,
      config/nds32/nds32-predicates.c, config/nds32/nds32.c,
      config/nios2/nios2.c, config/nvptx/nvptx.c, config/pa/pa.c,
      config/pdp11/pdp11.c, config/rl78/rl78.c, config/rs6000/rs6000-c.c,
      config/rx/rx.c, config/s390/s390-c.c, config/s390/s390.c,
      config/sh/sh.c, config/sh/sh-c.c, config/sh/sh-mem.cc,
      config/sh/sh_treg_combine.cc, config/sol2.c, config/spu/spu.c,
      config/stormy16/stormy16.c, config/tilegx/tilegx.c,
      config/tilepro/tilepro.c, config/v850/v850.c, config/vax/vax.c,
      config/visium/visium.c, config/vms/vms-c.c, config/xtensa/xtensa.c,
      coverage.c, cppbuiltin.c, cprop.c, cse.c, cselib.c, dbxout.c, dce.c,
      df-core.c, df-problems.c, df-scan.c, dojump.c, dse.c, dwarf2asm.c,
      dwarf2cfi.c, dwarf2out.c, emit-rtl.c, except.c, explow.c, expmed.c,
      expr.c, final.c, fold-const.c, function.c, fwprop.c, gcse.c,
      ggc-page.c, haifa-sched.c, hsa-brig.c, hsa-gen.c, hw-doloop.c,
      ifcvt.c, init-regs.c, internal-fn.c, ira-build.c, ira-color.c,
      ira-conflicts.c, ira-costs.c, ira-emit.c, ira-lives.c, ira.c, jump.c,
      loop-doloop.c, loop-invariant.c, loop-iv.c, loop-unroll.c,
      lower-subreg.c, lra.c, lra-assigns.c, lra-coalesce.c,
      lra-constraints.c, lra-eliminations.c, lra-lives.c, lra-remat.c,
      lra-spills.c, mode-switching.c, modulo-sched.c, omp-low.c, passes.c,
      postreload-gcse.c, postreload.c, predict.c, print-rtl-function.c,
      recog.c, ree.c, reg-stack.c, regcprop.c, reginfo.c, regrename.c,
      reload.c, reload1.c, reorg.c, resource.c, rtl-chkp.c, rtl-tests.c,
      rtlanal.c, rtlhooks.c, sched-deps.c, sched-rgn.c, sdbout.c,
      sel-sched-ir.c, sel-sched.c, shrink-wrap.c, simplify-rtx.c,
      stack-ptr-mod.c, stmt.c, stor-layout.c, target-globals.c,
      targhooks.c, toplev.c, tree-nested.c, tree-outof-ssa.c,
      tree-profile.c, tree-ssa-coalesce.c, tree-ssa-ifcombine.c,
      tree-ssa-loop-ivopts.c, tree-ssa-loop.c, tree-ssa-reassoc.c,
      tree-ssa-sccvn.c, tree-vect-data-refs.c, ubsan.c, valtrack.c,
      var-tracking.c, varasm.c: Include memmodel.h.
    * genattrtab.c (write_header): Include memmodel.h in generated file.
    * genautomata.c (main): Likewise.
    * gengtype.c (open_base_files): Likewise.
    * genopinit.c (main): Likewise.
    * genconditions.c (write_header): Include memmodel.h earlier in
    generated file.
    * genemit.c (main): Likewise.
    * genoutput.c (output_prologue): Likewise.
    * genpeep.c (main): Likewise.
    * genpreds.c (write_insn_preds_c): Likewise.
    * genrecog.c (write_header): Likewise.
    * Makefile.in (PLUGIN_HEADERS): Include memmodel.h

    gcc/ada/
    * gcc-interface/utils2.c: Include memmodel.h.

    gcc/c-family/
    * c-cppbuiltin.c: Include memmodel.h.
    * c-opts.c: Likewise.
    * c-pragma.c: Likewise.
    * c-warn.c: Likewise.

    gcc/c/
    * c-typeck.c: Include memmodel.h.

    gcc/cp/
    * decl2.c: Include memmodel.h.
    * rtti.c: Likewise.

    gcc/fortran/
    * trans-intrinsic.c: Include memmodel.h.

    gcc/go/
    * go-backend.c: Include memmodel.h.

    libgcc/
    * libgcov-profiler.c: Replace MEMMODEL_* macros by their __ATOMIC_*
    equivalent.
    * config/tilepro/atomic.c: Likewise and stop casting model to
    enum memmodel.

From-SVN: r241121

gcc/ChangeLog:

2016-09-22  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* emit-rtl.c (next_nonnote_insn): Change argument type to
	rtx_insn *.
	(prev_nonnote_insn): Likewise.
	* jump.c (reversed_comparison_code_parts): Likewise.
	(reversed_comparison): Likewise.
	* rtl.h: Adjust prototypes.
	* config/arc/arc.md: Adjust.
	* cse.c (find_comparison_args): Likewise.
	* reorg.c (redundant_insn): Change return type to rtx_insn *.
	(fix_reg_dead_note): Change argument type to rtx_insn *.
	(delete_prior_computation): Likewise.
	(delete_computation): Likewise.
	(fill_slots_from_thread): Adjust.
	(relax_delay_slots): Likewise.
	* simplify-rtx.c (simplify_unary_operation_1): Likewise.
	(simplify_relational_operation_1): Likewise.
	(simplify_ternary_operation): Likewise.

From-SVN: r240357

	* hwint.h (least_bit_hwi, pow2_or_zerop, pow2p_hwi, ctz_or_zero):
	New.
	* hwint.c (exact_log2): Use pow2p_hwi.
	(ctz_hwi, ffs_hwi): Use least_bit_hwi.
	* alias.c (memrefs_conflict_p): Use pow2_or_zerop.
	* builtins.c (get_object_alignment_2, get_object_alignment)
	(get_pointer_alignment, fold_builtin_atomic_always_lock_free): Use
	least_bit_hwi.
	* calls.c (compute_argument_addresses, store_one_arg): Use
	least_bit_hwi.
	* cfgexpand.c (expand_one_stack_var_at): Use least_bit_hwi.
	* combine.c (force_to_mode): Use least_bit_hwi.
	* emit-rtl.c (set_mem_attributes_minus_bitpos, adjust_address_1):
	Use least_bit_hwi.
	* expmed.c (synth_mult, expand_divmod): Use ctz_or_zero, ctz_hwi.
	(init_expmed_one_conv): Use pow2p_hwi.
	* fold-const.c (round_up_loc, round_down_loc): Use pow2_or_zerop.
	(fold_binary_loc): Use pow2p_hwi.
	* function.c (assign_parm_find_stack_rtl): Use least_bit_hwi.
	* gimple-fold.c (gimple_fold_builtin_memory_op): Use pow2p_hwi.
	* gimple-ssa-strength-reduction.c (replace_ref): Use least_bit_hwi.
	* hsa-gen.c (gen_hsa_addr_with_align, hsa_bitmemref_alignment):
	Use least_bit_hwi.
	* ipa-cp.c (ipcp_alignment_lattice::meet_with_1): Use least_bit_hwi.
	* ipa-prop.c (ipa_modify_call_arguments): Use least_bit_hwi.
	* omp-low.c (oacc_loop_fixed_partitions)
	(oacc_loop_auto_partitions): Use least_bit_hwi.
	* rtlanal.c (nonzero_bits1): Use ctz_or_zero.
	* stor-layout.c (place_field): Use least_bit_hwi.
	* tree-pretty-print.c (dump_generic_node): Use pow2p_hwi.
	* tree-sra.c (build_ref_for_offset): Use least_bit_hwi.
	* tree-ssa-ccp.c (ccp_finalize): Use least_bit_hwi.
	* tree-ssa-math-opts.c (bswap_replace): Use least_bit_hwi.
	* tree-ssa-strlen.c (handle_builtin_memcmp): Use pow2p_hwi.
	* tree-vect-data-refs.c (vect_analyze_group_access_1)
	(vect_grouped_store_supported, vect_grouped_load_supported)
	(vect_permute_load_chain, vect_shift_permute_load_chain)
	(vect_transform_grouped_load): Use pow2p_hwi.
	* tree-vect-generic.c (expand_vector_divmod): Use ctz_or_zero.
	* tree-vect-patterns.c (vect_recog_divmod_pattern): Use ctz_or_zero.
	* tree-vect-stmts.c (vectorizable_mask_load_store): Use
	least_bit_hwi.
	* tsan.c (instrument_expr): Use least_bit_hwi.
	* var-tracking.c (negative_power_of_two_p): Use pow2_or_zerop.

From-SVN: r240194

2016-08-04  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR rtl-optimization/70903
        * cse.c (cse_insn): If DEST is a paradoxical SUBREG, don't record DEST.

testsuite:
2016-08-04  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR rtl-optimization/70903
        * gcc.c-torture/execute/pr70903.c: New test.

From-SVN: r239122

	* cse.c: Use HOST_WIDE_INT_M1 instead of ~(HOST_WIDE_INT) 0.
	* combine.c: Use HOST_WIDE_INT_M1U instead of
	~(unsigned HOST_WIDE_INT) 0.
	* double-int.h: Ditto.
	* dse.c: Ditto.
	* dwarf2asm.c:Ditto.
	* expmed.c: Ditto.
	* genmodes.c: Ditto.
	* match.pd: Ditto.
	* read-rtl.c: Ditto.
	* tree-ssa-loop-ivopts.c: Ditto.
	* tree-ssa-loop-prefetch.c: Ditto.
	* tree-vect-generic.c: Ditto.
	* tree-vect-patterns.c: Ditto.
	* tree.c: Ditto.

From-SVN: r238529

	* builtins.c: Use HOST_WIDE_INT_1 instead of (HOST_WIDE_INT) 1,
	HOST_WIDE_INT_1U instead of (unsigned HOST_WIDE_INT) 1,
	HOST_WIDE_INT_M1 instead of (HOST_WIDE_INT) -1 and
	HOST_WIDE_INT_M1U instead of (unsigned HOST_WIDE_INT) -1.
	* combine.c: Ditto.
	* cse.c: Ditto.
	* dojump.c: Ditto.
	* double-int.c: Ditto.
	* dse.c: Ditto.
	* dwarf2out.c: Ditto.
	* expmed.c: Ditto.
	* expr.c: Ditto.
	* fold-const.c: Ditto.
	* function.c: Ditto.
	* fwprop.c: Ditto.
	* genmodes.c: Ditto.
	* hwint.c: Ditto.
	* hwint.h: Ditto.
	* ifcvt.c: Ditto.
	* loop-doloop.c: Ditto.
	* loop-invariant.c: Ditto.
	* loop-iv.c: Ditto.
	* match.pd: Ditto.
	* optabs.c: Ditto.
	* real.c: Ditto.
	* reload.c: Ditto.
	* rtlanal.c: Ditto.
	* simplify-rtx.c: Ditto.
	* stor-layout.c: Ditto.
	* toplev.c: Ditto.
	* tree-ssa-loop-ivopts.c: Ditto.
	* tree-vect-generic.c: Ditto.
	* tree-vect-patterns.c: Ditto.
	* tree.c: Ditto.
	* tree.h: Ditto.
	* ubsan.c: Ditto.
	* varasm.c: Ditto.
	* wide-int-print.cc: Ditto.
	* wide-int.cc: Ditto.
	* wide-int.h: Ditto.

From-SVN: r238481

	* cse.c (canon_asm_operands): New function extracted from...
	(canonicalize_insn): ...here.  Call it to canonicalize an ASM_OPERANDS
	either standalone or member of a PARALLEL.

From-SVN: r237642

	PR rtl-optimization/71532
	* cse.c (cse_insn): For const/pure calls, invalidate argument passing
	memory slots.

	* gcc.dg/torture/pr71532.c: New test.

From-SVN: r237503