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riscv-gcc-1
Commit bb06a2d8 by Richard Sandiford Committed by Richard Sandiford
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Make more use of GET_MODE_UNIT_PRECISION 

This patch is like the earlier GET_MODE_UNIT_SIZE one,
but for precisions rather than sizes.  There is one behavioural
change in expand_debug_expr: we shouldn't use lowpart subregs
for non-scalar truncations, since that would just reinterpret
some of the scalars and drop the rest.  (This probably doesn't
trigger in practice.)  Using TRUNCATE is fine for scalars,
since simplify_gen_unary knows when a subreg can be used.

2017-10-22  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* cfgexpand.c (expand_debug_expr): Use GET_MODE_UNIT_PRECISION.
	(expand_debug_source_expr): Likewise.
	* combine.c (combine_simplify_rtx): Likewise.
	* cse.c (fold_rtx): Likewise.
	* optabs.c (expand_float): Likewise.
	* simplify-rtx.c (simplify_unary_operation_1): Likewise.
	(simplify_binary_operation_1): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r253991
parent 1e3734f5
Showing with 54 additions and 31 deletions
gcc/ChangeLog
...@@ -2,6 +2,18 @@ ...@@ -2,6 +2,18 @@
Alan Hayward <alan.hayward@arm.com> Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com> David Sherwood <david.sherwood@arm.com>
* cfgexpand.c (expand_debug_expr): Use GET_MODE_UNIT_PRECISION.
(expand_debug_source_expr): Likewise.
* combine.c (combine_simplify_rtx): Likewise.
* cse.c (fold_rtx): Likewise.
* optabs.c (expand_float): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_binary_operation_1): Likewise.
2017-10-22 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* combine.c (simplify_comparison): Use HWI_COMPUTABLE_MODE_P. * combine.c (simplify_comparison): Use HWI_COMPUTABLE_MODE_P.
(record_promoted_value): Likewise. (record_promoted_value): Likewise.
* expr.c (expand_expr_real_2): Likewise. * expr.c (expand_expr_real_2): Likewise.
gcc/cfgexpand.c
...@@ -4361,9 +4361,12 @@ expand_debug_expr (tree exp) ...@@ -4361,9 +4361,12 @@ expand_debug_expr (tree exp)
else else
op0 = simplify_gen_unary (FIX, mode, op0, inner_mode); op0 = simplify_gen_unary (FIX, mode, op0, inner_mode);
} }
else if (CONSTANT_P (op0) else if (GET_MODE_UNIT_PRECISION (mode)
|| GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (inner_mode)) == GET_MODE_UNIT_PRECISION (inner_mode))
op0 = lowpart_subreg (mode, op0, inner_mode); op0 = lowpart_subreg (mode, op0, inner_mode);
else if (GET_MODE_UNIT_PRECISION (mode)
< GET_MODE_UNIT_PRECISION (inner_mode))
op0 = simplify_gen_unary (TRUNCATE, mode, op0, inner_mode);
else if (UNARY_CLASS_P (exp) else if (UNARY_CLASS_P (exp)
? TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))) ? TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0)))
: unsignedp) : unsignedp)
...@@ -5222,9 +5225,12 @@ expand_debug_source_expr (tree exp) ...@@ -5222,9 +5225,12 @@ expand_debug_source_expr (tree exp)
else else
op0 = simplify_gen_unary (FIX, mode, op0, inner_mode); op0 = simplify_gen_unary (FIX, mode, op0, inner_mode);
} }
else if (CONSTANT_P (op0) else if (GET_MODE_UNIT_PRECISION (mode)
|| GET_MODE_BITSIZE (mode) <= GET_MODE_BITSIZE (inner_mode)) == GET_MODE_UNIT_PRECISION (inner_mode))
op0 = lowpart_subreg (mode, op0, inner_mode); op0 = lowpart_subreg (mode, op0, inner_mode);
else if (GET_MODE_UNIT_PRECISION (mode)
< GET_MODE_UNIT_PRECISION (inner_mode))
op0 = simplify_gen_unary (TRUNCATE, mode, op0, inner_mode);
else if (TYPE_UNSIGNED (TREE_TYPE (exp))) else if (TYPE_UNSIGNED (TREE_TYPE (exp)))
op0 = simplify_gen_unary (ZERO_EXTEND, mode, op0, inner_mode); op0 = simplify_gen_unary (ZERO_EXTEND, mode, op0, inner_mode);
else else
......
gcc/combine.c
...@@ -5886,7 +5886,7 @@ combine_simplify_rtx (rtx x, machine_mode op0_mode, int in_dest, ...@@ -5886,7 +5886,7 @@ combine_simplify_rtx (rtx x, machine_mode op0_mode, int in_dest,
if (GET_CODE (temp) == ASHIFTRT if (GET_CODE (temp) == ASHIFTRT
&& CONST_INT_P (XEXP (temp, 1)) && CONST_INT_P (XEXP (temp, 1))
&& INTVAL (XEXP (temp, 1)) == GET_MODE_PRECISION (mode) - 1) && INTVAL (XEXP (temp, 1)) == GET_MODE_UNIT_PRECISION (mode) - 1)
return simplify_shift_const (NULL_RTX, LSHIFTRT, mode, XEXP (temp, 0), return simplify_shift_const (NULL_RTX, LSHIFTRT, mode, XEXP (temp, 0),
INTVAL (XEXP (temp, 1))); INTVAL (XEXP (temp, 1)));
......
gcc/cse.c
...@@ -3607,7 +3607,7 @@ fold_rtx (rtx x, rtx_insn *insn) ...@@ -3607,7 +3607,7 @@ fold_rtx (rtx x, rtx_insn *insn)
enum rtx_code associate_code; enum rtx_code associate_code;
if (is_shift if (is_shift
&& (INTVAL (const_arg1) >= GET_MODE_PRECISION (mode) && (INTVAL (const_arg1) >= GET_MODE_UNIT_PRECISION (mode)
|| INTVAL (const_arg1) < 0)) || INTVAL (const_arg1) < 0))
{ {
if (SHIFT_COUNT_TRUNCATED) if (SHIFT_COUNT_TRUNCATED)
...@@ -3656,7 +3656,7 @@ fold_rtx (rtx x, rtx_insn *insn) ...@@ -3656,7 +3656,7 @@ fold_rtx (rtx x, rtx_insn *insn)
break; break;
if (is_shift if (is_shift
&& (INTVAL (inner_const) >= GET_MODE_PRECISION (mode) && (INTVAL (inner_const) >= GET_MODE_UNIT_PRECISION (mode)
|| INTVAL (inner_const) < 0)) || INTVAL (inner_const) < 0))
{ {
if (SHIFT_COUNT_TRUNCATED) if (SHIFT_COUNT_TRUNCATED)
...@@ -3687,7 +3687,7 @@ fold_rtx (rtx x, rtx_insn *insn) ...@@ -3687,7 +3687,7 @@ fold_rtx (rtx x, rtx_insn *insn)
if (is_shift if (is_shift
&& CONST_INT_P (new_const) && CONST_INT_P (new_const)
&& INTVAL (new_const) >= GET_MODE_PRECISION (mode)) && INTVAL (new_const) >= GET_MODE_UNIT_PRECISION (mode))
{ {
/* As an exception, we can turn an ASHIFTRT of this /* As an exception, we can turn an ASHIFTRT of this
form into a shift of the number of bits - 1. */ form into a shift of the number of bits - 1. */
......
gcc/optabs.c
...@@ -4655,7 +4655,8 @@ expand_float (rtx to, rtx from, int unsignedp) ...@@ -4655,7 +4655,8 @@ expand_float (rtx to, rtx from, int unsignedp)
int doing_unsigned = unsignedp; int doing_unsigned = unsignedp;
if (fmode != GET_MODE (to) if (fmode != GET_MODE (to)
&& significand_size (fmode) < GET_MODE_PRECISION (GET_MODE (from))) && (significand_size (fmode)
< GET_MODE_UNIT_PRECISION (GET_MODE (from))))
continue; continue;
icode = can_float_p (fmode, imode, unsignedp); icode = can_float_p (fmode, imode, unsignedp);
......
gcc/simplify-rtx.c
...@@ -1136,7 +1136,7 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op) ...@@ -1136,7 +1136,7 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
C is equal to the width of MODE minus 1. */ C is equal to the width of MODE minus 1. */
if (GET_CODE (op) == ASHIFTRT if (GET_CODE (op) == ASHIFTRT
&& CONST_INT_P (XEXP (op, 1)) && CONST_INT_P (XEXP (op, 1))
&& INTVAL (XEXP (op, 1)) == GET_MODE_PRECISION (mode) - 1) && INTVAL (XEXP (op, 1)) == GET_MODE_UNIT_PRECISION (mode) - 1)
return simplify_gen_binary (LSHIFTRT, mode, return simplify_gen_binary (LSHIFTRT, mode,
XEXP (op, 0), XEXP (op, 1)); XEXP (op, 0), XEXP (op, 1));
...@@ -1144,7 +1144,7 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op) ...@@ -1144,7 +1144,7 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
C is equal to the width of MODE minus 1. */ C is equal to the width of MODE minus 1. */
if (GET_CODE (op) == LSHIFTRT if (GET_CODE (op) == LSHIFTRT
&& CONST_INT_P (XEXP (op, 1)) && CONST_INT_P (XEXP (op, 1))
&& INTVAL (XEXP (op, 1)) == GET_MODE_PRECISION (mode) - 1) && INTVAL (XEXP (op, 1)) == GET_MODE_UNIT_PRECISION (mode) - 1)
return simplify_gen_binary (ASHIFTRT, mode, return simplify_gen_binary (ASHIFTRT, mode,
XEXP (op, 0), XEXP (op, 1)); XEXP (op, 0), XEXP (op, 1));
...@@ -1446,19 +1446,21 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op) ...@@ -1446,19 +1446,21 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
if (lcode == ASHIFTRT) if (lcode == ASHIFTRT)
/* Number of bits not shifted off the end. */ /* Number of bits not shifted off the end. */
bits = GET_MODE_PRECISION (lmode) - INTVAL (XEXP (lhs, 1)); bits = (GET_MODE_UNIT_PRECISION (lmode)
- INTVAL (XEXP (lhs, 1)));
else /* lcode == SIGN_EXTEND */ else /* lcode == SIGN_EXTEND */
/* Size of inner mode. */ /* Size of inner mode. */
bits = GET_MODE_PRECISION (GET_MODE (XEXP (lhs, 0))); bits = GET_MODE_UNIT_PRECISION (GET_MODE (XEXP (lhs, 0)));
if (rcode == ASHIFTRT) if (rcode == ASHIFTRT)
bits += GET_MODE_PRECISION (rmode) - INTVAL (XEXP (rhs, 1)); bits += (GET_MODE_UNIT_PRECISION (rmode)
- INTVAL (XEXP (rhs, 1)));
else /* rcode == SIGN_EXTEND */ else /* rcode == SIGN_EXTEND */
bits += GET_MODE_PRECISION (GET_MODE (XEXP (rhs, 0))); bits += GET_MODE_UNIT_PRECISION (GET_MODE (XEXP (rhs, 0)));
/* We can only widen multiplies if the result is mathematiclly /* We can only widen multiplies if the result is mathematiclly
equivalent. I.e. if overflow was impossible. */ equivalent. I.e. if overflow was impossible. */
if (bits <= GET_MODE_PRECISION (GET_MODE (op))) if (bits <= GET_MODE_UNIT_PRECISION (GET_MODE (op)))
return simplify_gen_binary return simplify_gen_binary
(MULT, mode, (MULT, mode,
simplify_gen_unary (SIGN_EXTEND, mode, lhs, lmode), simplify_gen_unary (SIGN_EXTEND, mode, lhs, lmode),
...@@ -1483,8 +1485,8 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op) ...@@ -1483,8 +1485,8 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
(sign_extend:M (zero_extend:N <X>)) is (zero_extend:M <X>). */ (sign_extend:M (zero_extend:N <X>)) is (zero_extend:M <X>). */
if (GET_CODE (op) == SIGN_EXTEND || GET_CODE (op) == ZERO_EXTEND) if (GET_CODE (op) == SIGN_EXTEND || GET_CODE (op) == ZERO_EXTEND)
{ {
gcc_assert (GET_MODE_PRECISION (mode) gcc_assert (GET_MODE_UNIT_PRECISION (mode)
> GET_MODE_PRECISION (GET_MODE (op))); > GET_MODE_UNIT_PRECISION (GET_MODE (op)));
return simplify_gen_unary (GET_CODE (op), mode, XEXP (op, 0), return simplify_gen_unary (GET_CODE (op), mode, XEXP (op, 0),
GET_MODE (XEXP (op, 0))); GET_MODE (XEXP (op, 0)));
} }
...@@ -1584,19 +1586,21 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op) ...@@ -1584,19 +1586,21 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
if (lcode == LSHIFTRT) if (lcode == LSHIFTRT)
/* Number of bits not shifted off the end. */ /* Number of bits not shifted off the end. */
bits = GET_MODE_PRECISION (lmode) - INTVAL (XEXP (lhs, 1)); bits = (GET_MODE_UNIT_PRECISION (lmode)
- INTVAL (XEXP (lhs, 1)));
else /* lcode == ZERO_EXTEND */ else /* lcode == ZERO_EXTEND */
/* Size of inner mode. */ /* Size of inner mode. */
bits = GET_MODE_PRECISION (GET_MODE (XEXP (lhs, 0))); bits = GET_MODE_UNIT_PRECISION (GET_MODE (XEXP (lhs, 0)));
if (rcode == LSHIFTRT) if (rcode == LSHIFTRT)
bits += GET_MODE_PRECISION (rmode) - INTVAL (XEXP (rhs, 1)); bits += (GET_MODE_UNIT_PRECISION (rmode)
- INTVAL (XEXP (rhs, 1)));
else /* rcode == ZERO_EXTEND */ else /* rcode == ZERO_EXTEND */
bits += GET_MODE_PRECISION (GET_MODE (XEXP (rhs, 0))); bits += GET_MODE_UNIT_PRECISION (GET_MODE (XEXP (rhs, 0)));
/* We can only widen multiplies if the result is mathematiclly /* We can only widen multiplies if the result is mathematiclly
equivalent. I.e. if overflow was impossible. */ equivalent. I.e. if overflow was impossible. */
if (bits <= GET_MODE_PRECISION (GET_MODE (op))) if (bits <= GET_MODE_UNIT_PRECISION (GET_MODE (op)))
return simplify_gen_binary return simplify_gen_binary
(MULT, mode, (MULT, mode,
simplify_gen_unary (ZERO_EXTEND, mode, lhs, lmode), simplify_gen_unary (ZERO_EXTEND, mode, lhs, lmode),
...@@ -2144,7 +2148,6 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode, ...@@ -2144,7 +2148,6 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
{ {
rtx tem, reversed, opleft, opright; rtx tem, reversed, opleft, opright;
HOST_WIDE_INT val; HOST_WIDE_INT val;
unsigned int width = GET_MODE_PRECISION (mode);
scalar_int_mode int_mode, inner_mode; scalar_int_mode int_mode, inner_mode;
/* Even if we can't compute a constant result, /* Even if we can't compute a constant result,
...@@ -2702,7 +2705,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode, ...@@ -2702,7 +2705,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
&& CONST_INT_P (XEXP (opleft, 1)) && CONST_INT_P (XEXP (opleft, 1))
&& CONST_INT_P (XEXP (opright, 1)) && CONST_INT_P (XEXP (opright, 1))
&& (INTVAL (XEXP (opleft, 1)) + INTVAL (XEXP (opright, 1)) && (INTVAL (XEXP (opleft, 1)) + INTVAL (XEXP (opright, 1))
== GET_MODE_PRECISION (mode))) == GET_MODE_UNIT_PRECISION (mode)))
return gen_rtx_ROTATE (mode, XEXP (opright, 0), XEXP (opleft, 1)); return gen_rtx_ROTATE (mode, XEXP (opright, 0), XEXP (opleft, 1));
/* Same, but for ashift that has been "simplified" to a wider mode /* Same, but for ashift that has been "simplified" to a wider mode
...@@ -3328,11 +3331,12 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode, ...@@ -3328,11 +3331,12 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
#if defined(HAVE_rotate) && defined(HAVE_rotatert) #if defined(HAVE_rotate) && defined(HAVE_rotatert)
if (CONST_INT_P (trueop1) if (CONST_INT_P (trueop1)
&& IN_RANGE (INTVAL (trueop1), && IN_RANGE (INTVAL (trueop1),
GET_MODE_PRECISION (mode) / 2 + (code == ROTATE), GET_MODE_UNIT_PRECISION (mode) / 2 + (code == ROTATE),
GET_MODE_PRECISION (mode) - 1)) GET_MODE_UNIT_PRECISION (mode) - 1))
return simplify_gen_binary (code == ROTATE ? ROTATERT : ROTATE, return simplify_gen_binary (code == ROTATE ? ROTATERT : ROTATE,
mode, op0, GEN_INT (GET_MODE_PRECISION (mode) mode, op0,
- INTVAL (trueop1))); GEN_INT (GET_MODE_UNIT_PRECISION (mode)
- INTVAL (trueop1)));
#endif #endif
/* FALLTHRU */ /* FALLTHRU */
case ASHIFTRT: case ASHIFTRT:
...@@ -3383,7 +3387,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode, ...@@ -3383,7 +3387,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
if (SHIFT_COUNT_TRUNCATED && CONST_INT_P (op1)) if (SHIFT_COUNT_TRUNCATED && CONST_INT_P (op1))
{ {
val = INTVAL (op1) & (GET_MODE_PRECISION (mode) - 1); val = INTVAL (op1) & (GET_MODE_UNIT_PRECISION (mode) - 1);
if (val != INTVAL (op1)) if (val != INTVAL (op1))
return simplify_gen_binary (code, mode, op0, GEN_INT (val)); return simplify_gen_binary (code, mode, op0, GEN_INT (val));
} }
...@@ -3408,7 +3412,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode, ...@@ -3408,7 +3412,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
&& is_a <scalar_int_mode> (GET_MODE (XEXP (op0, 0)), &inner_mode) && is_a <scalar_int_mode> (GET_MODE (XEXP (op0, 0)), &inner_mode)
&& CONST_INT_P (trueop1) && CONST_INT_P (trueop1)
&& STORE_FLAG_VALUE == 1 && STORE_FLAG_VALUE == 1
&& INTVAL (trueop1) < (HOST_WIDE_INT)width) && INTVAL (trueop1) < GET_MODE_UNIT_PRECISION (mode))
{ {
unsigned HOST_WIDE_INT zero_val = 0; unsigned HOST_WIDE_INT zero_val = 0;
......
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