The test fails for avr because fn1 does not get inlined into fn2. Inlining
occurs for x86_64 because fn1's computed size equals call_stmt_size. For the
avr, 32 bit memory moves are more expensive, and b[3] = p10[a] results in 
a bigger size for fn1, preventing the inlining.

Add -finline-small-functions to force early inliner to inline fn1.

gcc/testsuite/
2016-11-23  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>

	* gcc.dg/uninit-19.c: Add -finline-small-functions for avr.

From-SVN: r242742

gcc/
	PR target/60300
	* config/avr/constraints.md (Csp): Widen range to [-11..6].
	* config/avr/avr.c (avr_prologue_setup_frame): Limit number
	of RCALLs in prologue to 3.

From-SVN: r242741

re PR target/78451 (FAIL: gcc.target/i386/sse-22a.c: error: inlining failed in call to always_inline '_mm512_setzero_ps')

	PR target/78451
	* c-pragma.c (handle_pragma_target): Don't replace
	current_target_pragma, but chainon the new args to the current one.

	* gcc.target/i386/pr78451.c: New test.
	* gcc.target/i386/pr69255-1.c: Use #pragma GCC push_options
	and #pragma GCC pop_options around the first #pragma GCC target.
	* gcc.target/i386/pr69255-2.c: Likewise.
	* gcc.target/i386/pr69255-3.c: Likewise.

From-SVN: r242740

	* config/aarch64/aarch64-protos.h
	(aarch64_and_split_imm1, aarch64_and_split_imm2)
	(aarch64_and_bitmask_imm): New prototypes
	* config/aarch64/aarch64.c (aarch64_and_split_imm1):
	New overloaded function to create bit mask covering the
	lowest to highest bits set.
	(aarch64_and_split_imm2): New overloaded functions to create bit
	mask of zeros between first and last bit set.
	(aarch64_and_bitmask_imm): New function to determine if a integer
	is a valid two instruction "and" operation.
	* config/aarch64/aarch64.md:(and<mode>3): New define_insn and _split
	allowing wider range of constants with "and" operations.
	* (ior<mode>3, xor<mode>3): Use new LOGICAL2 iterator to prevent
	"and" operator from matching restricted constant range used for
	ior and xor operators.
	* config/aarch64/constraints.md (UsO constraint): New SImode constraint
	for constants in "and" operantions.
	(UsP constraint): New DImode constraint for constants in "and" operations.
	* config/aarch64/iterators.md (lconst2): New mode iterator.
	(LOGICAL2): New code iterator.
	* config/aarch64/predicates.md (aarch64_logical_and_immediate): New
	predicate
	(aarch64_logical_and_operand): New predicate allowing extended constants
	for "and" operations.
	* testsuite/gcc.target/aarch64/and_const.c: New test to verify
	additional constants are recognized and fewer instructions generated.
	* testsuite/gcc.target/aarch64/and_const2.c: New test to verify
	additional constants are recognized and fewer instructions generated.

From-SVN: r242739

	* gcc.misc-tests/godump-1.c: Update expected output for recent
	changes.

From-SVN: r242738

	* config/tilegx/tilegx.md (trap): New pattern.
	* config/tilepro/tilepro.md (trap): Likewise.

From-SVN: r242735

TILE-Gx: fixes the zero_extract/sign_extract patterns so that they
properly handle the case when pos + size > number of bits in a word.

	* config/tilegx/tilegx.md (*zero_extract): Use
	  define_insn_and_split instead of define_insn; Handle pos +
	  size > 64.
	  (*sign_extract): Likewise.

From-SVN: r242734

	PR tree-optimization/78455
	* tree-ssa-uninit.c (can_chain_union_be_invalidated_p): Fix typo.

	* gcc.dg/uninit-23.c: New.

From-SVN: r242733

From-SVN: r242732

2016-11-22  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/78479
	* gfortran.dg/char_component_initializer_3.f90: Add PR number in a
	comment.

From-SVN: r242729

	PR go/78431
	PR go/78432
	* godump.c (go_format_type): Always pass alignment as 1 when
	calling go_append_padding at end of struct/union.

From-SVN: r242728

    
    Relocate the code that encodes/sanitizes identifiers to make them
    assembler-friendly, moving it from the back end to the front end; the
    decisions about when to encode an identifier and the calls to the
    encoding helpers now take place entirely in gofrontend.
    
    Reviewed-on: https://go-review.googlesource.com/33424

	* go-gcc.cc (char_needs_encoding): Remove.
	(needs_encoding, fetch_utf8_char, encode_id): Remove.
	(Gcc_backend::global_variable): Add asm_name parameter.  Don't
	compute asm_name here.
	(Gcc_backend::implicit_variable): Likewise.
	(Gcc_backend::implicit_variable_reference): Likewise.
	(Gcc_backend::immutable_struct): Likewise.
	(Gcc_backend::immutable_struct_reference): Likewise.
	* Make-lang.in (GO_OBJS): Add go/go-encode-id.o.

From-SVN: r242726

2016-11-22  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/78479
	* expr.c (gfc_apply_init):  Allocate a charlen if needed.

2016-11-22  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/78479
	* gfortran.dg/char_component_initializer_3.f90: New test.

From-SVN: r242725

	PR go/77910
    cmd/go: don't check standard packages when using gccgo
    
    This copies https://golang.org/cl/33295 to libgo.
    
    This fixes GCC PR 77910.
    
    Reviewed-on: https://go-review.googlesource.com/33471

From-SVN: r242724

re PR target/78451 (FAIL: gcc.target/i386/sse-22a.c: error: inlining failed in call to always_inline '_mm512_setzero_ps')

	PR target/78451
	* config/i386/avx512bwintrin.h (_mm512_setzero_qi,
	_mm512_setzero_hi): Removed.
	(_mm512_maskz_mov_epi16, _mm512_maskz_loadu_epi16,
	_mm512_maskz_mov_epi8, _mm512_maskz_loadu_epi8,
	_mm512_maskz_broadcastb_epi8, _mm512_maskz_set1_epi8,
	_mm512_maskz_broadcastw_epi16, _mm512_maskz_set1_epi16,
	_mm512_mulhrs_epi16, _mm512_maskz_mulhrs_epi16, _mm512_mulhi_epi16,
	_mm512_maskz_mulhi_epi16, _mm512_mulhi_epu16,
	_mm512_maskz_mulhi_epu16, _mm512_maskz_mullo_epi16,
	_mm512_cvtepi8_epi16, _mm512_maskz_cvtepi8_epi16, _mm512_cvtepu8_epi16,
	_mm512_maskz_cvtepu8_epi16, _mm512_permutexvar_epi16,
	_mm512_maskz_permutexvar_epi16, _mm512_avg_epu8, _mm512_maskz_avg_epu8,
	_mm512_maskz_add_epi8, _mm512_maskz_sub_epi8, _mm512_avg_epu16,
	_mm512_maskz_avg_epu16, _mm512_subs_epi8, _mm512_maskz_subs_epi8,
	_mm512_subs_epu8, _mm512_maskz_subs_epu8, _mm512_adds_epi8,
	_mm512_maskz_adds_epi8, _mm512_adds_epu8, _mm512_maskz_adds_epu8,
	_mm512_maskz_sub_epi16, _mm512_subs_epi16, _mm512_maskz_subs_epi16,
	_mm512_subs_epu16, _mm512_maskz_subs_epu16, _mm512_maskz_add_epi16,
	_mm512_adds_epi16, _mm512_maskz_adds_epi16, _mm512_adds_epu16,
	_mm512_maskz_adds_epu16, _mm512_srl_epi16, _mm512_maskz_srl_epi16,
	_mm512_packs_epi16, _mm512_sll_epi16, _mm512_maskz_sll_epi16,
	_mm512_maddubs_epi16, _mm512_maskz_maddubs_epi16, _mm512_unpackhi_epi8,
	_mm512_maskz_unpackhi_epi8, _mm512_unpackhi_epi16,
	_mm512_maskz_unpackhi_epi16, _mm512_unpacklo_epi8,
	_mm512_maskz_unpacklo_epi8, _mm512_unpacklo_epi16,
	_mm512_maskz_unpacklo_epi16, _mm512_shuffle_epi8,
	_mm512_maskz_shuffle_epi8, _mm512_min_epu16, _mm512_maskz_min_epu16,
	_mm512_min_epi16, _mm512_maskz_min_epi16, _mm512_max_epu8,
	_mm512_maskz_max_epu8, _mm512_max_epi8, _mm512_maskz_max_epi8,
	_mm512_min_epu8, _mm512_maskz_min_epu8, _mm512_min_epi8,
	_mm512_maskz_min_epi8, _mm512_max_epi16, _mm512_maskz_max_epi16,
	_mm512_max_epu16, _mm512_maskz_max_epu16, _mm512_sra_epi16,
	_mm512_maskz_sra_epi16, _mm512_srav_epi16, _mm512_maskz_srav_epi16,
	_mm512_srlv_epi16, _mm512_maskz_srlv_epi16, _mm512_sllv_epi16,
	_mm512_maskz_sllv_epi16, _mm512_maskz_packs_epi16, _mm512_packus_epi16,
	_mm512_maskz_packus_epi16, _mm512_abs_epi8, _mm512_maskz_abs_epi8,
	_mm512_abs_epi16, _mm512_maskz_abs_epi16, _mm512_dbsad_epu8,
	_mm512_maskz_dbsad_epu8, _mm512_srli_epi16, _mm512_maskz_srli_epi16,
	_mm512_slli_epi16, _mm512_maskz_slli_epi16, _mm512_shufflehi_epi16,
	_mm512_maskz_shufflehi_epi16, _mm512_shufflelo_epi16,
	_mm512_maskz_shufflelo_epi16, _mm512_srai_epi16,
	_mm512_maskz_srai_epi16, _mm512_packs_epi32,
	_mm512_maskz_packs_epi32, _mm512_packus_epi32,
	_mm512_maskz_packus_epi32): Use _mm512_setzero_si512 instead of
	_mm512_setzero_qi or _mm512_setzero_hi.
	(_mm512_maskz_alignr_epi8, _mm512_dbsad_epu8,
	_mm512_maskz_dbsad_epu8): Formatting fixes.
	(_mm512_srli_epi16, _mm512_maskz_srli_epi16, _mm512_slli_epi16,
	_mm512_maskz_slli_epi16, _mm512_shufflehi_epi16,
	_mm512_maskz_shufflehi_epi16, _mm512_shufflelo_epi16,
	_mm512_maskz_shufflelo_epi16, _mm512_srai_epi16,
	_mm512_maskz_srai_epi16): Use _mm512_setzero_si512 instead of
	_mm512_setzero_qi or _mm512_setzero_hi.

From-SVN: r242723

	* array-notation-common.c (cilkplus_extract_an_trplets): Fix
	indentation and formatting.

From-SVN: r242721

	gcc/
	* gcc-ar.c (main): Fix indentation.
	* gcov-io.c (gcov_write_summary): Remove extraneous {...}
	* ggc-page.c (move_ptes_to_front): Fix formatting.
	* hsa-dump.c (dump_has_cfun): Fix indentation.
	* sel-sched-ir.h: Remove trailing blank lines.

	gcc/c-family/
	* array-notation-common.c (cilkplus_extrat_an_triplets): Fix
	indentation.

From-SVN: r242719

    
    The actual stack unwind code is still in C, but the rest of the code,
    notably all the memory allocation, is now in Go.  The names are changed
    to the names used in the Go 1.7 runtime, but the code is necessarily
    somewhat different.
    
    The __go_makefunc_can_recover function is dropped, as the uses of it
    were removed in https://golang.org/cl/198770044.
    
    Reviewed-on: https://go-review.googlesource.com/33414

From-SVN: r242715

2016-11-22  Jakub Jelinek  <jakub@redhat.com>
            Alexander Monakov  <amonakov@ispras.ru>

	* internal-fn.c (expand_GOMP_USE_SIMT): New function.
	* tree.c (omp_clause_num_ops): OMP_CLAUSE__SIMT_ has 0 operands.
	(omp_clause_code_name): Add _simt_ name.
	(walk_tree_1): Handle OMP_CLAUSE__SIMT_.
	* tree-core.h (enum omp_clause_code): Add OMP_CLAUSE__SIMT_.
	* omp-low.c (scan_sharing_clauses): Handle OMP_CLAUSE__SIMT_.
	(scan_omp_simd): New function.
	(scan_omp_1_stmt): Use it in target regions if needed.
	(omp_max_vf): Don't max with omp_max_simt_vf.
	(lower_rec_simd_input_clauses): Use omp_max_simt_vf if
	OMP_CLAUSE__SIMT_ is present.
	(lower_rec_input_clauses): Compute maybe_simt from presence of
	OMP_CLAUSE__SIMT_.
	(lower_lastprivate_clauses): Likewise.
	(expand_omp_simd): Likewise.
	(execute_omp_device_lower): Lower IFN_GOMP_USE_SIMT.
	* internal-fn.def (GOMP_USE_SIMT): New internal function.
	* tree-pretty-print.c (dump_omp_clause): Handle OMP_CLAUSE__SIMT_.

Co-Authored-By: Alexander Monakov <amonakov@ispras.ru>

From-SVN: r242714

From-SVN: r242711

	* internal-fn.c (expand_GOMP_SIMT_LANE): New.
	(expand_GOMP_SIMT_VF): New.
	(expand_GOMP_SIMT_LAST_LANE): New.
	(expand_GOMP_SIMT_ORDERED_PRED): New.
	(expand_GOMP_SIMT_VOTE_ANY): New.
	(expand_GOMP_SIMT_XCHG_BFLY): New.
	(expand_GOMP_SIMT_XCHG_IDX): New.
	* internal-fn.def (GOMP_SIMT_LANE): New.
	(GOMP_SIMT_VF): New.
	(GOMP_SIMT_LAST_LANE): New.
	(GOMP_SIMT_ORDERED_PRED): New.
	(GOMP_SIMT_VOTE_ANY): New.
	(GOMP_SIMT_XCHG_BFLY): New.
	(GOMP_SIMT_XCHG_IDX): New.
	* omp-low.c (omp_maybe_offloaded_ctx): New, outlined from...
	(create_omp_child_function): ...here.  Set "omp target entrypoint"
	or "omp declare target" attribute based on is_gimple_omp_offloaded.
	(omp_max_simt_vf): New.  Use it...
	(omp_max_vf): ...here.
	(lower_rec_input_clauses): Add reduction lowering for SIMT execution.
	(lower_lastprivate_clauses): Likewise, for "lastprivate" lowering.
	(lower_omp_ordered): Likewise, for "ordered" lowering.
	(expand_omp_simd): Add SIMT transforms.
	(pass_data_lower_omp): Add PROP_gimple_lomp_dev.
	(execute_omp_device_lower): New.
	(pass_data_omp_device_lower): New.
	(pass_omp_device_lower): New pass.
	(make_pass_omp_device_lower): New.
	* passes.def (pass_omp_device_lower): Position new pass.
	* tree-pass.h (PROP_gimple_lomp_dev): Define.
	(make_pass_omp_device_lower): Declare.

From-SVN: r242710

re PR target/78451 (FAIL: gcc.target/i386/sse-22a.c: error: inlining failed in call to always_inline '_mm512_setzero_ps')

	PR target/78451
	* gcc.target/i386/sse-22.c: Add avx5124fmaps,avx5124vnniw to
	GCC target pragma before including immintrin.h.

From-SVN: r242708

re PR target/78451 (FAIL: gcc.target/i386/sse-22a.c: error: inlining failed in call to always_inline '_mm512_setzero_ps')

	PR target/78451
	* config/i386/avx512vlintrin.h (_mm_setzero_di): Removed.
	(_mm_maskz_mov_epi64): Use _mm_setzero_si128 instead of
	_mm_setzero_di.
	(_mm_maskz_load_epi64): Likewise.
	(_mm_setzero_hi): Removed.
	(_mm_maskz_loadu_epi64): Use _mm_setzero_si128 instead of
	_mm_setzero_di.
	(_mm_abs_epi64, _mm_maskz_abs_epi64, _mm_maskz_srl_epi64,
	_mm_maskz_unpackhi_epi64, _mm_maskz_unpacklo_epi64,
	_mm_maskz_compress_epi64, _mm_srav_epi64, _mm_maskz_srav_epi64,
	_mm_maskz_sllv_epi64, _mm_maskz_srlv_epi64, _mm_rolv_epi64,
	_mm_maskz_rolv_epi64, _mm_rorv_epi64, _mm_maskz_rorv_epi64,
	_mm_min_epi64, _mm_max_epi64, _mm_max_epu64, _mm_min_epu64,
	_mm_lzcnt_epi64, _mm_maskz_lzcnt_epi64, _mm_conflict_epi64,
	_mm_maskz_conflict_epi64, _mm_sra_epi64, _mm_maskz_sra_epi64,
	_mm_maskz_sll_epi64, _mm_rol_epi64, _mm_maskz_rol_epi64,
	_mm_ror_epi64, _mm_maskz_ror_epi64, _mm_alignr_epi64,
	_mm_maskz_alignr_epi64, _mm_srai_epi64, _mm_maskz_slli_epi64):
	Likewise.
	(_mm_cvtepi32_epi8, _mm256_cvtepi32_epi8, _mm_cvtsepi32_epi8,
	_mm256_cvtsepi32_epi8, _mm_cvtusepi32_epi8, _mm256_cvtusepi32_epi8,
	_mm_cvtepi32_epi16, _mm256_cvtepi32_epi16, _mm_cvtsepi32_epi16,
	_mm256_cvtsepi32_epi16, _mm_cvtusepi32_epi16, _mm256_cvtusepi32_epi16,
	_mm_cvtepi64_epi8, _mm256_cvtepi64_epi8, _mm_cvtsepi64_epi8,
	_mm256_cvtsepi64_epi8, _mm_cvtusepi64_epi8, _mm256_cvtusepi64_epi8,
	_mm_cvtepi64_epi16, _mm256_cvtepi64_epi16, _mm_cvtsepi64_epi16,
	_mm256_cvtsepi64_epi16, _mm_cvtusepi64_epi16, _mm256_cvtusepi64_epi16,
	_mm_cvtepi64_epi32, _mm256_cvtepi64_epi32, _mm_cvtsepi64_epi32,
	_mm256_cvtsepi64_epi32, _mm_cvtusepi64_epi32, _mm256_cvtusepi64_epi32,
	_mm_maskz_set1_epi32, _mm_maskz_set1_epi64): Formatting fixes.
	(_mm_maskz_cvtps_ph, _mm256_maskz_cvtps_ph): Use _mm_setzero_si128
	instead of _mm_setzero_hi.
	(_mm256_permutex_pd, _mm256_maskz_permutex_epi64, _mm256_insertf32x4,
	_mm256_maskz_insertf32x4, _mm256_inserti32x4, _mm256_maskz_inserti32x4,
	_mm256_extractf32x4_ps, _mm256_maskz_extractf32x4_ps,
	_mm256_shuffle_i32x4, _mm256_maskz_shuffle_i32x4, _mm256_shuffle_f64x2,
	_mm256_maskz_shuffle_f64x2, _mm256_shuffle_f32x4,
	_mm256_maskz_shuffle_f32x4, _mm256_maskz_shuffle_pd,
	_mm_maskz_shuffle_pd, _mm256_maskz_shuffle_ps, _mm_maskz_shuffle_ps,
	_mm256_maskz_srli_epi32, _mm_maskz_srli_epi32, _mm_maskz_srli_epi64,
	_mm256_mask_slli_epi32, _mm256_maskz_slli_epi32, _mm256_mask_slli_epi64,
	_mm256_maskz_slli_epi64, _mm256_roundscale_ps,
	_mm256_maskz_roundscale_ps, _mm256_roundscale_pd,
	_mm256_maskz_roundscale_pd, _mm_roundscale_ps, _mm_maskz_roundscale_ps,
	_mm_roundscale_pd, _mm_maskz_roundscale_pd, _mm256_getmant_ps,
	_mm256_maskz_getmant_ps, _mm_getmant_ps, _mm_maskz_getmant_ps,
	_mm256_getmant_pd, _mm256_maskz_getmant_pd, _mm_getmant_pd,
	_mm_maskz_getmant_pd, _mm256_maskz_shuffle_epi32,
	_mm_maskz_shuffle_epi32, _mm256_rol_epi32, _mm256_maskz_rol_epi32,
	_mm_rol_epi32, _mm_maskz_rol_epi32, _mm256_ror_epi32,
	_mm256_maskz_ror_epi32, _mm_ror_epi32, _mm_maskz_ror_epi32,
	_mm_maskz_alignr_epi32, _mm_maskz_alignr_epi64,
	_mm256_maskz_srai_epi32, _mm_maskz_srai_epi32, _mm_srai_epi64,
	_mm_maskz_srai_epi64, _mm256_maskz_permutex_pd,
	_mm256_maskz_permute_pd, _mm256_maskz_permute_ps, _mm_maskz_permute_pd,
	_mm_maskz_permute_ps, _mm256_permutexvar_ps): Formatting fixes.
	(_mm_maskz_slli_epi64, _mm_rol_epi64, _mm_maskz_rol_epi64,
	_mm_ror_epi64, _mm_maskz_ror_epi64): Use _mm_setzero_si128 instead of
	_mm_setzero_di.
	(_mm_maskz_cvtps_ph, _mm256_maskz_cvtps_ph): Use _mm_setzero_si128
	instead of _mm_setzero_hi.
	* config/i386/avx512dqintrin.h (_mm512_broadcast_f64x2,
	_mm512_broadcast_i64x2, _mm512_broadcast_f32x2, _mm512_broadcast_i32x2,
	_mm512_broadcast_f32x8, _mm512_broadcast_i32x8): Formatting fixes.
	(_mm512_extracti64x2_epi64, _mm512_maskz_extracti64x2_epi64): Use
	_mm_setzero_si128 instead of _mm_setzero_di.
	(_mm512_cvtt_roundpd_epi64, _mm512_mask_cvtt_roundpd_epi64,
	_mm512_maskz_cvtt_roundpd_epi64, _mm512_cvtt_roundpd_epu64,
	_mm512_mask_cvtt_roundpd_epu64, _mm512_maskz_cvtt_roundpd_epu64,
	_mm512_cvtt_roundps_epi64, _mm512_mask_cvtt_roundps_epi64,
	_mm512_maskz_cvtt_roundps_epi64, _mm512_cvtt_roundps_epu64,
	_mm512_mask_cvtt_roundps_epu64, _mm512_maskz_cvtt_roundps_epu64,
	_mm512_cvt_roundpd_epi64, _mm512_mask_cvt_roundpd_epi64,
	_mm512_maskz_cvt_roundpd_epi64, _mm512_cvt_roundpd_epu64,
	_mm512_mask_cvt_roundpd_epu64, _mm512_maskz_cvt_roundpd_epu64,
	_mm512_cvt_roundps_epi64, _mm512_mask_cvt_roundps_epi64,
	_mm512_maskz_cvt_roundps_epi64, _mm512_cvt_roundps_epu64,
	_mm512_mask_cvt_roundps_epu64, _mm512_maskz_cvt_roundps_epu64,
	_mm512_cvt_roundepi64_ps, _mm512_mask_cvt_roundepi64_ps,
	_mm512_maskz_cvt_roundepi64_ps, _mm512_cvt_roundepu64_ps,
	_mm512_mask_cvt_roundepu64_ps, _mm512_maskz_cvt_roundepu64_ps,
	_mm512_cvt_roundepi64_pd, _mm512_mask_cvt_roundepi64_pd,
	_mm512_maskz_cvt_roundepi64_pd, _mm512_cvt_roundepu64_pd,
	_mm512_mask_cvt_roundepu64_pd, _mm512_maskz_cvt_roundepu64_pd,
	_mm512_reduce_pd, _mm512_maskz_reduce_pd, _mm512_reduce_ps,
	_mm512_maskz_reduce_ps, _mm512_extractf32x8_ps,
	_mm512_maskz_extractf32x8_ps, _mm512_extractf64x2_pd,
	_mm512_maskz_extractf64x2_pd, _mm512_extracti32x8_epi32,
	_mm512_maskz_extracti32x8_epi32, _mm512_range_pd,
	_mm512_maskz_range_pd, _mm512_range_ps, _mm512_maskz_range_ps,
	_mm512_range_round_pd, _mm512_maskz_range_round_pd,
	_mm512_range_round_ps, _mm512_maskz_range_round_ps,
	_mm512_maskz_insertf64x2, _mm512_insertf32x8,
	_mm512_maskz_insertf32x8): Formatting fixes.
	(_mm512_extracti64x2_epi64, _mm512_maskz_extracti64x2_epi64): Use
	_mm_setzero_si128 instead of _mm_setzero_di.
	* config/i386/avx512vldqintrin.h (_mm_cvttpd_epi64,
	_mm_cvttpd_epu64, _mm_cvtpd_epi64, _mm_cvtpd_epu64,
	_mm_cvttps_epi64, _mm_maskz_cvttps_epi64, _mm_cvttps_epu64,
	_mm_maskz_cvttps_epu64, _mm_maskz_mullo_epi64, _mm_cvtps_epi64,
	_mm_maskz_cvtps_epi64, _mm_cvtps_epu64, _mm_maskz_cvtps_epu64,
	_mm256_extracti64x2_epi64, _mm256_maskz_extracti64x2_epi64): Use
	_mm_setzero_si128 instead of _mm_setzero_di.
	(_mm256_extracti64x2_epi64, _mm256_maskz_extracti64x2_epi64):
	Likewise in macros.
	* config/i386/avx512vlbwintrin.h (_mm_maskz_mov_epi8,
	_mm_maskz_loadu_epi16, _mm_maskz_mov_epi16, _mm_maskz_loadu_epi8,
	_mm_permutexvar_epi16, _mm_maskz_maddubs_epi16): Use
	_mm_setzero_si128 instead of _mm_setzero_hi.
	(_mm_maskz_min_epu16, _mm_maskz_max_epu8, _mm_maskz_max_epi8,
	_mm_maskz_min_epu8, _mm_maskz_min_epi8, _mm_maskz_max_epi16,
	_mm_maskz_max_epu16, _mm_maskz_min_epi16): Use _mm_setzero_si128
	instead of _mm_setzero_di.
	(_mm_dbsad_epu8, _mm_maskz_shufflehi_epi16,
	_mm_maskz_shufflelo_epi16): Use _mm_setzero_si128 instead of
	_mm_setzero_hi.
	(_mm_maskz_shufflehi_epi16, _mm_maskz_shufflelo_epi16,
	_mm_maskz_slli_epi16): Use _mm_setzero_si128 instead of
	_mm_setzero_hi.
	(_mm_maskz_alignr_epi8): Use _mm_setzero_si128 instead of
	_mm_setzero_di.
	(_mm_maskz_mulhi_epi16, _mm_maskz_mulhi_epu16, _mm_maskz_mulhrs_epi16,
	_mm_maskz_mullo_epi16, _mm_srav_epi16, _mm_srlv_epi16,
	_mm_sllv_epi16): Use _mm_setzero_si128 instead of _mm_setzero_hi.

From-SVN: r242707

gcc/ChangeLog:

2016-11-21  Carl Love  <cel@us.ibm.com>

        * config/rs6000/rs6000-c.c: Add built-in support for vector compare
        equal and vector compare not equal.  The vector compares take two
        arguments of type vector bool char, vector bool short, vector bool int,
        vector bool long long with the same return type.
        * doc/extend.texi: Update built-in documentation file for the new
        powerpc built-ins.

gcc/testsuite/ChangeLog:

2016-11-21  Carl Love  <cel@us.ibm.com>

        * gcc.target/powerpc/builtins-3.c: New file to test the new
        built-ins for vector compare equal and vector compare not equal.

From-SVN: r242706

gcc/ChangeLog

	* Makefile.in ($(lang_checks_parallelized)): Fix detection
	of -j argument.

gcc/ada/ChangeLog

	* gcc-interface/Make-lang.in (check-acats): Fix detection
	of -j argument.

libstdc++-v3/ChangeLog

	* testsuite/Makefile.am
	(check-DEJAGNU $(check_DEJAGNU_normal_targets)): Fix detection
	of -j argument.
	* testsuite/Makefile.in: Regenereate.

From-SVN: r242705

	PR libstdc++/78465
	* testsuite/29_atomics/headers/atomic/macros.cc: Replace runtime tests
	with preprocessor conditions.

From-SVN: r242704

2016-11-22  Janus Weil  <janus@gcc.gnu.org>

	PR fortran/78443
	* class.c (add_proc_comp): Add a vtype component for non-overridable
	procedures that are overriding.

2016-11-22  Janus Weil  <janus@gcc.gnu.org>

	PR fortran/78443
	* gfortran.dg/typebound_proc_35.f90: New test case.

From-SVN: r242703

gcc/testsuite/
	* gcc.c-torture/execute/pr30778.c (memset): Use size_t for 3rd
	parameter in declaration.

From-SVN: r242702

gcc/testsuite/
	* gcc.dg/loop-split.c: Require int32plus.
	* gcc.dg/stack-layout-dynamic-1.c: Require ptr32plus.

From-SVN: r242701

2016-11-22  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        * gcc.target/arm/pr53447-5.c: Fix test expectations for neon-fpu.

From-SVN: r242700

gcc/testsuite/
	* c-c++-common/builtin-shuffle-1.c (V): Use 4 * int in vector.

From-SVN: r242697

2016-11-22  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config.gcc: Allow new rmprofile value for configure option
    --with-multilib-list.
    * config/arm/t-rmprofile: New file.
    * doc/install.texi (--with-multilib-list): Document new rmprofile value
    for ARM.

From-SVN: r242696

	PR target/78439
	* config/arm/vfp.md (*movdi_vfp_cortexa8): Use 'q' constraints for the
	register operand in alternatives 4,5,6.

	* gcc.c-torture/compile/pr78439.c: New test.

From-SVN: r242695

re PR target/77904 ([ARM Cortex-M0] Frame pointer thrashes registers if assembly statements with "sp" clobber are used)

2016-11-22  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    PR target/77904
    * config/arm/arm.c (thumb1_compute_save_reg_mask): Mark frame pointer
    in save register mask if it is needed.

    gcc/testsuite/
    PR target/77904
    * gcc.target/arm/pr77904.c: New test.

From-SVN: r242693

gcc/testsuite/

	* gcc.target/mips/interrupt_handler-bug-1.c (dg-options): Add
	isa_rev>=2.

From-SVN: r242692

	PR tree-optimization/78436
	* gimple-ssa-store-merging.c (zero_char_buf): Removed.
	(shift_bytes_in_array, shift_bytes_in_array_right,
	merged_store_group::apply_stores): Formatting fixes.
	(clear_bit_region): Likewise.  Use memset.
	(encode_tree_to_bitpos): Formatting fixes.  Fix comment typos - EPXR
	instead of EXPR and inerted instead of inserted.  Use memset instead
	of zero_char_buf.  For !BYTES_BIG_ENDIAN decrease byte_size by 1
	if shift_amnt is 0.

	* gcc.c-torture/execute/pr78436.c: New test.

From-SVN: r242691

	PR middle-end/78416
	* expmed.c (expand_divmod): Use wide_int for computation of
	op1_is_pow2.  Don't set it if op1 is 0.  Formatting fixes.
	Use size <= HOST_BITS_PER_WIDE_INT instead of
	HOST_BITS_PER_WIDE_INT >= size.

	* gcc.dg/torture/pr78416.c: New test.

From-SVN: r242690

	PR tree-optimization/78445
	* tree-if-conv.c (tree_if_conversion): If any_pred_load_store or
	any_complicated_phi, version loop even if flag_tree_loop_if_convert is
	1.  Formatting fix.

	* gcc.dg/pr78445.c: New test.

From-SVN: r242689

ARM and AArch64 may not support trapping so runtime and
compile time check can differ.

gcc/testsuite/
	PR libgfortran/78449 
	* gfortran.dg/ieee/ieee_8.f90 (aarch64*gnu, arm*gnu*): Mark xfail.

From-SVN: r242688

	PR ipa/78309
	* ipa-icf.c (void sem_item::set_hash): Update m_hash_set.
	(sem_function::get_hash): Use the new field.
	(sem_function::parse): Remove an argument from ctor.
	(sem_variable::parse): Likewise.
	(sem_variable::get_hash): Use the new field.
	(sem_item_optimizer::read_section): Use new ctor and set hash.
	* ipa-icf.h: _hash is removed from sem_item::sem_item,
	sem_variable::sem_variable, sem_function::sem_function.

From-SVN: r242687