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Commit a25a7887 by Jakub Jelinek Committed by Jakub Jelinek
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re PR target/78451 (FAIL: gcc.target/i386/sse-22a.c: error: inlining failed in… 

re PR target/78451 (FAIL: gcc.target/i386/sse-22a.c: error: inlining failed in call to always_inline '_mm512_setzero_ps')

	PR target/78451
	* config/i386/avx512vlintrin.h (_mm_setzero_di): Removed.
	(_mm_maskz_mov_epi64): Use _mm_setzero_si128 instead of
	_mm_setzero_di.
	(_mm_maskz_load_epi64): Likewise.
	(_mm_setzero_hi): Removed.
	(_mm_maskz_loadu_epi64): Use _mm_setzero_si128 instead of
	_mm_setzero_di.
	(_mm_abs_epi64, _mm_maskz_abs_epi64, _mm_maskz_srl_epi64,
	_mm_maskz_unpackhi_epi64, _mm_maskz_unpacklo_epi64,
	_mm_maskz_compress_epi64, _mm_srav_epi64, _mm_maskz_srav_epi64,
	_mm_maskz_sllv_epi64, _mm_maskz_srlv_epi64, _mm_rolv_epi64,
	_mm_maskz_rolv_epi64, _mm_rorv_epi64, _mm_maskz_rorv_epi64,
	_mm_min_epi64, _mm_max_epi64, _mm_max_epu64, _mm_min_epu64,
	_mm_lzcnt_epi64, _mm_maskz_lzcnt_epi64, _mm_conflict_epi64,
	_mm_maskz_conflict_epi64, _mm_sra_epi64, _mm_maskz_sra_epi64,
	_mm_maskz_sll_epi64, _mm_rol_epi64, _mm_maskz_rol_epi64,
	_mm_ror_epi64, _mm_maskz_ror_epi64, _mm_alignr_epi64,
	_mm_maskz_alignr_epi64, _mm_srai_epi64, _mm_maskz_slli_epi64):
	Likewise.
	(_mm_cvtepi32_epi8, _mm256_cvtepi32_epi8, _mm_cvtsepi32_epi8,
	_mm256_cvtsepi32_epi8, _mm_cvtusepi32_epi8, _mm256_cvtusepi32_epi8,
	_mm_cvtepi32_epi16, _mm256_cvtepi32_epi16, _mm_cvtsepi32_epi16,
	_mm256_cvtsepi32_epi16, _mm_cvtusepi32_epi16, _mm256_cvtusepi32_epi16,
	_mm_cvtepi64_epi8, _mm256_cvtepi64_epi8, _mm_cvtsepi64_epi8,
	_mm256_cvtsepi64_epi8, _mm_cvtusepi64_epi8, _mm256_cvtusepi64_epi8,
	_mm_cvtepi64_epi16, _mm256_cvtepi64_epi16, _mm_cvtsepi64_epi16,
	_mm256_cvtsepi64_epi16, _mm_cvtusepi64_epi16, _mm256_cvtusepi64_epi16,
	_mm_cvtepi64_epi32, _mm256_cvtepi64_epi32, _mm_cvtsepi64_epi32,
	_mm256_cvtsepi64_epi32, _mm_cvtusepi64_epi32, _mm256_cvtusepi64_epi32,
	_mm_maskz_set1_epi32, _mm_maskz_set1_epi64): Formatting fixes.
	(_mm_maskz_cvtps_ph, _mm256_maskz_cvtps_ph): Use _mm_setzero_si128
	instead of _mm_setzero_hi.
	(_mm256_permutex_pd, _mm256_maskz_permutex_epi64, _mm256_insertf32x4,
	_mm256_maskz_insertf32x4, _mm256_inserti32x4, _mm256_maskz_inserti32x4,
	_mm256_extractf32x4_ps, _mm256_maskz_extractf32x4_ps,
	_mm256_shuffle_i32x4, _mm256_maskz_shuffle_i32x4, _mm256_shuffle_f64x2,
	_mm256_maskz_shuffle_f64x2, _mm256_shuffle_f32x4,
	_mm256_maskz_shuffle_f32x4, _mm256_maskz_shuffle_pd,
	_mm_maskz_shuffle_pd, _mm256_maskz_shuffle_ps, _mm_maskz_shuffle_ps,
	_mm256_maskz_srli_epi32, _mm_maskz_srli_epi32, _mm_maskz_srli_epi64,
	_mm256_mask_slli_epi32, _mm256_maskz_slli_epi32, _mm256_mask_slli_epi64,
	_mm256_maskz_slli_epi64, _mm256_roundscale_ps,
	_mm256_maskz_roundscale_ps, _mm256_roundscale_pd,
	_mm256_maskz_roundscale_pd, _mm_roundscale_ps, _mm_maskz_roundscale_ps,
	_mm_roundscale_pd, _mm_maskz_roundscale_pd, _mm256_getmant_ps,
	_mm256_maskz_getmant_ps, _mm_getmant_ps, _mm_maskz_getmant_ps,
	_mm256_getmant_pd, _mm256_maskz_getmant_pd, _mm_getmant_pd,
	_mm_maskz_getmant_pd, _mm256_maskz_shuffle_epi32,
	_mm_maskz_shuffle_epi32, _mm256_rol_epi32, _mm256_maskz_rol_epi32,
	_mm_rol_epi32, _mm_maskz_rol_epi32, _mm256_ror_epi32,
	_mm256_maskz_ror_epi32, _mm_ror_epi32, _mm_maskz_ror_epi32,
	_mm_maskz_alignr_epi32, _mm_maskz_alignr_epi64,
	_mm256_maskz_srai_epi32, _mm_maskz_srai_epi32, _mm_srai_epi64,
	_mm_maskz_srai_epi64, _mm256_maskz_permutex_pd,
	_mm256_maskz_permute_pd, _mm256_maskz_permute_ps, _mm_maskz_permute_pd,
	_mm_maskz_permute_ps, _mm256_permutexvar_ps): Formatting fixes.
	(_mm_maskz_slli_epi64, _mm_rol_epi64, _mm_maskz_rol_epi64,
	_mm_ror_epi64, _mm_maskz_ror_epi64): Use _mm_setzero_si128 instead of
	_mm_setzero_di.
	(_mm_maskz_cvtps_ph, _mm256_maskz_cvtps_ph): Use _mm_setzero_si128
	instead of _mm_setzero_hi.
	* config/i386/avx512dqintrin.h (_mm512_broadcast_f64x2,
	_mm512_broadcast_i64x2, _mm512_broadcast_f32x2, _mm512_broadcast_i32x2,
	_mm512_broadcast_f32x8, _mm512_broadcast_i32x8): Formatting fixes.
	(_mm512_extracti64x2_epi64, _mm512_maskz_extracti64x2_epi64): Use
	_mm_setzero_si128 instead of _mm_setzero_di.
	(_mm512_cvtt_roundpd_epi64, _mm512_mask_cvtt_roundpd_epi64,
	_mm512_maskz_cvtt_roundpd_epi64, _mm512_cvtt_roundpd_epu64,
	_mm512_mask_cvtt_roundpd_epu64, _mm512_maskz_cvtt_roundpd_epu64,
	_mm512_cvtt_roundps_epi64, _mm512_mask_cvtt_roundps_epi64,
	_mm512_maskz_cvtt_roundps_epi64, _mm512_cvtt_roundps_epu64,
	_mm512_mask_cvtt_roundps_epu64, _mm512_maskz_cvtt_roundps_epu64,
	_mm512_cvt_roundpd_epi64, _mm512_mask_cvt_roundpd_epi64,
	_mm512_maskz_cvt_roundpd_epi64, _mm512_cvt_roundpd_epu64,
	_mm512_mask_cvt_roundpd_epu64, _mm512_maskz_cvt_roundpd_epu64,
	_mm512_cvt_roundps_epi64, _mm512_mask_cvt_roundps_epi64,
	_mm512_maskz_cvt_roundps_epi64, _mm512_cvt_roundps_epu64,
	_mm512_mask_cvt_roundps_epu64, _mm512_maskz_cvt_roundps_epu64,
	_mm512_cvt_roundepi64_ps, _mm512_mask_cvt_roundepi64_ps,
	_mm512_maskz_cvt_roundepi64_ps, _mm512_cvt_roundepu64_ps,
	_mm512_mask_cvt_roundepu64_ps, _mm512_maskz_cvt_roundepu64_ps,
	_mm512_cvt_roundepi64_pd, _mm512_mask_cvt_roundepi64_pd,
	_mm512_maskz_cvt_roundepi64_pd, _mm512_cvt_roundepu64_pd,
	_mm512_mask_cvt_roundepu64_pd, _mm512_maskz_cvt_roundepu64_pd,
	_mm512_reduce_pd, _mm512_maskz_reduce_pd, _mm512_reduce_ps,
	_mm512_maskz_reduce_ps, _mm512_extractf32x8_ps,
	_mm512_maskz_extractf32x8_ps, _mm512_extractf64x2_pd,
	_mm512_maskz_extractf64x2_pd, _mm512_extracti32x8_epi32,
	_mm512_maskz_extracti32x8_epi32, _mm512_range_pd,
	_mm512_maskz_range_pd, _mm512_range_ps, _mm512_maskz_range_ps,
	_mm512_range_round_pd, _mm512_maskz_range_round_pd,
	_mm512_range_round_ps, _mm512_maskz_range_round_ps,
	_mm512_maskz_insertf64x2, _mm512_insertf32x8,
	_mm512_maskz_insertf32x8): Formatting fixes.
	(_mm512_extracti64x2_epi64, _mm512_maskz_extracti64x2_epi64): Use
	_mm_setzero_si128 instead of _mm_setzero_di.
	* config/i386/avx512vldqintrin.h (_mm_cvttpd_epi64,
	_mm_cvttpd_epu64, _mm_cvtpd_epi64, _mm_cvtpd_epu64,
	_mm_cvttps_epi64, _mm_maskz_cvttps_epi64, _mm_cvttps_epu64,
	_mm_maskz_cvttps_epu64, _mm_maskz_mullo_epi64, _mm_cvtps_epi64,
	_mm_maskz_cvtps_epi64, _mm_cvtps_epu64, _mm_maskz_cvtps_epu64,
	_mm256_extracti64x2_epi64, _mm256_maskz_extracti64x2_epi64): Use
	_mm_setzero_si128 instead of _mm_setzero_di.
	(_mm256_extracti64x2_epi64, _mm256_maskz_extracti64x2_epi64):
	Likewise in macros.
	* config/i386/avx512vlbwintrin.h (_mm_maskz_mov_epi8,
	_mm_maskz_loadu_epi16, _mm_maskz_mov_epi16, _mm_maskz_loadu_epi8,
	_mm_permutexvar_epi16, _mm_maskz_maddubs_epi16): Use
	_mm_setzero_si128 instead of _mm_setzero_hi.
	(_mm_maskz_min_epu16, _mm_maskz_max_epu8, _mm_maskz_max_epi8,
	_mm_maskz_min_epu8, _mm_maskz_min_epi8, _mm_maskz_max_epi16,
	_mm_maskz_max_epu16, _mm_maskz_min_epi16): Use _mm_setzero_si128
	instead of _mm_setzero_di.
	(_mm_dbsad_epu8, _mm_maskz_shufflehi_epi16,
	_mm_maskz_shufflelo_epi16): Use _mm_setzero_si128 instead of
	_mm_setzero_hi.
	(_mm_maskz_shufflehi_epi16, _mm_maskz_shufflelo_epi16,
	_mm_maskz_slli_epi16): Use _mm_setzero_si128 instead of
	_mm_setzero_hi.
	(_mm_maskz_alignr_epi8): Use _mm_setzero_si128 instead of
	_mm_setzero_di.
	(_mm_maskz_mulhi_epi16, _mm_maskz_mulhi_epu16, _mm_maskz_mulhrs_epi16,
	_mm_maskz_mullo_epi16, _mm_srav_epi16, _mm_srlv_epi16,
	_mm_sllv_epi16): Use _mm_setzero_si128 instead of _mm_setzero_hi.

From-SVN: r242707
parent a0af8668
Showing with 173 additions and 45 deletions
gcc/ChangeLog
2016-11-22 Jakub Jelinek <jakub@redhat.com>
PR target/78451
* config/i386/avx512vlintrin.h (_mm_setzero_di): Removed.
(_mm_maskz_mov_epi64): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_maskz_load_epi64): Likewise.
(_mm_setzero_hi): Removed.
(_mm_maskz_loadu_epi64): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_abs_epi64, _mm_maskz_abs_epi64, _mm_maskz_srl_epi64,
_mm_maskz_unpackhi_epi64, _mm_maskz_unpacklo_epi64,
_mm_maskz_compress_epi64, _mm_srav_epi64, _mm_maskz_srav_epi64,
_mm_maskz_sllv_epi64, _mm_maskz_srlv_epi64, _mm_rolv_epi64,
_mm_maskz_rolv_epi64, _mm_rorv_epi64, _mm_maskz_rorv_epi64,
_mm_min_epi64, _mm_max_epi64, _mm_max_epu64, _mm_min_epu64,
_mm_lzcnt_epi64, _mm_maskz_lzcnt_epi64, _mm_conflict_epi64,
_mm_maskz_conflict_epi64, _mm_sra_epi64, _mm_maskz_sra_epi64,
_mm_maskz_sll_epi64, _mm_rol_epi64, _mm_maskz_rol_epi64,
_mm_ror_epi64, _mm_maskz_ror_epi64, _mm_alignr_epi64,
_mm_maskz_alignr_epi64, _mm_srai_epi64, _mm_maskz_slli_epi64):
Likewise.
(_mm_cvtepi32_epi8, _mm256_cvtepi32_epi8, _mm_cvtsepi32_epi8,
_mm256_cvtsepi32_epi8, _mm_cvtusepi32_epi8, _mm256_cvtusepi32_epi8,
_mm_cvtepi32_epi16, _mm256_cvtepi32_epi16, _mm_cvtsepi32_epi16,
_mm256_cvtsepi32_epi16, _mm_cvtusepi32_epi16, _mm256_cvtusepi32_epi16,
_mm_cvtepi64_epi8, _mm256_cvtepi64_epi8, _mm_cvtsepi64_epi8,
_mm256_cvtsepi64_epi8, _mm_cvtusepi64_epi8, _mm256_cvtusepi64_epi8,
_mm_cvtepi64_epi16, _mm256_cvtepi64_epi16, _mm_cvtsepi64_epi16,
_mm256_cvtsepi64_epi16, _mm_cvtusepi64_epi16, _mm256_cvtusepi64_epi16,
_mm_cvtepi64_epi32, _mm256_cvtepi64_epi32, _mm_cvtsepi64_epi32,
_mm256_cvtsepi64_epi32, _mm_cvtusepi64_epi32, _mm256_cvtusepi64_epi32,
_mm_maskz_set1_epi32, _mm_maskz_set1_epi64): Formatting fixes.
(_mm_maskz_cvtps_ph, _mm256_maskz_cvtps_ph): Use _mm_setzero_si128
instead of _mm_setzero_hi.
(_mm256_permutex_pd, _mm256_maskz_permutex_epi64, _mm256_insertf32x4,
_mm256_maskz_insertf32x4, _mm256_inserti32x4, _mm256_maskz_inserti32x4,
_mm256_extractf32x4_ps, _mm256_maskz_extractf32x4_ps,
_mm256_shuffle_i32x4, _mm256_maskz_shuffle_i32x4, _mm256_shuffle_f64x2,
_mm256_maskz_shuffle_f64x2, _mm256_shuffle_f32x4,
_mm256_maskz_shuffle_f32x4, _mm256_maskz_shuffle_pd,
_mm_maskz_shuffle_pd, _mm256_maskz_shuffle_ps, _mm_maskz_shuffle_ps,
_mm256_maskz_srli_epi32, _mm_maskz_srli_epi32, _mm_maskz_srli_epi64,
_mm256_mask_slli_epi32, _mm256_maskz_slli_epi32, _mm256_mask_slli_epi64,
_mm256_maskz_slli_epi64, _mm256_roundscale_ps,
_mm256_maskz_roundscale_ps, _mm256_roundscale_pd,
_mm256_maskz_roundscale_pd, _mm_roundscale_ps, _mm_maskz_roundscale_ps,
_mm_roundscale_pd, _mm_maskz_roundscale_pd, _mm256_getmant_ps,
_mm256_maskz_getmant_ps, _mm_getmant_ps, _mm_maskz_getmant_ps,
_mm256_getmant_pd, _mm256_maskz_getmant_pd, _mm_getmant_pd,
_mm_maskz_getmant_pd, _mm256_maskz_shuffle_epi32,
_mm_maskz_shuffle_epi32, _mm256_rol_epi32, _mm256_maskz_rol_epi32,
_mm_rol_epi32, _mm_maskz_rol_epi32, _mm256_ror_epi32,
_mm256_maskz_ror_epi32, _mm_ror_epi32, _mm_maskz_ror_epi32,
_mm_maskz_alignr_epi32, _mm_maskz_alignr_epi64,
_mm256_maskz_srai_epi32, _mm_maskz_srai_epi32, _mm_srai_epi64,
_mm_maskz_srai_epi64, _mm256_maskz_permutex_pd,
_mm256_maskz_permute_pd, _mm256_maskz_permute_ps, _mm_maskz_permute_pd,
_mm_maskz_permute_ps, _mm256_permutexvar_ps): Formatting fixes.
(_mm_maskz_slli_epi64, _mm_rol_epi64, _mm_maskz_rol_epi64,
_mm_ror_epi64, _mm_maskz_ror_epi64): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_maskz_cvtps_ph, _mm256_maskz_cvtps_ph): Use _mm_setzero_si128
instead of _mm_setzero_hi.
* config/i386/avx512dqintrin.h (_mm512_broadcast_f64x2,
_mm512_broadcast_i64x2, _mm512_broadcast_f32x2, _mm512_broadcast_i32x2,
_mm512_broadcast_f32x8, _mm512_broadcast_i32x8): Formatting fixes.
(_mm512_extracti64x2_epi64, _mm512_maskz_extracti64x2_epi64): Use
_mm_setzero_si128 instead of _mm_setzero_di.
(_mm512_cvtt_roundpd_epi64, _mm512_mask_cvtt_roundpd_epi64,
_mm512_maskz_cvtt_roundpd_epi64, _mm512_cvtt_roundpd_epu64,
_mm512_mask_cvtt_roundpd_epu64, _mm512_maskz_cvtt_roundpd_epu64,
_mm512_cvtt_roundps_epi64, _mm512_mask_cvtt_roundps_epi64,
_mm512_maskz_cvtt_roundps_epi64, _mm512_cvtt_roundps_epu64,
_mm512_mask_cvtt_roundps_epu64, _mm512_maskz_cvtt_roundps_epu64,
_mm512_cvt_roundpd_epi64, _mm512_mask_cvt_roundpd_epi64,
_mm512_maskz_cvt_roundpd_epi64, _mm512_cvt_roundpd_epu64,
_mm512_mask_cvt_roundpd_epu64, _mm512_maskz_cvt_roundpd_epu64,
_mm512_cvt_roundps_epi64, _mm512_mask_cvt_roundps_epi64,
_mm512_maskz_cvt_roundps_epi64, _mm512_cvt_roundps_epu64,
_mm512_mask_cvt_roundps_epu64, _mm512_maskz_cvt_roundps_epu64,
_mm512_cvt_roundepi64_ps, _mm512_mask_cvt_roundepi64_ps,
_mm512_maskz_cvt_roundepi64_ps, _mm512_cvt_roundepu64_ps,
_mm512_mask_cvt_roundepu64_ps, _mm512_maskz_cvt_roundepu64_ps,
_mm512_cvt_roundepi64_pd, _mm512_mask_cvt_roundepi64_pd,
_mm512_maskz_cvt_roundepi64_pd, _mm512_cvt_roundepu64_pd,
_mm512_mask_cvt_roundepu64_pd, _mm512_maskz_cvt_roundepu64_pd,
_mm512_reduce_pd, _mm512_maskz_reduce_pd, _mm512_reduce_ps,
_mm512_maskz_reduce_ps, _mm512_extractf32x8_ps,
_mm512_maskz_extractf32x8_ps, _mm512_extractf64x2_pd,
_mm512_maskz_extractf64x2_pd, _mm512_extracti32x8_epi32,
_mm512_maskz_extracti32x8_epi32, _mm512_range_pd,
_mm512_maskz_range_pd, _mm512_range_ps, _mm512_maskz_range_ps,
_mm512_range_round_pd, _mm512_maskz_range_round_pd,
_mm512_range_round_ps, _mm512_maskz_range_round_ps,
_mm512_maskz_insertf64x2, _mm512_insertf32x8,
_mm512_maskz_insertf32x8): Formatting fixes.
(_mm512_extracti64x2_epi64, _mm512_maskz_extracti64x2_epi64): Use
_mm_setzero_si128 instead of _mm_setzero_di.
* config/i386/avx512vldqintrin.h (_mm_cvttpd_epi64,
_mm_cvttpd_epu64, _mm_cvtpd_epi64, _mm_cvtpd_epu64,
_mm_cvttps_epi64, _mm_maskz_cvttps_epi64, _mm_cvttps_epu64,
_mm_maskz_cvttps_epu64, _mm_maskz_mullo_epi64, _mm_cvtps_epi64,
_mm_maskz_cvtps_epi64, _mm_cvtps_epu64, _mm_maskz_cvtps_epu64,
_mm256_extracti64x2_epi64, _mm256_maskz_extracti64x2_epi64): Use
_mm_setzero_si128 instead of _mm_setzero_di.
(_mm256_extracti64x2_epi64, _mm256_maskz_extracti64x2_epi64):
Likewise in macros.
* config/i386/avx512vlbwintrin.h (_mm_maskz_mov_epi8,
_mm_maskz_loadu_epi16, _mm_maskz_mov_epi16, _mm_maskz_loadu_epi8,
_mm_permutexvar_epi16, _mm_maskz_maddubs_epi16): Use
_mm_setzero_si128 instead of _mm_setzero_hi.
(_mm_maskz_min_epu16, _mm_maskz_max_epu8, _mm_maskz_max_epi8,
_mm_maskz_min_epu8, _mm_maskz_min_epi8, _mm_maskz_max_epi16,
_mm_maskz_max_epu16, _mm_maskz_min_epi16): Use _mm_setzero_si128
instead of _mm_setzero_di.
(_mm_dbsad_epu8, _mm_maskz_shufflehi_epi16,
_mm_maskz_shufflelo_epi16): Use _mm_setzero_si128 instead of
_mm_setzero_hi.
(_mm_maskz_shufflehi_epi16, _mm_maskz_shufflelo_epi16,
_mm_maskz_slli_epi16): Use _mm_setzero_si128 instead of
_mm_setzero_hi.
(_mm_maskz_alignr_epi8): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_maskz_mulhi_epi16, _mm_maskz_mulhi_epu16, _mm_maskz_mulhrs_epi16,
_mm_maskz_mullo_epi16, _mm_srav_epi16, _mm_srlv_epi16,
_mm_sllv_epi16): Use _mm_setzero_si128 instead of _mm_setzero_hi.
2016-11-22 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-c.c: Add built-in support for vector compare
gcc/config/i386/avx512vlbwintrin.h
......@@ -69,7 +69,7 @@ _mm_maskz_mov_epi8 (__mmask16 __U, __m128i __A)
{
return (__m128i) __builtin_ia32_movdquqi128_mask ((__v16qi) __A,
(__v16qi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask16) __U);
}
......@@ -125,7 +125,7 @@ _mm_maskz_loadu_epi16 (__mmask8 __U, void const *__P)
{
return (__m128i) __builtin_ia32_loaddquhi128_mask ((const short *) __P,
(__v8hi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask8) __U);
}
......@@ -164,7 +164,7 @@ _mm_maskz_mov_epi16 (__mmask8 __U, __m128i __A)
{
return (__m128i) __builtin_ia32_movdquhi128_mask ((__v8hi) __A,
(__v8hi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask8) __U);
}
......@@ -202,7 +202,7 @@ _mm_maskz_loadu_epi8 (__mmask16 __U, void const *__P)
{
return (__m128i) __builtin_ia32_loaddquqi128_mask ((const char *) __P,
(__v16qi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask16) __U);
}
......@@ -541,7 +541,7 @@ _mm_permutexvar_epi16 (__m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_permvarhi128_mask ((__v8hi) __B,
(__v8hi) __A,
(__v8hi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask8) -1);
}
......@@ -707,7 +707,7 @@ _mm_maskz_maddubs_epi16 (__mmask8 __U, __m128i __X, __m128i __Y)
return (__m128i) __builtin_ia32_pmaddubsw128_mask ((__v16qi) __X,
(__v16qi) __Y,
(__v8hi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask8) __U);
}
......@@ -908,7 +908,7 @@ _mm_maskz_min_epu16 (__mmask8 __M, __m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_pminuw128_mask ((__v8hi) __A,
(__v8hi) __B,
(__v8hi)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) __M);
}
......@@ -974,7 +974,7 @@ _mm_maskz_max_epu8 (__mmask16 __M, __m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_pmaxub128_mask ((__v16qi) __A,
(__v16qi) __B,
(__v16qi)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask16) __M);
}
......@@ -1018,7 +1018,7 @@ _mm_maskz_max_epi8 (__mmask16 __M, __m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_pmaxsb128_mask ((__v16qi) __A,
(__v16qi) __B,
(__v16qi)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask16) __M);
}
......@@ -1062,7 +1062,7 @@ _mm_maskz_min_epu8 (__mmask16 __M, __m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_pminub128_mask ((__v16qi) __A,
(__v16qi) __B,
(__v16qi)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask16) __M);
}
......@@ -1106,7 +1106,7 @@ _mm_maskz_min_epi8 (__mmask16 __M, __m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_pminsb128_mask ((__v16qi) __A,
(__v16qi) __B,
(__v16qi)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask16) __M);
}
......@@ -1150,7 +1150,7 @@ _mm_maskz_max_epi16 (__mmask8 __M, __m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_pmaxsw128_mask ((__v8hi) __A,
(__v8hi) __B,
(__v8hi)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) __M);
}
......@@ -1194,7 +1194,7 @@ _mm_maskz_max_epu16 (__mmask8 __M, __m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_pmaxuw128_mask ((__v8hi) __A,
(__v8hi) __B,
(__v8hi)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) __M);
}
......@@ -1216,7 +1216,7 @@ _mm_maskz_min_epi16 (__mmask8 __M, __m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_pminsw128_mask ((__v8hi) __A,
(__v8hi) __B,
(__v8hi)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) __M);
}
......@@ -1327,7 +1327,7 @@ _mm_dbsad_epu8 (__m128i __A, __m128i __B, const int __imm)
(__v16qi) __B,
__imm,
(__v8hi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask8) -1);
}
......@@ -1623,7 +1623,7 @@ _mm_maskz_shufflehi_epi16 (__mmask8 __U, __m128i __A, const int __imm)
{
return (__m128i) __builtin_ia32_pshufhw128_mask ((__v8hi) __A, __imm,
(__v8hi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask8) __U);
}
......@@ -1666,7 +1666,7 @@ _mm_maskz_shufflelo_epi16 (__mmask8 __U, __m128i __A, const int __imm)
{
return (__m128i) __builtin_ia32_pshuflw128_mask ((__v8hi) __A, __imm,
(__v8hi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask8) __U);
}
......@@ -1804,7 +1804,7 @@ _mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, int __B)
#define _mm_maskz_shufflehi_epi16(U, A, B) \
((__m128i) __builtin_ia32_pshufhw128_mask ((__v8hi)(__m128i)(A), (int)(B), \
(__v8hi)(__m128i)_mm_setzero_hi(), \
(__v8hi)(__m128i)_mm_setzero_si128 (), \
(__mmask8)(U)))
#define _mm256_mask_shufflelo_epi16(W, U, A, B) \
......@@ -1824,7 +1824,7 @@ _mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, int __B)
#define _mm_maskz_shufflelo_epi16(U, A, B) \
((__m128i) __builtin_ia32_pshuflw128_mask ((__v8hi)(__m128i)(A), (int)(B), \
(__v8hi)(__m128i)_mm_setzero_hi(), \
(__v8hi)(__m128i)_mm_setzero_si128 (), \
(__mmask8)(U)))
#define _mm256_maskz_alignr_epi8(U, X, Y, N) \
......@@ -1841,7 +1841,7 @@ _mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, int __B)
#define _mm_maskz_alignr_epi8(U, X, Y, N) \
((__m128i) __builtin_ia32_palignr128_mask ((__v2di)(__m128i)(X), \
(__v2di)(__m128i)(Y), (int)(N * 8), \
(__v2di)(__m128i)_mm_setzero_di(), \
(__v2di)(__m128i)_mm_setzero_si128 (), \
(__mmask16)(U)))
#define _mm_mask_slli_epi16(W, U, X, C) \
......@@ -1851,7 +1851,7 @@ _mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, int __B)
#define _mm_maskz_slli_epi16(U, X, C) \
((__m128i)__builtin_ia32_psllwi128_mask ((__v8hi)(__m128i)(X), (int)(C),\
(__v8hi)(__m128i)_mm_setzero_hi(),\
(__v8hi)(__m128i)_mm_setzero_si128 (),\
(__mmask8)(U)))
#define _mm256_dbsad_epu8(X, Y, C) \
......@@ -2301,7 +2301,7 @@ _mm_maskz_mulhi_epi16 (__mmask8 __U, __m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_pmulhw128_mask ((__v8hi) __A,
(__v8hi) __B,
(__v8hi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask8) __U);
}
......@@ -2323,7 +2323,7 @@ _mm_maskz_mulhi_epu16 (__mmask8 __U, __m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_pmulhuw128_mask ((__v8hi) __A,
(__v8hi) __B,
(__v8hi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask8) __U);
}
......@@ -2345,7 +2345,7 @@ _mm_maskz_mulhrs_epi16 (__mmask8 __U, __m128i __X, __m128i __Y)
return (__m128i) __builtin_ia32_pmulhrsw128_mask ((__v8hi) __X,
(__v8hi) __Y,
(__v8hi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask8) __U);
}
......@@ -2389,7 +2389,7 @@ _mm_maskz_mullo_epi16 (__mmask8 __U, __m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_pmullw128_mask ((__v8hi) __A,
(__v8hi) __B,
(__v8hi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask8) __U);
}
......@@ -4067,7 +4067,7 @@ _mm_srav_epi16 (__m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_psrav8hi_mask ((__v8hi) __A,
(__v8hi) __B,
(__v8hi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask8) -1);
}
......@@ -4133,7 +4133,7 @@ _mm_srlv_epi16 (__m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_psrlv8hi_mask ((__v8hi) __A,
(__v8hi) __B,
(__v8hi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask8) -1);
}
......@@ -4199,7 +4199,7 @@ _mm_sllv_epi16 (__m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_psllv8hi_mask ((__v8hi) __A,
(__v8hi) __B,
(__v8hi)
_mm_setzero_hi (),
_mm_setzero_si128 (),
(__mmask8) -1);
}
......
gcc/config/i386/avx512vldqintrin.h
......@@ -69,7 +69,7 @@ _mm_cvttpd_epi64 (__m128d __A)
{
return (__m128i) __builtin_ia32_cvttpd2qq128_mask ((__v2df) __A,
(__v2di)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) -1);
}
......@@ -127,7 +127,7 @@ _mm_cvttpd_epu64 (__m128d __A)
{
return (__m128i) __builtin_ia32_cvttpd2uqq128_mask ((__v2df) __A,
(__v2di)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) -1);
}
......@@ -185,7 +185,7 @@ _mm_cvtpd_epi64 (__m128d __A)
{
return (__m128i) __builtin_ia32_cvtpd2qq128_mask ((__v2df) __A,
(__v2di)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) -1);
}
......@@ -243,7 +243,7 @@ _mm_cvtpd_epu64 (__m128d __A)
{
return (__m128i) __builtin_ia32_cvtpd2uqq128_mask ((__v2df) __A,
(__v2di)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) -1);
}
......@@ -301,7 +301,7 @@ _mm_cvttps_epi64 (__m128 __A)
{
return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A,
(__v2di)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) -1);
}
......@@ -320,7 +320,7 @@ _mm_maskz_cvttps_epi64 (__mmask8 __U, __m128 __A)
{
return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A,
(__v2di)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) __U);
}
......@@ -359,7 +359,7 @@ _mm_cvttps_epu64 (__m128 __A)
{
return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A,
(__v2di)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) -1);
}
......@@ -378,7 +378,7 @@ _mm_maskz_cvttps_epu64 (__mmask8 __U, __m128 __A)
{
return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A,
(__v2di)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) __U);
}
......@@ -588,7 +588,7 @@ _mm_maskz_mullo_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
return (__m128i) __builtin_ia32_pmullq128_mask ((__v2di) __A,
(__v2di) __B,
(__v2di)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) __U);
}
......@@ -714,7 +714,7 @@ _mm_cvtps_epi64 (__m128 __A)
{
return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A,
(__v2di)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) -1);
}
......@@ -733,7 +733,7 @@ _mm_maskz_cvtps_epi64 (__mmask8 __U, __m128 __A)
{
return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A,
(__v2di)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) __U);
}
......@@ -772,7 +772,7 @@ _mm_cvtps_epu64 (__m128 __A)
{
return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A,
(__v2di)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) -1);
}
......@@ -791,7 +791,7 @@ _mm_maskz_cvtps_epu64 (__mmask8 __U, __m128 __A)
{
return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A,
(__v2di)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) __U);
}
......@@ -1381,7 +1381,7 @@ _mm256_extracti64x2_epi64 (__m256i __A, const int __imm)
return (__m128i) __builtin_ia32_extracti64x2_256_mask ((__v4di) __A,
__imm,
(__v2di)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8) -1);
}
......@@ -1405,7 +1405,7 @@ _mm256_maskz_extracti64x2_epi64 (__mmask8 __U, __m256i __A,
return (__m128i) __builtin_ia32_extracti64x2_256_mask ((__v4di) __A,
__imm,
(__v2di)
_mm_setzero_di (),
_mm_setzero_si128 (),
(__mmask8)
__U);
}
......@@ -1856,7 +1856,7 @@ _mm256_maskz_insertf64x2 (__mmask8 __U, __m256d __A, __m128d __B,
#define _mm256_extracti64x2_epi64(X, C) \
((__m128i) __builtin_ia32_extracti64x2_256_mask ((__v4di)(__m256i) (X),\
(int) (C), (__v2di)(__m128i) _mm_setzero_di(), (__mmask8)-1))
(int) (C), (__v2di)(__m128i) _mm_setzero_si128 (), (__mmask8)-1))
#define _mm256_mask_extracti64x2_epi64(W, U, X, C) \
((__m128i) __builtin_ia32_extracti64x2_256_mask ((__v4di)(__m256i) (X),\
......@@ -1864,7 +1864,7 @@ _mm256_maskz_insertf64x2 (__mmask8 __U, __m256d __A, __m128d __B,
#define _mm256_maskz_extracti64x2_epi64(U, X, C) \
((__m128i) __builtin_ia32_extracti64x2_256_mask ((__v4di)(__m256i) (X),\
(int) (C), (__v2di)(__m128i) _mm_setzero_di(), (__mmask8) (U)))
(int) (C), (__v2di)(__m128i) _mm_setzero_si128 (), (__mmask8) (U)))
#define _mm256_reduce_pd(A, B) \
((__m256d) __builtin_ia32_reducepd256_mask ((__v4df)(__m256d)(A), \
......
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