* doc/xml/manual/using.xml (table.cmd_options): Document that the
	C++17 Filesystem implementation also needs -lstdc++fs.

From-SVN: r260011

scanner.c (preprocessor_line): Call linemap_add after a line directive that changes the current filename.

	* scanner.c (preprocessor_line): Call linemap_add after a line
	directive that changes the current filename.

	* gfortran.dg/linefile.f90: New test.

From-SVN: r260010

By performing the /= operation on a named local variable instead of a
temporary the copy made for the return value can be elided.

	PR libstdc++/85671
	* include/bits/fs_path.h (operator/): Permit copy elision.
	* include/experimental/bits/fs_path.h (operator/): Likewise.

From-SVN: r260009

2018-05-07  Edward Smith-Rowland  <3dw4rd@verizon.net>

	Moar PR libstdc++/80506
	* include/bits/random.tcc (gamma_distribution::__generate_impl()):
	Fix magic number used in loop condition.

Actually put the file in.
Don't know what my problem is today...

From-SVN: r260008

2018-05-07  Amaan Cheval  <amaan.cheval@gmail.com>

	* config.host (x86_64-*-rtems*): Build crti.o and crtn.o.

From-SVN: r260007

2018-05-07  Edward Smith-Rowland  <3dw4rd@verizon.net>

	Moar PR libstdc++/80506
	* include/bits/random.tcc (gamma_distribution::__generate_impl()):
	Fix magic number used in loop condition.

From-SVN: r260004

From-SVN: r260003

From-SVN: r260002

2018-05-07  Edward Smith-Rowland  <3dw4rd@verizon.net>

	Moar PR libstdc++/80506
	* include/bits/random.tcc (gamma_distribution::__generate_impl()):
	Fix magic number used in loop condition.

From-SVN: r260001

2018-05-07  Luis Machado  <luis.machado@linaro.org>

	PR bootstrap/85681
	Revert:
	2018-05-07  Luis Machado  <luis.machado@linaro.org>

	* config/aarch64/aarch64-protos.h (cpu_prefetch_tune)
	<prefetch_dynamic_strides>: New const bool field.
	* config/aarch64/aarch64.c (generic_prefetch_tune): Update to include
	prefetch_dynamic_strides.
	(exynosm1_prefetch_tune): Likewise.
	(thunderxt88_prefetch_tune): Likewise.
	(thunderx_prefetch_tune): Likewise.
	(thunderx2t99_prefetch_tune): Likewise.
	(qdf24xx_prefetch_tune): Likewise. Set prefetch_dynamic_strides to false.
	(aarch64_override_options_internal): Update to set
	PARAM_PREFETCH_DYNAMIC_STRIDES.
	* doc/invoke.texi (prefetch-dynamic-strides): Document new option.
	* params.def (PARAM_PREFETCH_DYNAMIC_STRIDES): New.
	* params.h (PARAM_PREFETCH_DYNAMIC_STRIDES): Define.
	* tree-ssa-loop-prefetch.c (should_issue_prefetch_p): Account for
	prefetch-dynamic-strides setting.

	2018-05-07  Luis Machado  <luis.machado@linaro.org>

	* config/aarch64/aarch64-protos.h (cpu_prefetch_tune)
	<minimum_stride>: New const int field.
	* config/aarch64/aarch64.c (generic_prefetch_tune): Update to include
	minimum_stride field.
	(exynosm1_prefetch_tune): Likewise.
	(thunderxt88_prefetch_tune): Likewise.
	(thunderx_prefetch_tune): Likewise.
	(thunderx2t99_prefetch_tune): Likewise.
	(qdf24xx_prefetch_tune): Likewise. Set minimum_stride to 2048.
	(aarch64_override_options_internal): Update to set
	PARAM_PREFETCH_MINIMUM_STRIDE.
	* doc/invoke.texi (prefetch-minimum-stride): Document new option.
	* params.def (PARAM_PREFETCH_MINIMUM_STRIDE): New.
	* params.h (PARAM_PREFETCH_MINIMUM_STRIDE): Define.
	* tree-ssa-loop-prefetch.c (should_issue_prefetch_p): Return false if
	stride is constant and is below the minimum stride threshold.

From-SVN: r260000

From-SVN: r259999

2018-05-07  Luis Machado  <luis.machado@linaro.org>

	* config/aarch64/aarch64.c (qdf24xx_prefetch_tune) <l2_cache_size>: Set
	to 512.

From-SVN: r259998

The following patch adds an option to control software prefetching of memory
references with non-constant/unknown strides.

Currently we prefetch these references if the pass thinks there is benefit to
doing so. But, since this is all based on heuristics, it's not always the case
that we end up with better performance.

For Falkor there is also the problem of conflicts with the hardware prefetcher,
so we need to be more conservative in terms of what we issue software prefetch
hints for.

This also aligns GCC with what LLVM does for Falkor.

Similarly to the previous patch, the defaults guarantee no change in behavior
for other targets and architectures.

2018-05-07  Luis Machado  <luis.machado@linaro.org>

	gcc/
	* config/aarch64/aarch64-protos.h (cpu_prefetch_tune)
	<prefetch_dynamic_strides>: New const bool field.
	* config/aarch64/aarch64.c (generic_prefetch_tune): Update to include
	prefetch_dynamic_strides.
	(exynosm1_prefetch_tune): Likewise.
	(thunderxt88_prefetch_tune): Likewise.
	(thunderx_prefetch_tune): Likewise.
	(thunderx2t99_prefetch_tune): Likewise.
	(qdf24xx_prefetch_tune): Likewise. Set prefetch_dynamic_strides to false.
	(aarch64_override_options_internal): Update to set
	PARAM_PREFETCH_DYNAMIC_STRIDES.
	* doc/invoke.texi (prefetch-dynamic-strides): Document new option.
	* params.def (PARAM_PREFETCH_DYNAMIC_STRIDES): New.
	* params.h (PARAM_PREFETCH_DYNAMIC_STRIDES): Define.
	* tree-ssa-loop-prefetch.c (should_issue_prefetch_p): Account for
	prefetch-dynamic-strides setting.

From-SVN: r259996

This patch adds a new option to control the minimum stride, for a memory
reference, after which the loop prefetch pass may issue software prefetch
hints for. There are two motivations:

* Make the pass less aggressive, only issuing prefetch hints for bigger strides
that are more likely to benefit from prefetching. I've noticed a case in cpu2017
where we were issuing thousands of hints, for example.

* For processors that have a hardware prefetcher, like Falkor, it allows the
loop prefetch pass to defer prefetching of smaller (less than the threshold)
strides to the hardware prefetcher instead. This prevents conflicts between
the software prefetcher and the hardware prefetcher.

I've noticed considerable reduction in the number of prefetch hints and
slightly positive performance numbers. This aligns GCC and LLVM in terms of
prefetch behavior for Falkor.

The default settings should guarantee no changes for existing targets. Those
are free to tweak the settings as necessary.

2018-05-07  Luis Machado  <luis.machado@linaro.org>

	Introduce option to limit software prefetching to known constant
	strides above a specific threshold with the goal of preventing
	conflicts with a hardware prefetcher.

	gcc/
	* config/aarch64/aarch64-protos.h (cpu_prefetch_tune)
	<minimum_stride>: New const int field.
	* config/aarch64/aarch64.c (generic_prefetch_tune): Update to include
	minimum_stride field.
	(exynosm1_prefetch_tune): Likewise.
	(thunderxt88_prefetch_tune): Likewise.
	(thunderx_prefetch_tune): Likewise.
	(thunderx2t99_prefetch_tune): Likewise.
	(qdf24xx_prefetch_tune): Likewise. Set minimum_stride to 2048.
	(aarch64_override_options_internal): Update to set
	PARAM_PREFETCH_MINIMUM_STRIDE.
	* doc/invoke.texi (prefetch-minimum-stride): Document new option.
	* params.def (PARAM_PREFETCH_MINIMUM_STRIDE): New.
	* params.h (PARAM_PREFETCH_MINIMUM_STRIDE): Define.
	* tree-ssa-loop-prefetch.c (should_issue_prefetch_p): Return false if
	stride is constant and is below the minimum stride threshold.

From-SVN: r259995

2018-05-07  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.dg/nextafter-2.c: Add c99_runtime effective target
	and options.

From-SVN: r259994

2018-05-07  Tom de Vries  <tom@codesourcery.com>

	PR testsuite/85677
	* testsuite/lib/libgomp.exp (libgomp_init): Move inclusion of top-level
	include directory in ALWAYS_CFLAGS out of $blddir != "" condition.

From-SVN: r259992

From-SVN: r259986

	PR c++/85659
	* cfgexpand.c (expand_asm_stmt): Don't create a temporary if
	the type is addressable.  Don't force op into register if it has
	BLKmode.

	* g++.dg/ext/asm14.C: New test.
	* g++.dg/ext/asm15.C: New test.
	* g++.dg/ext/asm16.C: New test.

From-SVN: r259981

2018-05-06  Michael Eager  <eager@eagercon.com>

	* gcc.target/microblaze/others/picdtr.c: Correct option
	 -fPIE -mpic-data-is-text-relative.

From-SVN: r259976

2018-05-06  Andrew Sadek  <andrew.sadek.se@gmail.com>

	* gcc.target/microblaze/others/picdtr.c: Add test for 
	 -fPIE -mpic-data-is-text-relative.

From-SVN: r259975

gcc/fortran/ChangeLog:

2018-05-06  Andre Vehreschild  <vehre@gcc.gnu.org>

	PR fortran/85507
	* dependency.c (gfc_dep_resolver): Revert looking at coarray dimension
	introduced by r259385.
	* trans-intrinsic.c (conv_caf_send): Always report a dependency for
	same variables in coarray assignments.

gcc/testsuite/ChangeLog:

2018-05-06  Andre Vehreschild  <vehre@gcc.gnu.org>

	PR fortran/85507
	* gfortran.dg/coarray_dependency_1.f90: New test.
	* gfortran.dg/coarray_lib_comm_1.f90: Fix counting caf-expressions.

From-SVN: r259974

From-SVN: r259973

gcc/
	PR other/77609
	* varasm.c (default_section_type_flags): Set SECTION_NOTYPE for
	any section for which we don't know a specific type it should have,
	regardless of name.  Previously this was done only for the exact
	names ".init_array", ".fini_array", and ".preinit_array".
	(default_elf_asm_named_section): Add comment about
	relationship with default_section_type_flags and SECTION_NOTYPE.
	(get_section): Don't consider it a type conflict if one side has
	SECTION_NOTYPE and the other doesn't, as long as neither has the
	SECTION_BSS et al used in the default_section_type_flags logic.

From-SVN: r259969

2018-05-05  Tom de Vries  <tom@codesourcery.com>

	PR target/85653
	* config/nvptx/nvptx.c (WORKAROUND_PTXJIT_BUG_3): Define.
	(workaround_barsyncs): New function.
	(nvptx_reorg): Use workaround_barsyncs.
	* config/nvptx/nvptx.md (define_c_enum "unspecv"): Add UNSPECV_MEMBAR.
	(define_expand "nvptx_membar_cta"): New define_expand.
	(define_insn "*nvptx_membar_cta"): New insn.

From-SVN: r259967

2018-05-05  Paolo Carlini  <paolo.carlini@oracle.com>

	* cvt.c (ocp_convert): Early handle the special case of a
	null_ptr_cst_p expr converted to a NULLPTR_TYPE_P type.

From-SVN: r259966

From-SVN: r259965

From-SVN: r259958

Add flag -fassume-phsa that is on by default. If -fno-assume-phsa
is given, these optimizations are disabled.

With this flag, gccbrig can generate GENERIC that assumes we are
targeting a phsa-runtime based implementation, which allows us
to expose the work-item context accesses to retrieve WI IDs etc.
which helps optimizers.

First optimization that takes advantage of this is to get rid of
the setworkitemid calls whenever we have non-inlined calls that
use IDs internally.

Other optimizations added in this commit:

- expand absoluteid to similar level of simplicity as workitemid.
At the moment absoluteid is the best indexing ID to end up with
WG vectorization.
- propagate ID variables closer to their uses. This is mainly
to avoid known useless casts, which confuse at least scalar
evolution analysis.
- use signed long long for storing IDs. Unsigned integers have
defined wraparound semantics, which confuse at least scalar
evolution analysis, leading to unvectorizable WI loops.
- also refactor some BRIG function generation helpers to brig_function.
- no point in having the wi-loop as a for-loop. It's really
a do...while and SCEV can analyze it just fine still.
- add consts to ptrs etc. in BRIG builtin defs.
Improves optimization opportunities.
- add qualifiers to generated function parameters.
Const and restrict on the hidden local/private pointers,
the arg buffer and the context pointer help some optimizations.

From-SVN: r259957

From-SVN: r259950

It can break inputs that have similarly named functions.

From-SVN: r259949

From-SVN: r259948

    
    Reviewed-on: https://go-review.googlesource.com/111535

From-SVN: r259946

The case where a dim is greater than the grid size doesn't seem
to be mentioned in the specs nor tested by PRM test suite.

From-SVN: r259944

HSA assumes all program scope HSAIL symbols can be queried from
the host runtime API, thus cannot be removed by the IPA.

Getting some inlining happening in the finalized binary required:
* explicitly marking the 'prog' scope functions and the launcher
function "externally_visible" to avoid the inliner removing it
* also the host_def ptr is set to externally visible, otherwise
IPA assumes it's never set
* adding the 'inline' keyword to functions to enable inlining,
otherwise GCC defaults to replaceable functions (one can link
over the previous one) which cannot be inlined
* replacing all calls to declarations with calls to definitions to
enable the inliner to find the definition
* to fix missing hidden argument types in the generated functions.
These were ignored silently until GCC started to be able to
inline calls to such functions.
* do not gimplify before fixing the call targets. Otherwise the
calls get detached and the definitions are not found. The reason
why this happens is not clear, but gimplifying only after call
target decl->def conversion fixes this.

From-SVN: r259943

We didn't preserve additional space for the alloca frame pointers that
are needed to be saved in the alloca space.

Fixes libgomp.c++/target-6.C execution test.

From-SVN: r259942

From-SVN: r259938

	PR go/85630
	* Makefile.am (CHECK_ENV): Set GOCACHE.
	(ECHO_ENV): Update for setting of GOCACHE.
	* Makefile.in: Rebuild.

From-SVN: r259937

gcc/testsuite/ChangeLog:

2018-05-04 Carl Love  <cel@us.ibm.com>
	* gcc.target/powerpc/vsx-vector-6.h (foo): Add test for vec_max,
	vec_trunc.
	* gcc.target/powerpc/vsx-vector-6-le.c (dg-final): Update xvcmpeqdp,
	xvcmpgtdp, xvcmpgedp counts. Add xxsel counts.
	* gcc.target/powerpc/vsx-vector-6-be.c (dg-final): Update xvcmpgtdp,
	xvcmpgedp counts. Add xxsel counts.

From-SVN: r259936

    
    Change code to work properly reading unaligned data on architectures
    that don't support unaliged reads. This fixes a regression (broke
    Solaris/sparc) introduced in https://golang.org/cl/90235.
    
    Reviewed-on: https://go-review.googlesource.com/111296

From-SVN: r259935

The ELFv1 ABI says: "Single precision floating point values are mapped
to the second word in a single doubleword" and also "Floating point
registers f1 through f13 are used consecutively to pass up to 13
floating point values, one member aggregates passed by value
containing a floating point value, and to pass complex floating point
values".

libffi wasn't expecting float args in the second word, and wasn't
passing one member aggregates in fp registers.  This patch fixes those
problems, making use of the existing ELFv2 homogeneous aggregate
support since a one element fp struct is a special case of an
homogeneous aggregate.

I've also set a flag when returning pointers that might be used one
day.  This is just a tidy since the ppc64 assembly support code
currently doesn't test FLAG_RETURNS_64BITS for integer types..

	* src/powerpc/ffi_linux64.c (discover_homogeneous_aggregate):
	Compile for ELFv1 too, handling single element aggregates.
	(ffi_prep_cif_linux64_core): Call discover_homogeneous_aggregate
	for ELFv1.  Set FLAG_RETURNS_64BITS for FFI_TYPE_POINTER return.
	(ffi_prep_args64): Call discover_homogeneous_aggregate for ELFv1,
	and handle single element structs containing float or double
	as if the element wasn't wrapped in a struct.  Store floats in
	second word of doubleword slot when big-endian.
	(ffi_closure_helper_LINUX64): Similarly.

From-SVN: r259934