1. 13 Mar, 2018 16 commits
    • re PR target/84743 (default widths for parallel reassociation now hurt rather than help) · b34f5c5e
      2018-03-13  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
      
      	PR target/84743
      	* config/rs6000/rs6000.c (rs6000_reassociation_width): Disable parallel
      	reassociation for int modes.
      
      From-SVN: r258495
      Aaron Sawdey committed
    • Pedwarn about auto parameter even without -Wpedantic. · 1d500c25
      	* parser.c (cp_parser_simple_type_specifier): Pedwarn about auto
      	parameter even without -Wpedantic.
      
      From-SVN: r258494
      Jason Merrill committed
    • PR c++/84798 - ICE with auto in abstract function declarator. · 426c1e2e
      	* parser.c (cp_parser_parameter_declaration_clause): Check
      	parser->default_arg_ok_p.
      
      From-SVN: r258493
      Jason Merrill committed
    • PR tree-optimization/84725 - enable attribute nonstring for all narrow character types · f99309b2
      gcc/c-family/ChangeLog:
      
      	PR tree-optimization/84725
      	* c-attribs.c (handle_nonstring_attribute): Allow attribute nonstring
      	with all three narrow character types, including their qualified forms.
      
      gcc/testsuite/ChangeLog:
      
      	PR tree-optimization/84725
      	* c-c++-common/Wstringop-truncation-4.c: New test.
      	* c-c++-common/attr-nonstring-5.c: New test.
      
      From-SVN: r258492
      Martin Sebor committed
    • [SLP/AArch64] Fix unpack handling for big-endian SVE · 9bfb28ed
      I hadn't realised that on big-endian targets, VEC_UNPACK*HI_EXPR unpacks
      the low-numbered lanes and VEC_UNPACK*LO_EXPR unpacks the high-numbered
      lanes.  This meant that both the SVE patterns and the handling of
      fully-masked loops were wrong.
      
      The patch deals with that by making sure that all vec_unpack* optabs
      are define_expands, using BYTES_BIG_ENDIAN to choose the appropriate
      define_insn.  This in turn meant that we can get rid of the duplication
      between the signed and unsigned patterns for predicates.  (We provide
      implementations of both the signed and unsigned optabs because the sign
      doesn't matter for predicates: every element contains only one
      significant bit.)
      
      Also, the float unpacks need to unpack one half of the input vector,
      but the unpacked upper bits are "don't care".  There are two obvious
      ways of handling that: use an unpack (filling with zeros) or use a ZIP
      (filling with a duplicate of the low bits).  The code previously used
      unpacks, but the sequence involved a subreg that is semantically an
      element reverse on big-endian targets.  Using the ZIP patterns avoids
      that, and at the moment there's no reason to prefer one over the other
      for performance reasons, so the patch switches to ZIP unconditionally.
      As the comment says, it would be easy to optimise this later if UUNPK
      turns out to be better for some implementations.
      
      2018-03-13  Richard Sandiford  <richard.sandiford@linaro.org>
      
      gcc/
      	* tree-vect-loop-manip.c (vect_maybe_permute_loop_masks):
      	Reverse the choice between VEC_UNPACK_LO_EXPR and VEC_UNPACK_HI_EXPR
      	for big-endian.
      	* config/aarch64/iterators.md (hi_lanes_optab): New int attribute.
      	* config/aarch64/aarch64-sve.md
      	(*aarch64_sve_<perm_insn><perm_hilo><mode>): Rename to...
      	(aarch64_sve_<perm_insn><perm_hilo><mode>): ...this.
      	(*extend<mode><Vwide>2): Rename to...
      	(aarch64_sve_extend<mode><Vwide>2): ...this.
      	(vec_unpack<su>_<perm_hilo>_<mode>): Turn into a define_expand,
      	renaming the old pattern to...
      	(aarch64_sve_punpk<perm_hilo>_<mode>): ...this.  Only define
      	unsigned packs.
      	(vec_unpack<su>_<perm_hilo>_<SVE_BHSI:mode>): Turn into a
      	define_expand, renaming the old pattern to...
      	(aarch64_sve_<su>unpk<perm_hilo>_<SVE_BHSI:mode>): ...this.
      	(*vec_unpacku_<perm_hilo>_<mode>_no_convert): Delete.
      	(vec_unpacks_<perm_hilo>_<mode>): Take BYTES_BIG_ENDIAN into
      	account when deciding which SVE instruction the optab should use.
      	(vec_unpack<su_optab>_float_<perm_hilo>_vnx4si): Likewise.
      
      gcc/testsuite/
      	* gcc.target/aarch64/sve/unpack_fcvt_signed_1.c: Expect zips rather
      	than unpacks.
      	* gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c: Likewise.
      	* gcc.target/aarch64/sve/unpack_float_1.c: Likewise.
      
      From-SVN: r258489
      Richard Sandiford committed
    • [AArch64] Add a tlsdesc call pattern for SVE · 80c13ac5
      tlsdesc calls are guaranteed to preserve all Advanced SIMD registers,
      but are not guaranteed to preserve the SVE extension of them.
      The calls also don't preserve the SVE predicate registers.
      
      The long-term plan for handling the SVE vector registers is CLOBBER_HIGH,
      which adds a clobber equivalent of TARGET_HARD_REGNO_CALL_PART_CLOBBERED.
      The pattern can then directly model the fact that the low 128 bits are
      preserved and the upper bits are clobbered.
      
      However, it's too late now for that to be included in GCC 8, so this
      patch conservatively treats the whole vector register as being clobbered.
      This has the obvious disadvantage that compiling for SVE can make NEON
      code worse, but I don't think there's much we can do about that until
      CLOBBER_HIGH is in.
      
      2018-03-13  Richard Sandiford  <richard.sandiford@linaro.org>
      
      gcc/
      	* config/aarch64/aarch64.md (V4_REGNUM, V8_REGNUM, V12_REGNUM)
      	(V20_REGNUM, V24_REGNUM, V28_REGNUM, P1_REGNUM, P2_REGNUM, P3_REGNUM)
      	(P4_REGNUM, P5_REGNUM, P6_REGNUM, P8_REGNUM, P9_REGNUM, P10_REGNUM)
      	(P11_REGNUM, P12_REGNUM, P13_REGNUM, P14_REGNUM): New define_constants.
      	(tlsdesc_small_<mode>): Turn a define_expand and use
      	tlsdesc_small_sve_<mode> for SVE.  Rename original define_insn to...
      	(tlsdesc_small_advsimd_<mode>): ...this.
      	(tlsdesc_small_sve_<mode>): New pattern.
      
      gcc/testsuite/
      	* gcc.target/aarch64/sve/tls_1.c: New test.
      	* gcc.target/aarch64/sve/tls_2.C: Likewise.
      
      From-SVN: r258488
      Richard Sandiford committed
    • [AArch64] Add SVE mul_highpart patterns · 11e9443f
      One advantage of the new permute handling compared to the old way is
      that we can now easily take advantage of the vectoriser's divmod patterns
      for SVE.
      
      2018-03-13  Richard Sandiford  <richard.sandiford@linaro.org>
      
      gcc/
      	* config/aarch64/iterators.md (UNSPEC_SMUL_HIGHPART)
      	(UNSPEC_UMUL_HIGHPART): New constants.
      	(MUL_HIGHPART): New int iteraor.
      	(su): Handle UNSPEC_SMUL_HIGHPART and UNSPEC_UMUL_HIGHPART.
      	* config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart): New
      	define_expand.
      	(*<su>mul<mode>3_highpart): New define_insn.
      
      gcc/testsuite/
      	* gcc.target/aarch64/sve/mul_highpart_1.c: New test.
      	* gcc.target/aarch64/sve/mul_highpart_1_run.c: Likewise.
      
      From-SVN: r258487
      Richard Sandiford committed
    • MAINTAINERS: Add entry for SVE maintainership. · c9b39302
      2018-03-13  Richard Sandiford  <richard.sandiford@arm.com>
      
      	* MAINTAINERS: Add entry for SVE maintainership.
      
      From-SVN: r258486
      Richard Sandiford committed
    • re PR lto/84805 (ICE in get_odr_type, at ipa-devirt.c:2096 since r258133) · 59a8062a
      	PR lto/84805
      	* ipa-devirt.c (odr_subtypes_equivalent_p): Do not get the ODR type of
      	incomplete types.
      
      From-SVN: r258481
      Eric Botcazou committed
    • Fix PTA info in IPA ICF (PR ipa/84658). · 0dbacfcf
      2018-03-13  Martin Liska  <mliska@suse.cz>
      
      	PR ipa/84658.
      	* (sem_item_optimizer::sem_item_optimizer): Initialize new
      	vector.
      	(sem_item_optimizer::~sem_item_optimizer): Release it.
      	(sem_item_optimizer::merge_classes): Register variable aliases.
      	(sem_item_optimizer::fixup_pt_set): New function.
      	(sem_item_optimizer::fixup_points_to_sets): Likewise.
      	* ipa-icf.h: Declare new variables and functions.
      2018-03-13  Martin Liska  <mliska@suse.cz>
      
      	PR ipa/84658.
      	* g++.dg/ipa/pr84658.C: New test.
      
      From-SVN: r258480
      Martin Liska committed
    • re PR middle-end/84834 (ICE: tree check: expected integer_cst, have complex_cst… · 9e61e48e
      re PR middle-end/84834 (ICE: tree check: expected integer_cst, have complex_cst in to_wide, at tree.h:5527)
      
      	PR middle-end/84834
      	* match.pd ((A & C) != 0 ? D : 0): Use INTEGER_CST@2 instead of
      	integer_pow2p@2 and test integer_pow2p in condition.
      	(A < 0 ? C : 0): Similarly for @1.
      
      	* gcc.dg/pr84834.c: New test.
      
      From-SVN: r258479
      Jakub Jelinek committed
    • re PR middle-end/84831 (Invalid memory read in parse_output_constraint) · cd471b26
      	PR middle-end/84831
      	* stmt.c (parse_output_constraint): If the CONSTRAINT_LEN (*p, p)
      	characters starting at p contain '\0' character, don't look beyond
      	that.
      
      From-SVN: r258478
      Jakub Jelinek committed
    • re PR target/84827 (ICE in extract_insn, at recog.c:2311) · ee6e1303
      	PR target/84827
      	* config/i386/i386.md (round<mode>2): For 387 fancy math, disable
      	pattern if -ftrapping-math -fno-fp-int-builtin-inexact.
      
      	* gcc.target/i386/pr84827.c: New test.
      
      From-SVN: r258477
      Jakub Jelinek committed
    • re PR target/84828 (ICE in verify_flow_info at gcc/cfghooks.c:265) · fc31d739
      	PR target/84828
      	* reg-stack.c (change_stack): Change update_end var from int to
      	rtx_insn *, if non-NULL don't update just BB_END (current_block), but
      	also call set_block_for_insn on the newly added insns and rescan.
      
      	* g++.dg/ext/pr84828.C: New test.
      
      From-SVN: r258476
      Jakub Jelinek committed
    • re PR target/84786 ([miscompilation] vunpcklpd accessing xmm16-22 targeting KNL) · 639e8522
      	PR target/84786
      	* config/i386/sse.md (sse2_loadhpd): Use Yv constraint rather than v
      	on the last operand.
      
      	* gcc.target/i386/avx512f-pr84786-1.c: New test.
      	* gcc.target/i386/avx512f-pr84786-2.c: New test.
      
      From-SVN: r258475
      Jakub Jelinek committed
    • Daily bump. · 1f4e9d22
      From-SVN: r258474
      GCC Administrator committed
  2. 12 Mar, 2018 20 commits
  3. 11 Mar, 2018 4 commits
    • re PR fortran/84546 (Bad sourced allocation of CLASS(*) with source with CLASS(*) component) · 26219cee
      2018-03-11  Paul Thomas  <pault@gcc.gnu.org>
      
      	PR fortran/84546
      	* trans-array.c (structure_alloc_comps): Make sure that the
      	vptr is copied and that the unlimited polymorphic _len is used
      	to compute the size to be allocated.
      	* trans-expr.c (gfc_get_class_array_ref): If unlimited, use the
      	unlimited polymorphic _len for the offset to the element.
      	(gfc_copy_class_to_class): Set the new 'unlimited' argument.
      	* trans.h : Add the boolean 'unlimited' to the prototype.
      
      2018-03-11  Paul Thomas  <pault@gcc.gnu.org>
      
      	PR fortran/84546
      	* gfortran.dg/unlimited_polymorphic_29.f90 : New test.
      
      From-SVN: r258438
      Paul Thomas committed
    • re PR fortran/83939 (Constraint C1290 (elemental function cannot be allocatable) not enforced) · 1813c97a
      2018-03-11  Steven G. Kargl  <kargl@gcc.gnu.org>
      
      	PR fortran/83939
      	* resolve.c (resolve_fl_procedure): Enforce F2018:C15100.
      
      2018-03-11  Steven G. Kargl  <kargl@gcc.gnu.org>
      
      	PR fortran/83939
      	* gfortran.dg/pr83939.f90
      
      From-SVN: r258437
      Steven G. Kargl committed
    • check.c (gfc_check_kill): Check pid and sig are scalar. · fbe1f017
      2018-03-11  Steven G. Kargl  <kargls@gcc.gnu.org>
      
      	* check.c (gfc_check_kill):  Check pid and sig are scalar.
      	(gfc_check_kill_sub): Restrict kind to 4 and 8.
      	* intrinsic.c (add_function): Sort keyword list.  Add pid and sig
      	keywords for KILL.  Remove redundant *back="back" in favor of the
      	original *bck="back".
      	(add_subroutines): Sort keyword list.  Add pid and sig keywords
      	for KILL.
      	* intrinsic.texi: Fix documentation to consistently use pid and sig.
      	* iresolve.c (gfc_resolve_kill): Kind can only be 4 or 8.  Choose the
      	correct function.
      	(gfc_resolve_rename_sub): Add comment.
      
      From-SVN: r258436
      Steven G. Kargl committed
    • re PR fortran/66128 (ICE for some intrinsics with zero sized array parameter) · 6f76317a
      2018-03-11  Thomas Koenig  <tkoenig@gcc.gnu.org>
      
      	PR fortran/66128
      	* simplify.c (simplify_transformation): Return default result for
      	empty array argument.
      	(gfc_simplify_all): Remove special-case handling for zerosize.
      	(gfc_simplify_any): Likewise.
      	(gfc_simplify_count): Likewise.
      	(gfc_simplify_iall): Likewise.
      	(gfc_simplify_iany): Likewise.
      	(gfc_simplify_iparity): Likewise.
      	(gfc_simplify_minval): Likewise.
      	(gfc_simplify_maxval): Likewise.
      	(gfc_simplify_norm2): Likewise.
      	(gfc_simplify_product): Likewise.
      	(gfc_simplify_sum): Likewise.
      
      2018-03-11  Thomas Koenig  <tkoenig@gcc.gnu.org>
      
      	PR fortran/66128
      	* gfortran.dg/zero_sized_9.f90: New test.
      
      From-SVN: r258435
      Thomas Koenig committed