[PATCH][AARCH64]Fix immediate alternative of movhf_aarch64 pattern.

gcc/

2018-03-12  Renlin Li  <renlin.li@arm.com>

    * config/aarch64/aarch64.md (movhf_aarch64): Fix mode argument to
    aarch64_output_scalar_simd_mov_immediate.

gcc/testsuite/

2018-03-12  Renlin Li  <renlin.li@arm.com>

    * gcc.target/aarch64/movi_hf.c: New.
    * gcc.target/aarch64/f16_mov_immediate_1.c: Update.
    * gcc.target/aarch64/f16_mov_immediate_2.c: Update.

From-SVN: r258459

gcc/ChangeLog

+2018-03-12  Renlin Li  <renlin.li@arm.com>
+
+	* config/aarch64/aarch64.md (movhf_aarch64): Fix mode argument to
+	aarch64_output_scalar_simd_mov_immediate.
+
 2018-03-12  Martin Sebor  <msebor@redhat.com>
 
 	PR tree-optimization/83456

gcc/config/aarch64/aarch64.md

@@ -1145,7 +1145,7 @@
    umov\\t%w0, %1.h[0]
    mov\\t%0.h[0], %1.h[0]
    fmov\\t%h0, %1
-   * return aarch64_output_scalar_simd_mov_immediate (operands[1], SImode);
+   * return aarch64_output_scalar_simd_mov_immediate (operands[1], HImode);
    ldr\\t%h0, %1
    str\\t%h1, %0
    ldrh\\t%w0, %1

gcc/testsuite/ChangeLog

+2018-03-12  Renlin Li  <renlin.li@arm.com>
+
+	* gcc.target/aarch64/movi_hf.c: New.
+	* gcc.target/aarch64/f16_mov_immediate_1.c: Update.
+	* gcc.target/aarch64/f16_mov_immediate_2.c: Update.
+
 2018-03-12  Martin Sebor  <msebor@redhat.com>
 
 	PR tree-optimization/83456
@@ -5,13 +11,6 @@
 	* c-c++-common/Wrestrict.c: Same.
 	* gcc.dg/Wrestrict-12.c: New test.
 	* gcc.dg/Wrestrict-14.c: New test.
-Index: gcc/c-family/c-common.c
-===================================================================
---- gcc/c-family/c-common.c	(revision 258366)
-+++ gcc/c-family/c-common.c	(working copy)
-@@ -5309,10 +5309,11 @@ check_function_sentinel (const_tree fntype, int na
-     }
- }
 
 2018-03-12  H.J. Lu  <hongjiu.lu@intel.com>
 

gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c

@@ -45,5 +45,5 @@ __fp16 f5 ()
 }
 
 /* { dg-final { scan-assembler-times "mov\tw\[0-9\]+, #?19520"           3 } } */
-/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.2s, 0xbc, lsl 8"  1 } } */
-/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.2s, 0x4c, lsl 8"  1 } } */
+/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0xbc, lsl 8"  1 } } */
+/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0x4c, lsl 8"  1 } } */

gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_2.c

@@ -36,9 +36,9 @@ float16_t f3(void)
 }
 
 /* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, ?#0"         1 } } */
-/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.2s, 0x80, lsl 8" 1 } } */
-/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.2s, 0x5c, lsl 8" 1 } } */
-/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.2s, 0x7c, lsl 8" 1 } } */
+/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0x80, lsl 8" 1 } } */
+/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0x5c, lsl 8" 1 } } */
+/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0x7c, lsl 8" 1 } } */
 
 /* { dg-final { scan-assembler-times "mov\tw\[0-9\]+, 19520"              1 } } */
 /* { dg-final { scan-assembler-times "fmov\th\[0-9\], w\[0-9\]+"          1 } } */

gcc/testsuite/gcc.target/aarch64/movi_hf.c

+/* { dg-do compile } */
+/* { dg-options "-O0 -std=c99" } */
+
+__fp16
+foo ()
+{
+  /* { dg-final { scan-assembler "movi\tv\[0-9\]+\.8b" } } */
+  return 0x1.544p5;
+}