1. 07 Jan, 2020 22 commits
    • install.texi: Bump minimal supported MPC version. · b11b9e29
      2020-01-07  Richard Biener  <rguenther@suse.de>
      
      	* doc/install.texi: Bump minimal supported MPC version.
      
      From-SVN: r279955
      Richard Biener committed
    • Add a generic lhd_simulate_enum_decl · ab341f50
      Normally we only create SVE ACLE functions when arm_sve.h is included.
      But for LTO we need to do it at start-up, so that the functions are
      already defined when streaming in the LTO objects.
      
      One hitch with doing that is that LTO doesn't yet implement the
      simulate_enum_decl langhook.  This patch adds a simple default
      implementation that it can use.
      
      2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
      
      gcc/
      	* langhooks-def.h (lhd_simulate_enum_decl): Declare.
      	(LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
      	* langhooks.c: Include stor-layout.h.
      	(lhd_simulate_enum_decl): New function.
      	* config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
      	handle_arm_sve_h for the LTO frontend.
      	(register_vector_type): Cope with null returns from pushdecl.
      
      gcc/testsuite/
      	* gcc.target/aarch64/sve/pcs/asm_4.c: New test.
      
      From-SVN: r279954
      Richard Sandiford committed
    • [AArch64] Use type attributes to mark types that use the SVE PCS · 683e93d1
      The SVE port needs to maintain a different type identity for
      GNU vectors and "SVE vectors", since the types use different ABIs.
      Until now we've done that using pointer equality between the
      TYPE_MAIN_VARIANT and the built-in SVE type.
      
      However, as Richard B noted, that doesn't work well for LTO,
      where we stream both GNU and SVE types from a file instead of
      creating them directly.  We need a mechanism for distinguishing
      the types using streamed type information.
      
      This patch does that using a new type attribute.  This attribute
      is only meant to be used for the built-in SVE types and shouldn't
      be user-visible.  The patch tries to ensure this by including a space
      in the attribute name, like we already do for things like "fn spec"
      and "omp declare simd".
      
      2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
      
      gcc/
      	* config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
      	(aarch64_sve::nvectors_if_data_type): Replace with...
      	(aarch64_sve::builtin_type_p): ...this.
      	* config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
      	(find_vector_type): Delete.
      	(add_sve_type_attribute): New function.
      	(lookup_sve_type_attribute): Likewise.
      	(register_builtin_types): Add an "SVE type" attribute to each type.
      	(register_tuple_type): Likewise.
      	(svbool_type_p, nvectors_if_data_type): Delete.
      	(mangle_builtin_type): Use lookup_sve_type_attribute.
      	(builtin_type_p): Likewise.  Add an overload that returns the
      	number of constituent vector and predicate registers.
      	* config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
      	(aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
      	instead of aarch64_sve_argument_p.
      	(aarch64_takes_arguments_in_sve_regs_p): Likewise.
      	(aarch64_pass_by_reference): Likewise.
      	(aarch64_function_value_1): Likewise.
      	(aarch64_return_in_memory): Likewise.
      	(aarch64_layout_arg): Likewise.
      
      gcc/testsuite/
      	* g++.target/aarch64/sve/acle/general-c++/mangle_5.C: New test.
      	* gcc.target/aarch64/sve/pcs/asm_1.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/asm_2.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/asm_3.c: Likewise.
      
      From-SVN: r279953
      Richard Sandiford committed
    • Don't mangle attributes that have a space in their name · c4b30920
      The SVE port needs to maintain a different type identity for
      GNU vectors and "SVE vectors" even during LTO, since the types
      use different ABIs.  The easiest way of doing that seemed to be
      to use type attributes.  However, these type attributes shouldn't
      be user-facing; they're just a convenient way of representing the
      types internally in GCC.
      
      There are already several internal-only attributes, such as "fn spec"
      and "omp declare simd".  They're distinguished from normal user-facing
      attributes by having a space in their name, which means that it isn't
      possible to write them directly in C or C++.
      
      Taking the same approach mostly works well for SVE.  The only snag
      I've hit so far is that the new attribute needs to (and only exists to)
      affect type identity.  This means that it would normally get included
      in mangled names, to distinguish it from types without the attribute.
      
      However, the SVE ABI specifies a separate mangling for SVE vector types,
      rather than using an attribute mangling + a normal vector mangling.
      So we need some way of suppressing the attribute mangling for this case.
      
      There are currently no other target-independent or target-specific
      internal-only attributes that affect type identity, so this patch goes
      for the simplest fix of skipping mangling for attributes whose names
      contain a space (which usually wouldn't give a valid symbol anyway).
      Other options I thought about were:
      
      (1) Also make sure that targetm.mangled_type returns nonnull.
      
      (2) Check directly for the target-specific name.
      
      (3) Add a new target hook.
      
      (4) Add new information to attribute_spec.  This would be very invasive
          at this stage, but maybe we should consider replacing all the boolean
          fields with flags?  That should make the tables slightly easier to
          read and would make adding new flags much simpler in future.
      
      2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
      
      gcc/cp/
      	* mangle.c (mangle_type_attribute_p): New function, split out from...
      	(write_CV_qualifiers_for_type): ...here.  Don't mangle attributes
      	that contain a space.
      
      From-SVN: r279952
      Richard Sandiford committed
    • re PR tree-optimization/93156 (abused nonnull attribute evokes new segfault in… · fb862fdf
      re PR tree-optimization/93156 (abused nonnull attribute evokes new segfault in gcc 10 since Nov 4 commit, 0fb958ab8aa)
      
      	PR tree-optimization/93156
      	* tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
      	least significant bit is always clear.
      
      	* gcc.dg/tree-ssa/pr93156.c: New test.
      
      From-SVN: r279951
      Jakub Jelinek committed
    • re PR tree-optimization/93118 (>>32<<32 is not always converted into… · f26916c2
      re PR tree-optimization/93118 (>>32<<32 is not always converted into &~0ffffffffull at the tree level)
      
      	PR tree-optimization/93118
      	* match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?.  Add new
      	simplifier with two intermediate conversions.
      
      	* gcc.dg/tree-ssa/pr93118.c: New test.
      
      From-SVN: r279950
      Jakub Jelinek committed
    • Add Optimization keyword for TREE/RTL optimization passes. · 5c4177c5
      2020-01-07  Martin Liska  <mliska@suse.cz>
      
      	* params.opt: Add Optimization for various parameters.
      
      From-SVN: r279949
      Martin Liska committed
    • Document cloning for the target_clone attribute. · fa13d9eb
      2020-01-07  Martin Liska  <mliska@suse.cz>
      
      	PR ipa/83411
      	* doc/extend.texi: Explain cloning for target_clone
      	attribute.
      
      From-SVN: r279948
      Martin Liska committed
    • Make warn_inline Optimization option. · a924bffb
      2020-01-07  Martin Liska  <mliska@suse.cz>
      
      	PR tree-optimization/92860
      	* common.opt: Make in Optimization option
      	as it is affected by -O0, which is an Optimization
      	option.
      	* tree-inline.c (tree_inlinable_function_p):
      	Use opt_for_fn for warn_inline.
      	(expand_call_inline): Likewise.
      2020-01-07  Martin Liska  <mliska@suse.cz>
      
      	PR tree-optimization/92860
      	* gcc.dg/pr92860-2.c: New test.
      
      From-SVN: r279947
      Martin Liska committed
    • Mark -free as Optimization option. · a86689f5
      From-SVN: r279946
      Martin Liska committed
    • Mark param_min_crossjump_insns with Optimization keyword. · 5dbaaa20
      2020-01-07  Martin Liska  <mliska@suse.cz>
      
          PR optimization/92860
          * params.opt: Mark param_min_crossjump_insns with Optimization
          keyword.
      
      From-SVN: r279945
      Martin Liska committed
    • re PR fortran/93162 (gcc/fortran/trans-openmp.c:2469:50: runtime error: load of… · 851817d8
      re PR fortran/93162 (gcc/fortran/trans-openmp.c:2469:50: runtime error: load of value 145992800, which is not a valid value for type 'ar_type' since r279628)
      
      	PR fortran/93162
      	* trans-openmp.c (gfc_trans_omp_clauses): Check for REF_ARRAY type
      	before testing u.ar.type == AR_FULL.
      
      From-SVN: r279944
      Jakub Jelinek committed
    • re PR c++/91369 (Implement P0784R7: constexpr new) · f74f6092
      	PR c++/91369
      	* constexpr.c (struct constexpr_global_ctx): Add heap_alloc_count
      	member, initialize it to zero in ctor.
      	(cxx_eval_call_expression): Bump heap_dealloc_count when deleting
      	a heap object.  Don't cache calls to functions which allocate some
      	heap objects and don't deallocate them or deallocate some heap
      	objects they didn't allocate.
      
      	* g++.dg/cpp1y/constexpr-new.C: Expect an error explaining why
      	static_assert failed for C++2a.
      	* g++.dg/cpp2a/constexpr-new9.C: New test.
      
      From-SVN: r279943
      Jakub Jelinek committed
    • ipa-inline: Adjust condition for caller_growth_limits · 6ac22177
      Inline should return failure either (newsize > param_large_function_insns)
      OR (newsize > limit).  Sometimes newsize is larger than
      param_large_function_insns, but smaller than limit, inline doesn't return
      failure even if the new function is a large function.
      Therefore, param_large_function_insns and param_large_function_growth should be
      OR instead of AND, otherwise --param large-function-growth won't
      work correctly with --param large-function-insns.
      
      gcc/ChangeLog:
      
      	2020-01-07  Luo Xiong Hu  <luoxhu@linux.ibm.com>
      
      	* ipa-inline-analysis.c (estimate_growth): Fix typo.
      	* ipa-inline.c (caller_growth_limits): Use OR instead of AND.
      
      From-SVN: r279942
      Luo Xiong Hu committed
    • Refactor some code for a future change. · 1b02c8c3
      2020-01-06  Michael Meissner  <meissner@linux.ibm.com>
      
      	* config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
      	helper function to return the valid addressing formats for a given
      	hard register and mode.
      	(rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
      
      Index: gcc/config/rs6000/rs6000.c
      ===================================================================
      --- gcc/config/rs6000/rs6000.c	(revision 279912)
      +++ gcc/config/rs6000/rs6000.c	(working copy)
      @@ -6729,6 +6729,30 @@ rs6000_expand_vector_extract (rtx target
           }
       }
       
      +/* Helper function to return an address mask based on a physical register.  */
      +
      +static addr_mask_type
      +hard_reg_and_mode_to_addr_mask (rtx reg, machine_mode mode)
      +{
      +  unsigned int r = reg_or_subregno (reg);
      +  addr_mask_type addr_mask;
      +
      +  gcc_assert (HARD_REGISTER_NUM_P (r));
      +  if (INT_REGNO_P (r))
      +    addr_mask = reg_addr[mode].addr_mask[RELOAD_REG_GPR];
      +
      +  else if (FP_REGNO_P (r))
      +    addr_mask = reg_addr[mode].addr_mask[RELOAD_REG_FPR];
      +
      +  else if (ALTIVEC_REGNO_P (r))
      +    addr_mask = reg_addr[mode].addr_mask[RELOAD_REG_VMX];
      +
      +  else
      +    gcc_unreachable ();
      +
      +  return addr_mask;
      +}
      +
       /* Adjust a memory address (MEM) of a vector type to point to a scalar field
          within the vector (ELEMENT) with a mode (SCALAR_MODE).  Use a base register
          temporary (BASE_TMP) to fixup the address.  Return the new memory address
      @@ -6865,21 +6889,8 @@ rs6000_adjust_vec_address (rtx scalar_re
         if (GET_CODE (new_addr) == PLUS)
           {
             rtx op1 = XEXP (new_addr, 1);
      -      addr_mask_type addr_mask;
      -      unsigned int scalar_regno = reg_or_subregno (scalar_reg);
      -
      -      gcc_assert (HARD_REGISTER_NUM_P (scalar_regno));
      -      if (INT_REGNO_P (scalar_regno))
      -	addr_mask = reg_addr[scalar_mode].addr_mask[RELOAD_REG_GPR];
      -
      -      else if (FP_REGNO_P (scalar_regno))
      -	addr_mask = reg_addr[scalar_mode].addr_mask[RELOAD_REG_FPR];
      -
      -      else if (ALTIVEC_REGNO_P (scalar_regno))
      -	addr_mask = reg_addr[scalar_mode].addr_mask[RELOAD_REG_VMX];
      -
      -      else
      -	gcc_unreachable ();
      +      addr_mask_type addr_mask
      +	= hard_reg_and_mode_to_addr_mask (scalar_reg, scalar_mode);
       
             if (REG_P (op1) || SUBREG_P (op1))
       	valid_addr_p = (addr_mask & RELOAD_REG_INDEXED) != 0;
      
      From-SVN: r279941
      Michael Meissner committed
    • Update ChangeLog for last change · 0a4c673c
      From-SVN: r279940
      Michael Meissner committed
    • Update 'Q' constraint documentation. · e5d3611e
      2020-01-06  Michael Meissner  <meissner@linux.ibm.com>
      
      	* config/rs6000/constraints.md (Q constraint): Update
      	documentation.
      	* doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
      	documentation.
      
      From-SVN: r279939
      Michael Meissner committed
    • Fix bad code of vector extract of PC-relative address with variable element #. · 3d53551b
      2020-01-06  Michael Meissner  <meissner@linux.ibm.com>
      
      	* config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
      	Use 'Q' for doing vector extract from memory.
      	(vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
      	memory.
      	(vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
      	doing vector extract from memory.
      	(vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
      	extract from memory.
      
      From-SVN: r279938
      Michael Meissner committed
    • Add support for large prefixed address in adjusting a vector address. · dfef3500
      2020-01-06  Michael Meissner  <meissner@linux.ibm.com>
      
      	* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
      	for the offset being 34-bits when -mcpu=future is used.
      
      From-SVN: r279937
      Michael Meissner committed
    • PR c++/92552 - ICE with inherited constrained default ctor. · 665e3b21
      We set TYPE_HAS_USER_CONSTRUCTOR on the template type in lookup_using_decl,
      but we didn't copy it to the instantiation.  Setting it in
      one_inherited_ctor is too late, as that gets called after we decide whether
      to set CLASSTYPE_LAZY_DEFAULT_CTOR.  This change affects other testcases as
      well; the changes are fixes for the other inherited constructor tests as
      well.
      
      	* pt.c (instantiate_class_template_1): Copy
      	TYPE_HAS_USER_CONSTRUCTOR.
      	* class.c (one_inherited_ctor): Don't set it here.
      
      From-SVN: r279936
      Jason Merrill committed
    • PR c++/92739 - parsing requires clause with attributes. · e4bcf1f5
      gcc/cp/
      	* parser.c (cp_parser_constraint_requires_parens): Exclude
      	attributes as postfix expressions.
      
      gcc/testsuite/
      	* g++.dg/concepts-pr92739.C: New test.
      
      From-SVN: r279935
      Andrew Sutton committed
    • Daily bump. · bd401fc8
      From-SVN: r279932
      GCC Administrator committed
  2. 06 Jan, 2020 15 commits
    • pa.md: Revert change to use ordered_comparison_operator instead of... · cf319b3f
      	* config/pa/pa.md: Revert change to use ordered_comparison_operator
      	instead of cmpib_comparison_operator in cmpib patterns.
      	* config/pa/predicates.md (cmpib_comparison_operator): Revert removal
      	of cmpib_comparison_operator.  Revise comment.
      
      From-SVN: r279927
      John David Anglin committed
    • Require equal shift amounts for IFN_DIV_POW2 · a0643f02
      IFN_DIV_POW2 currently requires all elements to be shifted by the
      same amount, in a similar way as for WIDEN_LSHIFT_EXPR.  This patch
      enforces that when building the SLP tree.
      
      If in future targets want to support IFN_DIV_POW2 without this
      restriction, we'll probably need the kind of vector-vector/
      vector-scalar split that we already have for normal shifts.
      
      2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
      
      gcc/
      	* tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
      	in an IFN_DIV_POW2 node to be equal.
      
      gcc/testsuite/
      	* gcc.target/aarch64/sve/asrdiv_1.c: Remove trailing %s.
      	* gcc.target/aarch64/sve/asrdiv_2.c: New test.
      	* gcc.target/aarch64/sve/asrdiv_3.c: Likewise.
      
      From-SVN: r279908
      Richard Sandiford committed
    • Check mask argument's type when vectorising conditional functions · 8a0ae3c1
      We can't yet vectorise conditional internal functions whose boolean
      condition is fed by a data access (or more generally, by a tree of logic
      ops in which all the leaves are data accesses).  Although we should add
      that eventually, we'd need further work to generate good-quality code.
      
      Unlike vectorizable_load and vectorizalbe_store, vectorizable_call
      wasn't checking whether the mask had a suitable type, leading to an
      ICE on the testcases.
      
      2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
      
      gcc/
      	* tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
      	(vect_check_scalar_mask): ...this.
      	(vectorizable_store, vectorizable_load): Update call accordingly.
      	(vectorizable_call): Use vect_check_scalar_mask to check the mask
      	argument in calls to conditional internal functions.
      
      gcc/testsuite/
      	* gcc.dg/vect/vect-cond-arith-8.c: New test.
      	* gcc.target/aarch64/sve/cond_fmul_5.c: Likewise.
      
      From-SVN: r279907
      Richard Sandiford committed
    • Fix amdgcn issue with '0' constraints · d54fc770
      2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
      
      	gcc/
      	* config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
      	'0' matching inputs.
      	(subv64di3_exec): Likewise.
      
      From-SVN: r279906
      Andrew Stubbs committed
    • mips.c (vr4130_align_insns): Fix typo. · 2b4f0b89
      2020-01-06  Bryan Stenson  <bryan@siliconvortex.com>
      
      	* config/mips/mips.c (vr4130_align_insns): Fix typo.
      	* doc/md.texi (movstr): Likewise.
      
      From-SVN: r279905
      Bryan Stenson committed
    • Fix early-clobber in amdgcn vec_extract · b4d74ed7
      2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
      
      	gcc/
      	* config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
      	clobber.
      
      From-SVN: r279904
      Andrew Stubbs committed
    • PR c++/79592 adjust testcase · 1810a89c
      https://gcc.gnu.org/ml/gcc-patches/2020-01/msg00127.html
      	* g++.dg/ubsan/vptr-4.C: Add expected error.
      
      From-SVN: r279902
      Nathan Sidwell committed
    • [AArch64] Use move-if-change for aarch64-tune.md · 03338111
      If aarch64-tune.md was older than gentune.sh or aarch64-cores.def,
      we'd try to overwrite it even if the current contents were correct.
      This could cause problems with read-only source directories and
      could cause spurious copying for rsync --archive.
      
      2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
      
      gcc/
      	* config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
      	Depend on...
      	(s-aarch64-tune-md): ...this new stamp file.  Pipe the new contents
      	to a temporary file and use move-if-change to update the real
      	file where necessary.
      
      From-SVN: r279900
      Richard Sandiford committed
    • [AArch64] Fix constraints for CPY /M · 3c2707f3
      The constraints for CPY /M allowed p0-p15 instead of the intended p0-p7.
      This looks like a pasto from the preceding constant pattern, where p0-p15
      is allowed.
      
      2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
      
      gcc/
      	* config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
      	rather than Upa for CPY /M.
      
      gcc/testsuite/
      	* gcc.target/aarch64/sve/acle/general/cpy_1.c: New test.
      
      From-SVN: r279899
      Richard Sandiford committed
    • Fix amdgcn inline immediate range · 5960de78
      2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
      
      	gcc/
      	* config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
      	immediate.
      
      From-SVN: r279898
      Andrew Stubbs committed
    • libstdc++: Remove redundant inequality operators in <stop_token> · a4a1f965
      	* include/std/stop_token (stop_token): Remove operator!= (LWG 3254).
      	(stop_source): Likewise (LWG 3362).
      	* testsuite/30_threads/stop_token/stop_source.cc: Test equality
      	comparisons.
      
      From-SVN: r279897
      Jonathan Wakely committed
    • libstdc++: Define __cpp_lib_three_way_comparison conditionally · f31a99f7
      The contents of the <compare> header are not complete unless concepts
      are supported, so the feature test macro should depend on the macro for
      concepts.
      
      As a result, the std::lexicographical_compare_three_way function will
      not be defined unless concepts are supported, so there is no need to
      check __cpp_lib_concepts before using concepts in those functions.
      
      	* include/bits/stl_algobase.h (__is_byte_iter, __min_cmp)
      	(lexicographical_compare_three_way): Do not depend on
      	__cpp_lib_concepts.
      	* include/std/version (__cpp_lib_three_way_comparison): Only define
      	when __cpp_lib_concepts is defined.
      	* libsupc++/compare (__cpp_lib_three_way_comparison): Likewise.
      
      From-SVN: r279896
      Jonathan Wakely committed
    • Mark param_max_combine_insns with Optimization keyword. · 4ce43ba4
          PR tree-optimization/92860
          * params.opt: Mark param_max_combine_insns with Optimization
          keyword.
      
      From-SVN: r279895
      Martin Liska committed
    • New bitfield testcases. · 8f50e25f
      2020-01-05  Andrew Pinski  <apinski@marvell.com>
      
              * gcc.c-torture/compile/20200105-1.c: New testcase.
              * gcc.c-torture/compile/20200105-2.c: New testcase.
              * gcc.c-torture/compile/20200105-3.c: New testcase.
      
      From-SVN: r279893
      Andrew Pinski committed
    • Daily bump. · 6ce195bd
      From-SVN: r279892
      GCC Administrator committed
  3. 05 Jan, 2020 3 commits
    • discr1.ads: Compile with -gnatc instead of -gnatct. · e9c6bb46
      	* gnat.dg/specs/discr1.ads: Compile with -gnatc instead of -gnatct.
      	* gnat.dg/specs/limited_with4.ads: Likewise.
      	* gnat.dg/specs/limited_with4_pkg.ads: Likewise.
      	* gnat.dg/specs/private1-sub.ads: Likewise.
      	* gnat.dg/specs/task1.ads: Likewise.
      
      From-SVN: r279889
      Eric Botcazou committed
    • [testsuite, Darwin] Fix failing darwin-version-1.c. · 53cfd936
      Recent platform linkers will no longer accept linking for a target
      OS version less than 10.4.  Recent SDKs no longer have the libgcc_s
      shims used for 10.4 and 10.5.  So we need to adjust tests that expect
      these.
      
      gcc/testsuite/ChangeLog:
      
      2020-01-05  Iain Sandoe  <iain@sandoe.co.uk>
      
      	* gcc.dg/darwin-version-1.c: Adjust test to use different
      	options for Darwin4-9 and Darwin10+.
      
      From-SVN: r279888
      Iain Sandoe committed
    • re PR target/93141 (Missed optimization : Use of adc when checking overflow) · c57b4c22
      	PR target/93141
      	* config/i386/i386.md (SWIDWI): New mode iterator.
      	(DWI, dwi): Add TImode variants.
      	(addv<mode>4): Use SWIDWI iterator instead of SWI.  Use
      	<general_hilo_operand> instead of <general_operand>.  Use
      	CONST_SCALAR_INT_P instead of CONST_INT_P.
      	(*addv<mode>4_1): Rename to ...
      	(addv<mode>4_1): ... this.
      	(QWI): New mode attribute.
      	(*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
      	define_insn_and_split patterns.
      	(*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
      	patterns.
      	(uaddv<mode>4): Use SWIDWI iterator instead of SWI.  Use
      	<general_hilo_operand> instead of <general_operand>.
      	(*addcarry<mode>_1): New define_insn.
      	(*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
      
      	* gcc.target/i386/pr93141-1.c: New test.
      	* gcc.dg/pr67089-6.c: Expect 16 ADD_OVERFLOW calls even on ia32.
      
      From-SVN: r279887
      Jakub Jelinek committed