- 03 Jun, 2018 10 commits
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From-SVN: r261130
Andreas Schwab committed -
* cvt.c (perform_qualification_conversions): Use cp_fold_convert. From-SVN: r261129
Jason Merrill committed -
PR tree-optimization/86034 * gimple-ssa-store-merging.c (output_merged_store): Convert the RHS to the unsigned bitfield type in a bit insertion sequence if it does not have a larger precision than the bitfield size. (process_store): Also bypass widening conversions for BIT_INSERT_EXPR. From-SVN: r261128
Eric Botcazou committed -
2018-06-03 Paul Thomas <pault@gcc.gnu.org> PR fortran/36497 * decl.c (variable_decl): Use gfc_add_type for cray pointees. 2018-06-03 Paul Thomas <pault@gcc.gnu.org> PR fortran/36497 * gfortran.dg/cray_pointer_12.f90: New test. From-SVN: r261127
Paul Thomas committed -
2018-06-02 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/85938 * gfortran.dg/pr85938.f90: Fixed by revision r261081 From-SVN: r261125
Steven G. Kargl committed -
gcc/ * config/nds32/nds32-peephole2.md: Add new patterns for code size. From-SVN: r261124
Kito Cheng committed -
gcc/ * config/nds32/nds32-opts.h (nds32_arch_type): Add ARCH_V3J. * config/nds32/nds32.c (nds32_option_override): Consider ARCH_V3J. * config/nds32/nds32.h (TARGET_ISA_V3): Add ARCH_V3J checking. * config/nds32/nds32.opt (march): Add enum value Value(ARCH_V3J). From-SVN: r261123
Chung-Ju Wu committed -
gcc/ * common/config/nds32/nds32-common.c (nds32_option_optimization_table): Disable -fdelete-null-pointer-checks for ELF toolchain. From-SVN: r261122
Chung-Ju Wu committed -
* expr.c (mark_use): Handle location wrappers. From-SVN: r261121
Jason Merrill committed -
From-SVN: r261120
GCC Administrator committed
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- 02 Jun, 2018 11 commits
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gcc/ * config.gcc (nds32*): Use nds32-linux.opt and nds32-elf.opt. (nds32le-*-*, nds32be-*-*): Integrate checking process. (nds32*-*-*): Add glibc and uclibc conditions. * common/config/nds32/nds32-common.c (nds32_except_unwind_info): New. (TARGET_EXCEPT_UNWIND_INFO): Define. * config/nds32/elf.h: New file. * config/nds32/linux.h: New file. * config/nds32/nds32-elf.opt: New file. * config/nds32/nds32-linux.opt: New file. * config/nds32/nds32-fp-as-gp.c (pass_nds32_fp_as_gp::gate): Consider TARGET_LINUX_ABI. * config/nds32/nds32.c (nds32_conditional_register_usage): Consider TARGET_LINUX_ABI. (nds32_asm_file_end): Ditto. (nds32_print_operand): Ditto. (nds32_insert_attributes): Ditto. (nds32_init_libfuncs): New function. (TARGET_HAVE_TLS): Define. (TARGET_INIT_LIBFUNCS): Define. * config/nds32/nds32.h (TARGET_DEFAULT_RELAX): Apply different relax spec content. (TARGET_ELF): Apply different mcmodel setting. (LINK_SPEC, LIB_SPEC, STARTFILE_SPEC, ENDFILE_SPEC): The content has been migrated into elf.h and linux.h files. * config/nds32/nds32.md (add_pc): Consider TARGET_LINUX_ABI. * config/nds32/nds32.opt (mvh): Consider TARGET_LINUX_ABI. (mcmodel): The content has been migrated into nds32-elf.opt and nds32-linux.opt files. * config/nds32/t-elf: New file. * config/nds32/t-linux: New file. libgcc/ * config.host (nds32*-linux*): New. * config/nds32/linux-atomic.c: New file. * config/nds32/linux-unwind.h: New file. Co-Authored-By: Kito Cheng <kito.cheng@gmail.com> Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com> From-SVN: r261116
Chung-Ju Wu committed -
gcc/ * config/nds32/constants.md (unspec_volatile_element): Add UNSPEC_VOLATILE_OMIT_FP_BEGIN and UNSPEC_VOLATILE_OMIT_FP_END. * config/nds32/nds32-fp-as-gp.c: New implementation of fp_as_gp optimization. * config/nds32/nds32-protos.h (nds32_naked_function_p): Declare. (make_pass_nds32_fp_as_gp): Declare. * config/nds32/nds32.c (nds32_register_passes): Add fp_as_gp as one optmization pass. (nds32_asm_function_end_prologue): Remove unused asm output. (nds32_asm_function_begin_epilogue): Remove unused asm output. (nds32_asm_file_start): Output necessary fp_as_gp information. (nds32_option_override): Adjust register usage. (nds32_expand_prologue): Consider fp_as_gp situation. (nds32_expand_prologue_v3push): Consider fp_as_gp situation. * config/nds32/nds32.md (prologue): Check fp_as_gp_p and naked_p. (epilogue): Ditto. (return): Ditto. (simple_return): Ditto. (omit_fp_begin): Output special directive for fp_as_gp. (omit_fp_end): Output special directive for fp_as_gp. * config/nds32/nds32.opt (mfp-as-gp, mno-fp-as-gp, mforce-fp-as-gp, mforbid-fp-as-gp): New options. Co-Authored-By: Shiva Chen <shiva0217@gmail.com> From-SVN: r261115
Chung-Ju Wu committed -
* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Constant>: If this is not a definition, retrieve the expression only if it's a compile-time known value if we are just annotating types. * gcc-interface/utils.c (convert): Do not try to upcast properly for a conversion between tagged types in type_annotate_only mode. From-SVN: r261113
Eric Botcazou committed -
From-SVN: r261109
Eric Botcazou committed -
* gcc-interface/ada-tree.h (TYPE_PADDING_FOR_COMPONENT): New macro. * gcc-interface/decl.c (gnat_to_gnu_component_type): Cache the padding type built for an aliased component with variable size. From-SVN: r261106
Eric Botcazou committed -
* gnat.dg/discr53.ad[sb]: New test. * gnat.dg/discr53_pkg.ads: New helper. From-SVN: r261102
Eric Botcazou committed -
* lambda.c (resolvable_dummy_lambda): Use nonlambda_method_basetype. (nonlambda_method_basetype): Handle NSDMI. From-SVN: r261101
Jason Merrill committed -
From-SVN: r261100
Jason Merrill committed -
gcc/testsuite/ChangeLog: 2018-06-01 Carl Love <cel@us.ibm.com> Commit 260294 on 2018-05-16 by Carl Love was supposed to add the following files. * gcc.target/powerpc/vsx-vector-6-be.p7.c: New test file. * gcc.target/powerpc/vsx-vector-6-be.p8.c: New test file. From-SVN: r261098
Carl Love committed -
altivec-12.c (main): Fix declaration of ucz to make it consistent with the naming convention in the file. gcc/testsuite/ChangeLog: 2018-06-01 Carl Love <cel@us.ibm.com> * gcc.target/powerpc/altivec-12.c (main): Fix declaration of ucz to make it consistent with the naming convention in the file. * gcc.target/powerpc/altivec-7-be.c: Move BE specific checks to altivec-7.c. Delete file. * gcc.target/powerpc/altivec-7-le.c: Move LE specific checks to altivec-7.c. Delete file. * gcc.target/powerpc/altivec-7.h: Move to altivec-7.c. * gcc.target/powerpc/altivec-7.c (main): Add vec_unpackh and vec_unpackl tests. Update instruction counts. * gcc.target/powerpc/builtins-1-le.c: Move LE specific checks to tests to builtins-1.c. * gcc.target/powerpc/builtins-1-be.c: Move BE specific tests to builtins-1.c. * gcc.target/powerpc/builtins-1.h: Move to file builtins-1.c. * gcc.target/powerpc/builtins-1.c (main): Add test case for vec_and. vec_round, vec_rsqrt, vec_rsqrte, vec_mergee, vec_mergh, vec_mergo. Remove vec_ctf tests returning double. Remove vec_cts with double args. Remove vec_sel with invalid arguments. Add tests for vec_splat. Add instruction counts for new tests. * gcc.target/powerpc/builtins-3-runnable.c (main): Add test for vec_doublee, vec_doubleo, vec_doublel, vec_doubleh, vec_signed, vec_unsigned. * gcc.target/powerpc/builtins-3.c: Add tests test_sll_vuill_vuill_vuc, test_sll_vsill_vsill_vuc. * gcc.target/powerpc/p9-xxbr-2.c (rev_bool_long_long): Added test for vec_revb. * gcc.target/powerpc/vsx-7.h: Rename to vsx-7.c. Remove redundant tests from altivec-7.h. * gcc.target/powerpc/vsx-7-be.c: Remove file. * gcc.target/powerpc/vsx-builtin-7.c: Add test functions splat_sc_s8, splat_uc_u8, splat_ssi_s16, splat_usi_s16, splat_si_s32, splat_ui_u32, splat_sll, splat_uc, splat_int128, splat_uint128. Make second argument of vec_extract and vec_insert a signed int. * gcc.target/powerpc/vsx-vector-5.c (vrint): Add vrint test for float argument. From-SVN: r261097
Carl Love committed -
From-SVN: r261096
GCC Administrator committed
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- 01 Jun, 2018 19 commits
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The loclists_base attribute is used to point to the beginning of the loclists index of a DWARF5 loclists table when using DW_FORM_loclistsx. For split compile units the base is not given by the attribute, but is either the first (and only) index in the .debug_loclists.dwo section, or (when placed in a .dwp file) given by the DW_SECT_LOCLISTS row in the .debug_cu_index section. The loclists_base attribute is only valid for the full (or skeleton) compile unit DIE in the main (relocatable) object. But GCC only ever generates a loclists table index for the .debug_loclists section put into the split DWARF .dwo file. For split compile unit DIEs it is confusing (and not according to spec) to also have a DW_AT_loclists_base attribute (which might be wrong, since its relocatable offset won't actually be relocated). gcc/ChangeLog * dwarf2out.c (dwarf2out_finish): Remove generation of DW_AT_loclists_base. From-SVN: r261092
Mark Wielaard committed -
From-SVN: r261090
Jason Merrill committed -
* gimple-ssa-store-merging.c: Include gimple-fold.h. (struct store_immediate_info): Document BIT_INSERT_EXPR stores. (struct merged_store_group): Add bit_insertion field. (dump_char_array): Use standard hexadecimal format. (merged_store_group::merged_store_group): Set bit_insertion to false. (merged_store_group::apply_stores): Use optimal buffer size. Deal with BIT_INSERT_EXPR stores. Move up code updating the mask and also print the mask in the dump file. (pass_store_merging::gate): Minor tweak. (imm_store_chain_info::coalesce_immediate): Fix wrong association of stores with groups in dump. Allow coalescing of BIT_INSERT_EXPR stores with INTEGER_CST stores. (count_multiple_uses) <BIT_INSERT_EXPR>: New case. (imm_store_chain_info::output_merged_store): Add try_bitpos variable and use it throughout. Generate bit insertion sequences if need be. (pass_store_merging::process_store): Remove redundant condition. Record stores from a SSA name to a bit-field with BIT_INSERT_EXPR. From-SVN: r261089
Eric Botcazou committed -
gcc/testsuite/ChangeLog: 2018-06-01 Carl Love <cel@us.ibm.com> * gcc.target/powerpc/altivec-35.c (foo): Add builtin test vec_madds. * gcc.target/powerpc/builtins-6-runnable.c (main): Fix typo for output. Add vec_xst_be for signed and unsigned arguments. From-SVN: r261088
Carl Love committed -
From-SVN: r261087
Jason Merrill committed -
* constexpr.c (instantiate_cx_fn_r, instantiate_constexpr_fns): New. (cxx_eval_outermost_constant_expr): Call instantiate_constexpr_fns. From-SVN: r261086
Jason Merrill committed -
* pt.c (mark_decl_instantiated): Clear DECL_EXTERNAL. From-SVN: r261085
Jason Merrill committed -
From-SVN: r261084
Jason Merrill committed -
* MAINTAINERS (write after approval): Add myself. From-SVN: r261082
Jozef Lawrynowicz committed -
2018-06-01 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/85816 PR fortran/85975 * libgfortran.h: Remove the GFC_DTYPE_COPY_SETRANK macro. * intrinsics/reshape_generic.c: Directly assign rank. * intrinsics/spread_generic.c: Ditto. * m4/iforeach-s.m4: Ditto. * m4/iforeach.m4: Ditto. * m4/ifunction-s.m4: Ditto. * m4/ifunction-s2.m4: Ditto. * m4/ifunction.m4: Ditto. * m4/ifunction_logical.m4: Ditto. * m4/reshape.m4: Ditto. * m4/spread.m4: Ditto. * generated/all_l1.c: Regenerated from m4 files. * generated/all_l16.c: Ditto. * generated/all_l2.c: Ditto. * generated/all_l4.c: Ditto. * generated/all_l8.c: Ditto. * generated/any_l1.c: Ditto. * generated/any_l16.c: Ditto. * generated/any_l2.c: Ditto. * generated/any_l4.c: Ditto. * generated/any_l8.c: Ditto. * generated/count_16_l.c: Ditto. * generated/count_1_l.c: Ditto. * generated/count_2_l.c: Ditto. * generated/count_4_l.c: Ditto. * generated/count_8_l.c: Ditto. * generated/iall_i1.c: Ditto. * generated/iall_i16.c: Ditto. * generated/iall_i2.c: Ditto. * generated/iall_i4.c: Ditto. * generated/iall_i8.c: Ditto. * generated/iany_i1.c: Ditto. * generated/iany_i16.c: Ditto. * generated/iany_i2.c: Ditto. * generated/iany_i4.c: Ditto. * generated/iany_i8.c: Ditto. * generated/iparity_i1.c: Ditto. * generated/iparity_i16.c: Ditto. * generated/iparity_i2.c: Ditto. * generated/iparity_i4.c: Ditto. * generated/iparity_i8.c: Ditto. * generated/maxloc0_16_i1.c: Ditto. * generated/maxloc0_16_i16.c: Ditto. * generated/maxloc0_16_i2.c: Ditto. * generated/maxloc0_16_i4.c: Ditto. * generated/maxloc0_16_i8.c: Ditto. * generated/maxloc0_16_r10.c: Ditto. * generated/maxloc0_16_r16.c: Ditto. * generated/maxloc0_16_r4.c: Ditto. * generated/maxloc0_16_r8.c: Ditto. * generated/maxloc0_16_s1.c: Ditto. * generated/maxloc0_16_s4.c: Ditto. * generated/maxloc0_4_i1.c: Ditto. * generated/maxloc0_4_i16.c: Ditto. * generated/maxloc0_4_i2.c: Ditto. * generated/maxloc0_4_i4.c: Ditto. * generated/maxloc0_4_i8.c: Ditto. * generated/maxloc0_4_r10.c: Ditto. * generated/maxloc0_4_r16.c: Ditto. * generated/maxloc0_4_r4.c: Ditto. * generated/maxloc0_4_r8.c: Ditto. * generated/maxloc0_4_s1.c: Ditto. * generated/maxloc0_4_s4.c: Ditto. * generated/maxloc0_8_i1.c: Ditto. * generated/maxloc0_8_i16.c: Ditto. * generated/maxloc0_8_i2.c: Ditto. * generated/maxloc0_8_i4.c: Ditto. * generated/maxloc0_8_i8.c: Ditto. * generated/maxloc0_8_r10.c: Ditto. * generated/maxloc0_8_r16.c: Ditto. * generated/maxloc0_8_r4.c: Ditto. * generated/maxloc0_8_r8.c: Ditto. * generated/maxloc0_8_s1.c: Ditto. * generated/maxloc0_8_s4.c: Ditto. * generated/maxloc1_16_i1.c: Ditto. * generated/maxloc1_16_i16.c: Ditto. * generated/maxloc1_16_i2.c: Ditto. * generated/maxloc1_16_i4.c: Ditto. * generated/maxloc1_16_i8.c: Ditto. * generated/maxloc1_16_r10.c: Ditto. * generated/maxloc1_16_r16.c: Ditto. * generated/maxloc1_16_r4.c: Ditto. * generated/maxloc1_16_r8.c: Ditto. * generated/maxloc1_16_s1.c: Ditto. * generated/maxloc1_16_s4.c: Ditto. * generated/maxloc1_4_i1.c: Ditto. * generated/maxloc1_4_i16.c: Ditto. * generated/maxloc1_4_i2.c: Ditto. * generated/maxloc1_4_i4.c: Ditto. * generated/maxloc1_4_i8.c: Ditto. * generated/maxloc1_4_r10.c: Ditto. * generated/maxloc1_4_r16.c: Ditto. * generated/maxloc1_4_r4.c: Ditto. * generated/maxloc1_4_r8.c: Ditto. * generated/maxloc1_4_s1.c: Ditto. * generated/maxloc1_4_s4.c: Ditto. * generated/maxloc1_8_i1.c: Ditto. * generated/maxloc1_8_i16.c: Ditto. * generated/maxloc1_8_i2.c: Ditto. * generated/maxloc1_8_i4.c: Ditto. * generated/maxloc1_8_i8.c: Ditto. * generated/maxloc1_8_r10.c: Ditto. * generated/maxloc1_8_r16.c: Ditto. * generated/maxloc1_8_r4.c: Ditto. * generated/maxloc1_8_r8.c: Ditto. * generated/maxloc1_8_s1.c: Ditto. * generated/maxloc1_8_s4.c: Ditto. * generated/maxval1_s1.c: Ditto. * generated/maxval1_s4.c: Ditto. * generated/maxval_i1.c: Ditto. * generated/maxval_i16.c: Ditto. * generated/maxval_i2.c: Ditto. * generated/maxval_i4.c: Ditto. * generated/maxval_i8.c: Ditto. * generated/maxval_r10.c: Ditto. * generated/maxval_r16.c: Ditto. * generated/maxval_r4.c: Ditto. * generated/maxval_r8.c: Ditto. * generated/minloc0_16_i1.c: Ditto. * generated/minloc0_16_i16.c: Ditto. * generated/minloc0_16_i2.c: Ditto. * generated/minloc0_16_i4.c: Ditto. * generated/minloc0_16_i8.c: Ditto. * generated/minloc0_16_r10.c: Ditto. * generated/minloc0_16_r16.c: Ditto. * generated/minloc0_16_r4.c: Ditto. * generated/minloc0_16_r8.c: Ditto. * generated/minloc0_16_s1.c: Ditto. * generated/minloc0_16_s4.c: Ditto. * generated/minloc0_4_i1.c: Ditto. * generated/minloc0_4_i16.c: Ditto. * generated/minloc0_4_i2.c: Ditto. * generated/minloc0_4_i4.c: Ditto. * generated/minloc0_4_i8.c: Ditto. * generated/minloc0_4_r10.c: Ditto. * generated/minloc0_4_r16.c: Ditto. * generated/minloc0_4_r4.c: Ditto. * generated/minloc0_4_r8.c: Ditto. * generated/minloc0_4_s1.c: Ditto. * generated/minloc0_4_s4.c: Ditto. * generated/minloc0_8_i1.c: Ditto. * generated/minloc0_8_i16.c: Ditto. * generated/minloc0_8_i2.c: Ditto. * generated/minloc0_8_i4.c: Ditto. * generated/minloc0_8_i8.c: Ditto. * generated/minloc0_8_r10.c: Ditto. * generated/minloc0_8_r16.c: Ditto. * generated/minloc0_8_r4.c: Ditto. * generated/minloc0_8_r8.c: Ditto. * generated/minloc0_8_s1.c: Ditto. * generated/minloc0_8_s4.c: Ditto. * generated/minloc1_16_i1.c: Ditto. * generated/minloc1_16_i16.c: Ditto. * generated/minloc1_16_i2.c: Ditto. * generated/minloc1_16_i4.c: Ditto. * generated/minloc1_16_i8.c: Ditto. * generated/minloc1_16_r10.c: Ditto. * generated/minloc1_16_r16.c: Ditto. * generated/minloc1_16_r4.c: Ditto. * generated/minloc1_16_r8.c: Ditto. * generated/minloc1_16_s1.c: Ditto. * generated/minloc1_16_s4.c: Ditto. * generated/minloc1_4_i1.c: Ditto. * generated/minloc1_4_i16.c: Ditto. * generated/minloc1_4_i2.c: Ditto. * generated/minloc1_4_i4.c: Ditto. * generated/minloc1_4_i8.c: Ditto. * generated/minloc1_4_r10.c: Ditto. * generated/minloc1_4_r16.c: Ditto. * generated/minloc1_4_r4.c: Ditto. * generated/minloc1_4_r8.c: Ditto. * generated/minloc1_4_s1.c: Ditto. * generated/minloc1_4_s4.c: Ditto. * generated/minloc1_8_i1.c: Ditto. * generated/minloc1_8_i16.c: Ditto. * generated/minloc1_8_i2.c: Ditto. * generated/minloc1_8_i4.c: Ditto. * generated/minloc1_8_i8.c: Ditto. * generated/minloc1_8_r10.c: Ditto. * generated/minloc1_8_r16.c: Ditto. * generated/minloc1_8_r4.c: Ditto. * generated/minloc1_8_r8.c: Ditto. * generated/minloc1_8_s1.c: Ditto. * generated/minloc1_8_s4.c: Ditto. * generated/minval1_s1.c: Ditto. * generated/minval1_s4.c: Ditto. * generated/minval_i1.c: Ditto. * generated/minval_i16.c: Ditto. * generated/minval_i2.c: Ditto. * generated/minval_i4.c: Ditto. * generated/minval_i8.c: Ditto. * generated/minval_r10.c: Ditto. * generated/minval_r16.c: Ditto. * generated/minval_r4.c: Ditto. * generated/minval_r8.c: Ditto. * generated/norm2_r10.c: Ditto. * generated/norm2_r16.c: Ditto. * generated/norm2_r4.c: Ditto. * generated/norm2_r8.c: Ditto. * generated/parity_l1.c: Ditto. * generated/parity_l16.c: Ditto. * generated/parity_l2.c: Ditto. * generated/parity_l4.c: Ditto. * generated/parity_l8.c: Ditto. * generated/product_c10.c: Ditto. * generated/product_c16.c: Ditto. * generated/product_c4.c: Ditto. * generated/product_c8.c: Ditto. * generated/product_i1.c: Ditto. * generated/product_i16.c: Ditto. * generated/product_i2.c: Ditto. * generated/product_i4.c: Ditto. * generated/product_i8.c: Ditto. * generated/product_r10.c: Ditto. * generated/product_r16.c: Ditto. * generated/product_r4.c: Ditto. * generated/product_r8.c: Ditto. * generated/reshape_c10.c: Ditto. * generated/reshape_c16.c: Ditto. * generated/reshape_c4.c: Ditto. * generated/reshape_c8.c: Ditto. * generated/reshape_i16.c: Ditto. * generated/reshape_i4.c: Ditto. * generated/reshape_i8.c: Ditto. * generated/reshape_r10.c: Ditto. * generated/reshape_r16.c: Ditto. * generated/reshape_r4.c: Ditto. * generated/reshape_r8.c: Ditto. * generated/spread_c10.c: Ditto. * generated/spread_c16.c: Ditto. * generated/spread_c4.c: Ditto. * generated/spread_c8.c: Ditto. * generated/spread_i1.c: Ditto. * generated/spread_i16.c: Ditto. * generated/spread_i2.c: Ditto. * generated/spread_i4.c: Ditto. * generated/spread_i8.c: Ditto. * generated/spread_r10.c: Ditto. * generated/spread_r16.c: Ditto. * generated/spread_r4.c: Ditto. * generated/spread_r8.c: Ditto. * generated/sum_c10.c: Ditto. * generated/sum_c16.c: Ditto. * generated/sum_c4.c: Ditto. * generated/sum_c8.c: Ditto. * generated/sum_i1.c: Ditto. * generated/sum_i16.c: Ditto. * generated/sum_i2.c: Ditto. * generated/sum_i4.c: Ditto. * generated/sum_i8.c: Ditto. * generated/sum_r10.c: Ditto. * generated/sum_r16.c: Ditto. * generated/sum_r4.c: Ditto. * generated/sum_r8.c: Ditto. 2018-06-01 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/85816 PR fortran/85975 * gfortran.dg/pr85816.f90: New test. * gfortran.dg/pr85975.f90: New test. From-SVN: r261081
Steven G. Kargl committed -
From-SVN: r261080
Bin Cheng committed -
From-SVN: r261079
Bin Cheng committed -
This patch changes the (C++) mangling of the 128-bit float types. IBM long double ("double-double") is mangled as "g", as before, and IEEE 128-bit long double is mangled as "u9__ieee128". * config/rs6000/rs6000.c (rs6000_mangle_type): Change the mangling of the 128-bit floating point types. Fix function comment. From-SVN: r261078
Segher Boessenkool committed -
2018-06-01 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/63570 * check.c (gfc_check_random_init): New function. Check arguments of RANDOM_INIT. * gfortran.h (GFC_ISYM_RANDOM_INIT): New enum token. * intrinsic.c (add_subroutines): Add RANDOM_INIT to list of subroutines. (gfc_check_intrinsic_standard): Introduce Fortran 2018 check. * intrinsic.h: Add prototypes for gfc_check_random_init and gfc_resolve_random_init * intrinsic.texi: Document new intrinsic subprogram. * iresolve.c (gfc_resolve_random_init): Resolve routine name. * trans-decl.c: Declare gfor_fndecl_random_init * trans-intrinsic.c (conv_intrinsic_random_init): New function. Translate call to RANDOM_INIT. (gfc_conv_intrinsic_subroutine): Call it. * trans.h: Declare gfor_fndecl_random_init 2018-06-01 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/63570 * gfortran.dg/random_init_1.f90: New test. * gfortran.dg/random_init_2.f90: New test. * gfortran.dg/random_init_3.f90: New test. * gfortran.dg/random_init_4.f90: New test. * gfortran.dg/random_init_5.f90: New test. * gfortran.dg/random_init_6.f90: New test. 2018-06-01 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/63570 * libgfortran/Makefile.am: Add random_init.f90 to build. * libgfortran/Makefile.in: Regenerated. * libgfortran/gfortran.map: Expose symbol for _gfortran_random_init. * libgfortran/intrinsics/random_init.f90: Implementation. From-SVN: r261075
Steven G. Kargl committed -
The SSHL and USHL instructions are used with a shift operand of zero to sign and zero-extend integer vectors into wider modes. GCC makes extensive use of them to "unpack" vectors. AArch64 defines a shorthand alias for that case. Instead of writing: SSHLL <Vd>.<Ta>, <Vn>.<Tb>, 0 we can write SXTL <Vd>.<Ta>, <Vn>.<Tb> Similar for the unsigned versions and the high-part versions (SSHL2 -> SXTL2). This makes the assembly of vectorised functions a bit more readable. * config/aarch64/aarch64-simd.md (aarch64_simd_vec_unpack<su>_lo_<mode>): Use UXTL and SXTL assembler mnemonics. (aarch64_simd_vec_unpack<su>_hi_<mode>): Use UXTL2 and SXTL2 assembler mnemonics. From-SVN: r261073
Kyrylo Tkachov committed -
2018-06-01 Tom de Vries <tdevries@suse.de> * MAINTAINERS: Update my email address. From-SVN: r261068
Tom de Vries committed -
This PR is a nasty wrong code bug due to my fluffing a test for a backedge in gimple-ssa-backprop.c. Backedges are supposed to be from definitions in the statement we're visiting to uses in statements that we haven't visited yet. However, the check failed to account for PHIs in the current block that had already been processed, so if two PHIs in the same block referenced each other, we'd treat both references as backedges. In more detail: The first phase of the pass goes through all statements in an arbitrary order, making optimistic assumptions about any statements that haven't been visited yet. The second phase then calculates a correct (supposedly maximal) fixed point. Although the first phase order is arbitrary in principle, we still use the CFG rpo to cut down on the backedges. This means that the only thing that's truly arbitrary is the order that we process the PHIs in a block. Any order should be OK and should eventually give the same results. But we have to follow whatever order we pick, and the pass wasn't doing that. 2018-06-01 Richard Sandiford <richard.sandiford@linaro.org> gcc/ PR tree-optimization/85989 * gimple-ssa-backprop.c (backprop::m_visited_phis): New member variable. (backprop::intersect_uses): Check it when deciding whether this is a backedge reference. (backprop::process_block): Add each phi to m_visited_phis after visiting it, then clear it at the end. gcc/testsuite/ PR tree-optimization/85989 * gcc.dg/torture/pr85989.c: New test. From-SVN: r261064
Richard Sandiford committed -
2018-06-01 Richard Biener <rguenther@suse.de> * tree-vectorizer.h (vect_dr_stmt): New function. (vect_get_load_cost): Adjust. (vect_get_store_cost): Likewise. * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Use vect_dr_stmt instead of DR_SMTT. (vect_record_base_alignments): Likewise. (vect_calculate_target_alignment): Likewise. (vect_compute_data_ref_alignment): Likewise and make static. (vect_update_misalignment_for_peel): Likewise. (vect_verify_datarefs_alignment): Likewise. (vector_alignment_reachable_p): Likewise. (vect_get_data_access_cost): Likewise. Pass down vinfo to vect_get_load_cost/vect_get_store_cost instead of DR. (vect_get_peeling_costs_all_drs): Likewise. (vect_peeling_hash_get_lowest_cost): Likewise. (vect_enhance_data_refs_alignment): Likewise. (vect_find_same_alignment_drs): Likewise. (vect_analyze_data_refs_alignment): Likewise. (vect_analyze_group_access_1): Likewise. (vect_analyze_group_access): Likewise. (vect_analyze_data_ref_access): Likewise. (vect_analyze_data_ref_accesses): Likewise. (vect_vfa_segment_size): Likewise. (vect_small_gap_p): Likewise. (vectorizable_with_step_bound_p): Likewise. (vect_prune_runtime_alias_test_list): Likewise. (vect_analyze_data_refs): Likewise. (vect_supportable_dr_alignment): Likewise. * tree-vect-loop-manip.c (get_misalign_in_elems): Likewise. (vect_gen_prolog_loop_niters): Likewise. * tree-vect-loop.c (vect_analyze_loop_2): Likewise. * tree-vect-patterns.c (vect_recog_bool_pattern): Do not modify DR_STMT. (vect_recog_mask_conversion_pattern): Likewise. (vect_try_gather_scatter_pattern): Likewise. * tree-vect-stmts.c (vect_model_store_cost): Pass stmt_info to vect_get_store_cost. (vect_get_store_cost): Get stmt_info instead of DR. (vect_model_load_cost): Pass stmt_info to vect_get_load_cost. (vect_get_load_cost): Get stmt_info instead of DR. From-SVN: r261062
Richard Biener committed -
2018-06-01 Richard Biener <rguenther@suse.de> PR middle-end/86017 * gimple-fold.c (var_decl_component_p): Also allow offsetted vars wrapped in MEM_REFs. * gcc.dg/tree-ssa/pr86017.c: New testcase. From-SVN: r261061
Richard Biener committed
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