2019-05-22  Paolo Carlini  <paolo.carlini@oracle.com>

      * g++.dg/cpp0x/decltype-pr66548.C: Remove, mistakenly added.

From-SVN: r271506

The test can't succeed on 32b powerpc Darwin since the
ABI demands a different result to the tested one.

2019-05-22  Iain Sandoe  <iain@sandoe.co.uk>

	PR testsuite/27221
	* g++.dg/ext/alignof2.C: XFAIL for 32bit Darwin.

From-SVN: r271505

2019-05-22  Martin Liska  <mliska@suse.cz>

	PR lto/90500
	* c-attribs.c (handle_copy_attribute): Do not copy
	target_clones attribute.
2019-05-22  Martin Liska  <mliska@suse.cz>

	PR lto/90500
	* gcc.target/i386/pr90500-1.c: Make the test-case valid
	now.
2019-05-22  Martin Liska  <mliska@suse.cz>

	PR lto/90500
	* doc/extend.texi: Document the change.

From-SVN: r271504

re PR tree-optimization/90450 (Hash function in gather_mem_refs_stmt does not match with mem_ref_hasher::equal)

2019-05-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/90450
	* tree-ssa-loop-im.c (struct im_mem_ref): Add ref_decomposed.
	(mem_ref_hasher::equal): Check it.
	(mem_ref_alloc): Initialize it.
	(gather_mem_refs_stmt): Set it.

From-SVN: r271503

2019-05-22  Richard Biener  <rguenther@suse.de>

	* gimple-fold.c (arith_code_with_undefined_signed_overflow):
	Add ABS_EXPR.
	(rewrite_to_defined_overflow): Handle rewriting ABS_EXPR
	as ABSU_EXPR.

	* gcc.dg/tree-ssa/ssa-lim-13.c: New testcase.

From-SVN: r271501

I'd like to remove -many from the options passed by default to the
assembler, on the grounds that a gcc bug in instruction selection (eg.
emitting a power9 insn for -mcpu=power8) is better found at assembly
time than run time.

For now, just do this when --enable-checking or gcc is not a release.

This patch also emits .machine assembler directives for ELF targets
when functions are compiled for different cpus via attributes or
pragmas.  That's necessary when the initial -m<cpu> option passed to
the assembler doesn't enable the superset of all opcodes emitted, as
seen by a failure of gcc.target/powerpc/clone2.c without .machine
when building gcc for power8.

rs6000_machine_from_flags deliberately uses ISA_2_4_MASKS rather than
ISA_2_2_MASKS for power5 because "friz" and other similar instructions
enabled by gcc with TARGET_FPRND are enabled in gas by "-mpower5".
(gas -mpower5 supports power5+ too.)  rs6000-cpus.def puts
OPTION_MASK_FPRND in ISA_2_4_MASKS, so ISA_2_4_MASKS is the one to use
in deciding to pass "-mpower5" to gas.

O3-pr70130.c also failed on an earlier version of this patch (when
only testing one ISA bit to determine .machine).  This is a test for a
power7 vector bug, but on power8 hw check_vect_support_and_set_flags
passes -mpower8-vector which means the test isn't exercising the
original bug exactly.  I reckon that is wrong, and similary for other
vector testcases that ask for a specific cpu.  I've fixed it here by
explicitly passing -mno-power8-vector and similar vector options.

	* config/rs6000/rs6000.h (ASM_OPT_ANY): Define.
	(ASM_CPU_SPEC): Conditionally add -many.
	* config/rs6000/rs6000.c (rs6000_machine): New static var.
	(rs6000_machine_from_flags, emit_asm_machine): New functions..
	(rs6000_file_start): ..extracted from here, and modified to
	test all ISA bits.
	(rs6000_output_function_prologue): Emit .machine as necessary.
	* testsuite/gcc.target/powerpc/ppc32-abi-dfp-1.c: Don't use
	power mnemonics.
	* testsuite/gcc.dg/vect/O3-pr70130.c: Disable default options
	added by check_vect_support_and_set_flags.
	* testsuite/gcc.dg/vect/pr48765.c: Likewise.
	* testsuite/gfortran.dg/vect/pr45714-b.f: Likewise.

From-SVN: r271500

re PR middle-end/90553 (Register allocation allocates post-incremented address-load of call to call-clobbered register)

	PR middle-end/90553
	* gcc.dg/torture/pr90553.c: New test.

From-SVN: r271499

re PR middle-end/90553 (Register allocation allocates post-incremented address-load of call to call-clobbered register)

	PR middle-end/90553
	* ira-lives.c (process_bb_node_lives): Consider defs
	for a call insn to be die before the call, not after.

From-SVN: r271498

In <https://gcc.gnu.org/ml/gcc-patches/2019-05/msg01417.html>:
...a change introduced in r94104 where BITS_PER_WORD was chosenperhaps because we expect register-sized writes into this area.

See <https://gcc.gnu.org/ml/gcc-patches/2005-01/msg01564.html>
for the r94104 change.

	* function.c (assign_parm_setup_block): Raise alignment of
	stacked parameter only for STRICT_ALIGNMENT targets.

From-SVN: r271497

From-SVN: r271496

parser.c (cp_parser_template_declaration_after_parameters): Use DECL_SOURCE_LOCATION in literal operator template errors.

/cp
2019-05-21  Paolo Carlini  <paolo.carlini@oracle.com>

	* parser.c (cp_parser_template_declaration_after_parameters): Use
	DECL_SOURCE_LOCATION in literal operator template errors.

/testsuite
2019-05-21  Paolo Carlini  <paolo.carlini@oracle.com>

	* g++.dg/cpp0x/udlit-tmpl-arg-neg2.C: Check locations too.
	* g++.dg/cpp0x/udlit-tmpl-parms-neg.C: Likewise.

From-SVN: r271492

/cp
2019-05-21  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/67184
	PR c++/69445
	* call.c (build_over_call): Devirtualize when the final overrider
	comes from the base.

/testsuite
2019-05-21  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/67184
	PR c++/69445
	* g++.dg/other/final3.C: New.
	* g++.dg/other/final4.C: Likewise.
	* g++.dg/other/final5.C: Likewise.

From-SVN: r271491

/cp
2019-05-21  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/67184
	PR c++/69445
	* call.c (build_over_call): Devirtualize when the final overrider
	comes from the base.

/testsuite
2019-05-21  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/67184
	PR c++/69445
	* g++.dg/other/final3.C: New.
	* g++.dg/other/final4.C: Likewise.
	* g++.dg/other/final5.C: Likewise.

From-SVN: r271490

    * include/pstl/execution_defs.h (__enable_if_execution_policy):
    Use std::__remove_cvref_t when building with GCC.

From-SVN: r271489

	* config/rs6000/constraints.md (define_register_constraint "wz"):
	Delete.
	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
	RS6000_CONSTRAINT_wz.
	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
	(rs6000_init_hard_regno_mode_ok): Adjust.
	* config/rs6000/rs6000.md: Replace "wz" constraint by "d" with "p7".
	* doc/md.texi (Machine Constraints): Adjust.

From-SVN: r271488

	* config/rs6000/constraints.md (define_register_constraint "wl"):
	Delete.
	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
	RS6000_CONSTRAINT_wl.
	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
	(rs6000_init_hard_regno_mode_ok): Adjust.
	* config/rs6000/rs6000.md: Replace "wl" constraint by "d" with "p6".
	* doc/md.texi (Machine Constraints): Adjust.

From-SVN: r271487

	* config/rs6000/constraints.md (define_register_constraint "wm"):
	Delete.
	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
	RS6000_CONSTRAINT_wm.
	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
	(rs6000_init_hard_regno_mode_ok): Adjust.
	* config/rs6000/vsx.md: Replace "wm" constraint by "wa" with "p8v".
	* doc/md.texi (Machine Constraints): Adjust.

From-SVN: r271486

	* config/rs6000/constraints.md (define_register_constraint "wk"):
	Delete.
	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
	RS6000_CONSTRAINT_wk.
	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
	(rs6000_init_hard_regno_mode_ok): Adjust.
	* config/rs6000/rs6000.md: Replace "wk" constraint by "ws" with "p8v".
	* doc/md.texi (Machine Constraints): Adjust.

From-SVN: r271485

Also deletes VS_64dm, it's unused.


	* config/rs6000/constraints.md (define_register_constraint "wj"):
	Delete.
	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
	RS6000_CONSTRAINT_wj.
	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
	(rs6000_init_hard_regno_mode_ok): Adjust.
	* config/rs6000/rs6000.md: Replace "wj" constraint by "wi" with "p8v".
	(VS_64dm): Delete.
	* config/rs6000/vsx.md: Ditto.
	* doc/md.texi (Machine Constraints): Adjust.

From-SVN: r271484

This replaces the "wh" constraint by "d", with isa "p8v".


	* config/rs6000/constraints.md (define_register_constraint "wh"):
	Delete.
	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
	RS6000_CONSTRAINT_wh.
	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
	(rs6000_init_hard_regno_mode_ok): Adjust.
	* config/rs6000/rs6000.md: Replace "wh" constraint by "wa" with "p8v".
	* doc/md.texi (Machine Constraints): Adjust.

From-SVN: r271483

	* g++.dg/DRs/dr1940.C: New test.

From-SVN: r271482

	PR target/90547
	* config/i386/i386.md (anddi_1 to andsi_1_zext splitter):
	Avoid calling gen_lowpart with CONST operand.

testsuite/ChangeLog:

	PR target/90547
	* gcc.target/i386/pr90547.c: New test.

From-SVN: r271479

Gimple jump threading does not duplicate forwarder blocks that might
be present before or after the second copied block.  This silently
drops debug binds and markers that might be present in them.  This
patch attempts to preserve them.

For blocks after either copied block, we attempt to append debug stmts
to the copied block, if it does not end with a block-ending stmt.
Failing that, for blocks between both copied blocks, we prepend its
debug stmts to the copy of the second block.

If everything fails, we still drop debug stmts on the floor, though
preexisting code consolidates debug binds in the block that threading
flows into, so only markers are really lost.  We can't do much better
than that without conditional binds and markers, or debug stmts in
edges, or somesuch.

If we append debug stmts to a reusable template block, we copy it
after splitting out the debug stmts, and before putting them back.


for  gcc/ChangeLog

	* tree-ssa-threadupdate.c (struct ssa_local_info_t): Add
	field template_last_to_copy.
	(ssa_create_duplicates): Set it, and use it.  Attempt to
	preserve more debug stmts.

From-SVN: r271477

	* gcc.dg/Wattribute-alias.c: Pass emtpy arg to dg-require-ifunc.

	* gcc.c-torture/execute/20030125-1.c: Pass emtpy arg to dg-require-weak.

	* gcc.dg/torture/ftrapv-2.c: Pass empty arg to dg-require-fork.

	* gcc.target/i386/pr84723-1.c: Remove dg-require-ifunc.
	* gcc.target/i386/pr84723-2.c: Likewise.
	* gcc.target/i386/pr84723-3.c: Likewise.
	* gcc.target/i386/pr84723-4.c: Likewise.
	* gcc.target/i386/pr84723-5.c: Likewise.

From-SVN: r271476

These tests require specific scan-asms in some cases because
of the different codegen for Dawin.  Added some explanations
too.

2019-05-21  Iain Sandoe  <iain@sandoe.co.uk>

	PR testsuite/67958
	* gcc.target/i386/pr32219-1.c: Adjust scan-asms for Darwin, comment
	the differences.
	* gcc.target/i386/pr32219-2.c: Likewise.
	* gcc.target/i386/pr32219-3.c: Likewise.
	* gcc.target/i386/pr32219-4.c: Likewise.
	* gcc.target/i386/pr32219-5.c: Likewise.
	* gcc.target/i386/pr32219-6.c: Likewise.
	* gcc.target/i386/pr32219-7.c: Likewise.
	* gcc.target/i386/pr32219-8.c: Likewise.

From-SVN: r271475

This is a testcase failing because one part of the codegen is
(correctly) generating the scan-asm-not signature.

Fixed by altering the build options.

gcc/testsuite/

2019-05-18  Iain Sandoe  <iain@sandoe.co.uk>

	PR target/63891
	* gcc.dg/darwin-weakimport-3.c: Adjust options and explain
	the reasons.

From-SVN: r271474

	* config/i386/sse.md (VF1_AVX2): New mode iterator.
	(signbit<mode>2): New expander

testsuite/ChangeLog:

	* gcc.target/i386/vect-signbitf.c: New test.

From-SVN: r271473

	PR bootstrap/87338
	* dwarf2out.c (dwarf2out_inline_entry): Use ASM_OUTPUT_DEBUG_LABEL
	instead of ASM_GENERATE_INTERNAL_LABEL and ASM_OUTPUT_LABEL.

From-SVN: r271472

https://gcc.gnu.org/ml/gcc-patches/2019-05/msg01411.html
	* name-lookup.c (do_nonmember_using_decl): Drop INSERT_P
	parameter.  Document.
	(finish_nonmember_using_decl): Adjust do_nonmember_using_decl
	calls.  Remove stray FIXME comment.

From-SVN: r271471

	* config/i386/cpuid.h (__cpuid): For 32bit targets, zero
	%ebx and %ecx bafore calling cpuid with leaf 1 or
	non-constant leaf argument.

From-SVN: r271469

2019-05-21  Janne Blomqvist  <jb@gcc.gnu.org>

	PR libfortran/90038
	* intrinsic.texi (EXECUTE_COMMAND_LINE): Explain new
	wait=.false. implementation.

From-SVN: r271468

https://gcc.gnu.org/ml/gcc-patches/2019-05/msg01396.html
	gcc/cp/
	* name-lookup.h (struct cp_binding_level): Drop usings field.
	(finish_namespace_using_decl, finish_local_using_decl): Replace with ...
	(finish_nonmember_using_decl): ... this.
	* name-lookup.c (push_using_decl_1, push_using_decl):
	(do_nonmember_using_decl): ... here.  Add INSERT_P arg.  Reimplement.
	(validate_nonmember_using_decl, finish_namespace_using_decl)
	(finish_local_using_decl): Replace with ...
	(finish_nonmember_using_decl): ... this.  Drop DECL parm.
	* parser.c (cp_parser_using_declaration): Don't do lookup here.
	* pt.c (tsubst_expr): Do not do using decl lookup here.

	gcc/testsuite/
	* g++.dg/lookup/using53.C: Adjust diagnostic.

	libcc1/
	* libcp1plugin.cc (plugin_add_using_decl): Use
	finish_nonmember_using_decl.

From-SVN: r271467

	PR libstdc++/90252
	* testsuite/lib/libstdc++.exp (check_effective_target_tbb-backend):
	Use "additional_flags" to pass -ltbb to v3_target_compile command.
	Use check_v3_target_prop_cached to cache the result of the test.

From-SVN: r271466

	* doc/xml/manual/shared_ptr.xml: Fix names of lock policy constants.

From-SVN: r271465

I figure a tweak to register_move_cost is better than sprinkling ?s
in instruction operand alternatives.

	PR target/90545
	* config/rs6000/rs6000.c (rs6000_register_move_cost): Increase
	power9 direct move cost.
	* testsuite/gcc.target/powerpc/fold-vec-splats-floatdouble.c:
	Correct comments and rename functions to suit parameters.

From-SVN: r271464

2019-05-21  Richard Biener  <rguenther@suse.de>

	PR middle-end/90510
	* fold-const.c (fold_read_from_vector): New function.
	* fold-const.h (fold_read_from_vector): Declare.
	* match.pd (VEC_PERM_EXPR): Build BIT_INSERT_EXPRs for
	single-element insert permutations.  Canonicalize selector
	further and fix issue with last commit.

	* gcc.target/i386/pr90510.c: New testcase.

From-SVN: r271463

2019-05-21  Martin Liska  <mliska@suse.cz>

	* gcc.target/i386/pr90500-1.c: Add missing '""'.
	* gcc.target/i386/pr90500-2.c: Likewise.

From-SVN: r271462

gcc/ChangeLog:

        * tree-cfg.h (split_critical_edges): Add for_edge_insertion_p
	parameter with default value false to declaration.
        (split_edges_for_insertion): New inline function.  Wrapper for
	split_critical_edges with for_edge_insertion_p = true.
        * tree-cfg.c (split_critical_edges): Don't split non-critical
	edges if for_edge_insertion_p is false.  Fix whitespace.
        * tree-ssa-pre.c (pass_pre::execute): Call
	split_edges_for_insertion instead of split_critical_edges.
        * gcc/tree-ssa-tail-merge.c (tail_merge_optimize): Ditto.
        * gcc/tree-ssa-sink.c (pass_sink_code::execute): Ditto.
	(pass_data_sink_code): Update function name in the comment.

From-SVN: r271461

	* tree-ssa-uninit.c (value_sat_pred_p): This new function is a wrapper
        around is_value_included_in that knows how to handle BIT_AND_EXPR.
        (is_pred_expr_subset_of): Use the new function.  Handle more cases where
        code1 == EQ_EXPR and where code1 == BIT_AND_EXPR and thus fix some false
        positives.

testsuite/
        * gcc.dg/uninit-28-gimple.c: New test.
        * gcc.dg/uninit-29-gimple.c: New test.
        * gcc.dg/uninit-30-gimple.c: New test.
        * gcc.dg/uninit-31-gimple.c: New test.

From-SVN: r271460

Due to the python 3 conversion, files should be opened in text mode,
matching stdin/stdout.

2019-05-21  Janne Blomqvist  <jb@gcc.gnu.org>

	* mklog: Open files in text mode.

From-SVN: r271459