From-SVN: r269142

	PR middle-end/88074
	* simplify.c (norm2_do_sqrt, gfc_simplify_norm2): Use
	mpfr_number_p && !mpfr_zero_p instead of mpfr_regular_p.
	(norm2_add_squared): Likewise.  Use mp_exp_t rather than mpfr_exp_t.

Co-Authored-By: Jakub Jelinek <jakub@redhat.com>

From-SVN: r269139

2019-02-22  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/84676
	* g++.dg/cpp0x/pr84676.C: New.

From-SVN: r269138

builtin-sprintf-10.c: Cast wchar_t to wint_t to avoid a bogus -Wformat warning in ILP32 (bug 77970).

gcc/testsuite/ChangeLog:

	* gcc.dg/tree-ssa/builtin-sprintf-10.c: Cast wchar_t to wint_t
	to avoid a bogus -Wformat warning in ILP32 (bug 77970).

From-SVN: r269137

	* config/abi/post/sparc64-linux-gnu/baseline_symbols.txt: Adjust.
	* config/abi/post/sparc64-linux-gnu/32/baseline_symbols.txt: Likewise.

From-SVN: r269136

2019-02-22  Harald Anlauf  <anlauf@gmx.de>

	PR fortran/83057
	* io.c (gfc_match_open): Fix logic in checks of OPEN statement
	when NEWUNIT= is specified.

	PR fortran/83057
	* gfortran.dg/newunit_6.f90: New test.

From-SVN: r269134

2019-02-22  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/89431
	* gfortran.texi: Fix documentation to match the implementation.

From-SVN: r269132

	* decl.c (build_explicit_specifier): Don't check
	processing_template_decl.  Call instantiation_dependent_expression_p
	instead of value_dependent_expression_p.  Call
	instantiate_non_dependent_expr_sfinae before
	build_converted_constant_expr instead of calling
	instantiate_non_dependent_expr after it.  Add
	processing_template_decl_sentinel.

	* g++.dg/cpp2a/explicit14.C: New test.

From-SVN: r269131

re PR libstdc++/89402 (warning: ‘void _ZNKSt4hashIeEclEe()’ specifies less restrictive attribute than its target)

	PR libstdc++/89402
	* src/c++98/compatibility-ldbl.cc (_ZNKSt4hashIeEclEe): Change return
	type to std::size_t and argument to type to long double.

From-SVN: r269130

gcc/ChangeLog:

	* doc/extend.texi (Other Builtins): Add
	__builtin_is_constant_evaluated.

From-SVN: r269129

2019-02-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/87609
	* tree-cfg.c (gimple_duplicate_bb): Only remap inlined cliques.

From-SVN: r269127

PR tree-optimization/88993 - GCC 9 -Wformat-overflow=2 should reflect real libc limits
PR tree-optimization/88835 - overly aggressive -Werror=format-overflow for printf

gcc/ChangeLog:

	PR tree-optimization/88993
	PR tree-optimization/88853
	* gimple-ssa-sprintf.c (sprintf_dom_walker::call_info::is_file_func):
	New helper.
	(sprintf_dom_walker::call_info::is_string_func): New helper.
	(format_directive): Only issue "may exceed" 4095/INT_MAX warnings
	for formatted string functions.
	(sprintf_dom_walker::handle_gimple_call): Fix a typo in a comment.

gcc/testsuite/ChangeLog:

	PR tree-optimization/88993
	PR tree-optimization/88853
	* gcc.dg/tree-ssa/builtin-fprintf-warn-2.c: New test.
	* gcc.dg/tree-ssa/builtin-printf-warn-2.c: New test.
	* gcc.dg/tree-ssa/builtin-snprintf-warn-3.c: Adjust.
	* gcc.dg/tree-ssa/builtin-sprintf-warn-18.c: Same.

From-SVN: r269125

re PR rtl-optimization/87761 ([MIPS] New FAIL: gcc.target/mips/fix-r4000-10.c   -O1 start with r265398)

	PR rtl-optimization/87761
	* config/mips/mips.md: Add new combiner pattern to recognize
	a bitfield extraction using (ashiftrt (truncate (ashift (...)))).

From-SVN: r269123

In general the stack pointer was not handled for many SUBS/ADDS patterns in
aarch64.md.
Both the "extended register" and "immediate" forms allow the stack pointer to be
used as the source register, while no form allows the stack pointer for the
destination register.

The define_insn patterns generating ADDS/SUBS did not allow the stack pointer
for any operand, while the define_peephole2 patterns that generated RTX to be
matched by these patterns allowed the stack pointer for any operand.

The patterns are fixed by adding the 'k' constraint for the first source operand
to all define_insns that generate the ADDS/SUBS "extended register" and
"immediate" forms (but not the "shifted register" form).

In peephole optimizations, constraint strings are ignored (see "(gccint) C
Constraint Interface" info node in the documentation), so the decision to act or
not is based solely on the predicate and condition.
This patch introduces a new predicate "aarch64_general_reg" to be used in
define_peephole2 patterns where only GENERAL_REGS registers are acceptable and
uses that predicate in the peepholes that generate patterns for ADDS/SUBS.

Full bootstrap and regtest done on aarch64-none-linux-gnu.
Regression tests done on aarch64-none-linux-gnu and aarch64-none-elf cross
compiler.

OK for trunk?


gcc/ChangeLog:

2019-02-22  Matthew Malcomson  <matthew.malcomson@arm.com>

	PR target/89324
	* config/aarch64/aarch64.md: Use aarch64_general_reg predicate on
	destination register in peepholes generating patterns for ADDS/SUBS.
	(add<mode>3_compare0,
	*addsi3_compare0_uxtw, add<mode>3_compareC,
	add<mode>3_compareV_imm, add<mode>3_compareV,
	*adds_<optab><ALLX:mode>_<GPI:mode>,
	*subs_<optab><ALLX:mode>_<GPI:mode>,
	*adds_<optab><ALLX:mode>_shift_<GPI:mode>,
	*subs_<optab><ALLX:mode>_shift_<GPI:mode>,
	*adds_<optab><mode>_multp2, *subs_<optab><mode>_multp2,
	*sub<mode>3_compare0, *subsi3_compare0_uxtw,
	sub<mode>3_compare1): Allow stack pointer for source register.
	* config/aarch64/predicates.md (aarch64_general_reg): New predicate.


gcc/testsuite/ChangeLog:

2019-02-22  Matthew Malcomson  <matthew.malcomson@arm.com>

	PR target/89324
	* gcc.dg/rtl/aarch64/subs_adds_sp.c: New test.
	* gfortran.fortran-torture/compile/pr89324.f90: New test.

From-SVN: r269122

gcc/c/ChangeLog:

	PR c/89425
	* c-parser.c (sizeof_ptr_memacc_comptypes): Avoid warning in
	unreachable subexpressions.

gcc/testsuite/ChangeLog:

	PR c/89425
	* gcc.dg/Wabsolute-value.c: New test.

From-SVN: r269121

gcc/testsuite/ChangeLog:
	* gcc.dg/Wbuiltin-declaration-mismatch-12.c: New test.

From-SVN: r269120

With -mavx, for

$ cat foo.i
extern float f;
extern double d;
extern int i;

void
foo (void)
{
  d = f;
  f = i;
}

we need to generate

	vxorp[ds]	%xmmN, %xmmN, %xmmN
	...
	vcvtss2sd	f(%rip), %xmmN, %xmmX
	...
	vcvtsi2ss	i(%rip), %xmmN, %xmmY

to avoid partial XMM register stall.  This patch adds a pass to generate
a single

	vxorps		%xmmN, %xmmN, %xmmN

at entry of the nearest dominator for basic blocks with SF/DF conversions,
which is in the fake loop that contains the whole function, instead of
generating one

	vxorp[ds]	%xmmN, %xmmN, %xmmN

for each SF/DF conversion.

NB: The LCM algorithm isn't appropriate here since it may place a vxorps
inside the loop.  Simple testcase show this:

$ cat badcase.c

extern float f;
extern double d;

void
foo (int n, int k)
{
  for (int j = 0; j != n; j++)
    if (j < k)
      d = f;
}

It generates

    ...
    loop:
      if(j < k)
        vxorps    %xmm0, %xmm0, %xmm0
        vcvtss2sd f(%rip), %xmm0, %xmm0
      ...
    loopend
    ...

This is because LCM only works when there is a certain benifit.  But for
conditional branch, LCM wouldn't move

   vxorps  %xmm0, %xmm0, %xmm0

out of loop.  SPEC CPU 2017 on Intel Xeon with AVX512 shows:

1. The nearest dominator

|RATE			|Improvement|
|500.perlbench_r	| 0.55%	|
|538.imagick_r		| 8.43%	|
|544.nab_r		| 0.71%	|

2. LCM

|RATE			|Improvement|
|500.perlbench_r	| -0.76% |
|538.imagick_r		| 7.96%  |
|544.nab_r		| -0.13% |

Performance impacts of SPEC CPU 2017 rate on Intel Xeon with AVX512
using

-Ofast -flto -march=skylake-avx512 -funroll-loops

before

commit e739972ad6ad05e32a1dd5c29c0b950a4c4bd576
Author: uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Date:   Thu Jan 31 20:06:42 2019 +0000

            PR target/89071
            * config/i386/i386.md (*extendsfdf2): Split out reg->reg
            alternative to avoid partial SSE register stall for TARGET_AVX.
            (truncdfsf2): Ditto.
            (sse4_1_round<mode>2): Ditto.

    git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@268427 138bc75d-0d04-0410-961f-82ee72b054a4

are:

|INT RATE		|Improvement|
|500.perlbench_r	| 0.55%	|
|502.gcc_r		| 0.14%	|
|505.mcf_r		| 0.08%	|
|523.xalancbmk_r	| 0.18%	|
|525.x264_r		|-0.49%	|
|531.deepsjeng_r	|-0.04%	|
|541.leela_r		|-0.26%	|
|548.exchange2_r	|-0.3%	|
|557.xz_r		|BuildSame|

|FP RATE		|Improvement|
|503.bwaves_r	        |-0.29% |
|507.cactuBSSN_r	| 0.04%	|
|508.namd_r		|-0.74%	|
|510.parest_r		|-0.01%	|
|511.povray_r		| 2.23%	|
|519.lbm_r		| 0.1%	|
|521.wrf_r		| 0.49%	|
|526.blender_r		| 0.13%	|
|527.cam4_r		| 0.65%	|
|538.imagick_r		| 8.43%	|
|544.nab_r		| 0.71%	|
|549.fotonik3d_r	| 0.15%	|
|554.roms_r		| 0.08%	|

After commit e739972ad6ad05e32a1dd5c29c0b950a4c4bd576, on Skylake client,
impacts on 538.imagick_r with

-fno-unsafe-math-optimizations -march=native -Ofast -funroll-loops -flto

1. Size comparision:

before:

   text	   data	    bss	    dec	    hex	filename
2436377	   8352	   4528	2449257	 255f69 imagick_r

after:

   text	   data	    bss	    dec	    hex	filename
2425249	   8352	   4528	2438129	 2533f1 imagick_r

2. Number of vxorps:

before		after		difference
4948            4135            -19.66%

3. Performance improvement:

|RATE			|Improvement|
|538.imagick_r		| 5.5%  |

gcc/

2019-02-22  H.J. Lu  <hongjiu.lu@intel.com>
	    Hongtao Liu  <hongtao.liu@intel.com>
	    Sunil K Pandey  <sunil.k.pandey@intel.com>

	PR target/87007
	* config/i386/i386-passes.def: Add
	pass_remove_partial_avx_dependency.
	* config/i386/i386-protos.h
	(make_pass_remove_partial_avx_dependency): New.
	* config/i386/i386.c (make_pass_remove_partial_avx_dependency):
	New function.
	(pass_data_remove_partial_avx_dependency): New.
	(pass_remove_partial_avx_dependency): Likewise.
	(make_pass_remove_partial_avx_dependency): Likewise.
	* config/i386/i386.md (avx_partial_xmm_update): New attribute.
	(*extendsfdf2): Add avx_partial_xmm_update.
	(truncdfsf2): Likewise.
	(*float<SWI48:mode><MODEF:mode>2): Likewise.
	(SF/DF conversion splitters): Disabled for TARGET_AVX.

gcc/testsuite/

2019-02-22  H.J. Lu  <hongjiu.lu@intel.com>
	    Hongtao Liu  <hongtao.liu@intel.com>
	    Sunil K Pandey  <sunil.k.pandey@intel.com>

	PR target/87007
	* gcc.target/i386/pr87007-1.c: New test.
	* gcc.target/i386/pr87007-2.c: Likewise.

Co-Authored-By: Hongtao Liu <hongtao.liu@intel.com>
Co-Authored-By: Sunil K Pandey <sunil.k.pandey@intel.com>

From-SVN: r269119

	PR middle-end/85598
	* gimple-ssa-sprintf.c (pass_sprintf_length::execute): Enable loop
	analysis for pass.

From-SVN: r269115

This is a repeat of commit r263989, which commit r264052 accidentally
reverted.

2019-02-22  Thiago Macieira  <thiago.macieira@intel.com>

	PR target/89444
	* config/i386/i386.h (PTA_WESTMERE): Remove PTA_AES.
	(PTA_SKYLAKE): Add PTA_AES.
	(PTA_GOLDMONT): Likewise.

From-SVN: r269114

2019-02-22  Richard Biener  <rguenther@suse.de>

	c-family/
	* c-pch.c (no_checksum): Remove.
	(pch_init): Remove assertion that executable_checksum is not
	all zero.
	(c_common_valid_pch): Likewise.

From-SVN: r269113

While doing more testing I found a couple of issues with my BTI patches.
This patch fixes them:
1) Remove a reference to return address key. The original patch was written
based on a different not yet committed patch ([PATCH 3/3][GCC][AARCH64] Add
support for pointer authentication B key) and I missed out on cleaning this
up. This is hidden behind the configuration option and thus went unnoticed.
2) Add a missed case for adding the BTI instruction in thunk functions.

*** gcc/ChangeLog ***

2019-02-22  Sudakshina Das  <sudi.das@arm.com>

	* config/aarch64/aarch64.c (aarch64_output_mi_thunk): Add bti
	instruction if enabled.
	(aarch64_override_options): Remove reference to return address key.

From-SVN: r269112

2019-02-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/89440
	* tree-vect-loop.c (vect_create_epilog_for_reduction): Remove
	not necessary assert.

	* gcc.dg/vect/pr89440.c: New testcase.

From-SVN: r269111

	gcc/testsuite/
	* lib/target-supports.exp (check_effective_target_offload_nvptx):
	Remove.

From-SVN: r269110

[libgomp] In OpenACC testing, by default only build for the offload target that we're actually going to test

... to avoid compilation overhead, and to keep simple '-foffload=[...]'
handling in test cases.

	libgomp/
	* testsuite/libgomp.oacc-c++/c++.exp: Specify
	"-foffload=$offload_target".
	* testsuite/libgomp.oacc-c/c.exp: Likewise.
	* testsuite/libgomp.oacc-fortran/fortran.exp: Likewise.
	* testsuite/lib/libgomp.exp
	(check_effective_target_openacc_nvidia_accel_configured): Remove,
	as (conceptually) merged into
	check_effective_target_openacc_nvidia_accel_selected.  Adjust all
	users.

From-SVN: r269109

... instead of through offload plugins.

	libgomp/
	* plugin/configfrag.ac: Populate and AC_SUBST offload_targets.
	* testsuite/libgomp-test-support.exp.in: Adjust.
	* testsuite/lib/libgomp.exp: Likewise.  Don't populate
	openacc_device_types_s.
	(offload_target_to_openacc_device_type): New proc.
	* testsuite/libgomp.oacc-c++/c++.exp: Adjust.
	* testsuite/libgomp.oacc-c/c.exp: Likewise.
	* testsuite/libgomp.oacc-fortran/fortran.exp: Likewise.
	* Makefile.in: Regenerate.
	* configure: Likewise.
	* testsuite/Makefile.in: Likewise.

From-SVN: r269108

	libgomp/
	* plugin/configfrag.ac: Populate and AC_SUBST offload_plugins
	instead of offload_targets, and AC_DEFINE_UNQUOTED OFFLOAD_PLUGINS
	instead of OFFLOAD_TARGETS.
	* target.c (gomp_target_init): Adjust.
	* testsuite/libgomp-test-support.exp.in: Likewise.
	* testsuite/lib/libgomp.exp: Likewise.  Populate
	openacc_device_types_s instead of offload_targets_s_openacc.
	(check_effective_target_openacc_nvidia_accel_selected)
	(check_effective_target_openacc_host_selected): Adjust.
	* testsuite/libgomp.oacc-c++/c++.exp: Likewise.
	* testsuite/libgomp.oacc-c/c.exp: Likewise.
	* testsuite/libgomp.oacc-fortran/fortran.exp: Likewise.
	* Makefile.in: Regenerate.
	* config.h.in: Likewise.
	* configure: Likewise.
	* testsuite/Makefile.in: Likewise.

From-SVN: r269107

[libgomp] In OpenACC offloading testing, be more explicit in what is supported, and what is not, or why not

	libgomp/
	* testsuite/lib/libgomp.exp: Error out for unknown offload target.
	* testsuite/libgomp.oacc-c++/c++.exp: Likewise.  Report if
	"offloading: supported, but hardware not accessible".
	* testsuite/libgomp.oacc-c/c.exp: Likewise.
	* testsuite/libgomp.oacc-fortran/fortran.exp: Likewise.

From-SVN: r269106

... instead of having an incomplete local implementation.

With these changes in place, we can then also revert the work-around r267213
"[nvptx] Unify C/Fortran routine handling in nvptx_goacc_validate_dims".

	gcc/fortran/
	PR fortran/72741
	* gfortran.h (oacc_routine_lop): New enum.
	(symbol_attribute): Use it.
	* openmp.c (gfc_oacc_routine_dims): Replace with...
	(gfc_oacc_routine_lop): ... this new function.
	(gfc_match_oacc_routine): Adjust.
	* trans-decl.c (add_attributes_to_decl): Likewise.
	gcc/
	PR fortran/72741
	* omp-general.c (oacc_replace_fn_attrib): Mostly split out into...
	(oacc_replace_fn_attrib_attr): ... this new function.
	* omp-general.h (oacc_replace_fn_attrib_attr): New prototype.
	* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Revert workaround.
	gcc/testsuite/
	PR fortran/72741
	* gfortran.dg/goacc/classify-routine.f95: Adjust.

Co-Authored-By: Cesar Philippidis <cesar@codesourcery.com>

From-SVN: r269105

..., which were committed as part of, but logically don't belong into r261813
"Update OpenACC data clause semantics to the 2.5 behavior", and which confuse
later changes.

	gcc/fortran/
	* openmp.c (gfc_match_oacc_declare): Revert earlier changes.
	gcc/testsuite/
	* c-c++-common/goacc/routine-5.c: Revert earlier changes.
	* g++.dg/goacc/template.C: Likewise.

From-SVN: r269104

... which has been present (with HSA offloading configured) ever since this
test case got added.

	gcc/testsuite/
	PR fortran/78027
	* gfortran.dg/goacc/pr78027.f90: Add 'dg-additional-options "-Wno-hsa"'.

From-SVN: r269103

	gcc/c/
	* c-parser.c (c_parser_oacc_shape_clause): Add loc formal
	parameter.  Adjust all users.
	(c_parser_oacc_simple_clause): Replace parser with loc formal
	parameter.  Adjust all users.
	gcc/cp/
	* parser.c (cp_parser_oacc_simple_clause): Remove parser formal
	parameter, move loc formal parameter to the front.  Adjust all
	users.
	(cp_parser_oacc_shape_clause): Add loc formal parameter.  Adjust
	all users.

From-SVN: r269102

This patch adds support for the Neoverse N1 [1]. This CPU was previously supported through the Ares codename.
-mcpu=ares is retained as an alias of the new -mcpu=neoverse-n1.

Bootstrapped and tested on arm-none-linux-gnueabihf. 

	* config/arm/arm-cpus.in (ares): Rename to...
	(neoverse-n1): ... This.  Add ares as alias.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm-tune.md: Likewise.
	* doc/invoke.txt (ARM Options): Document neoverse-n1.

From-SVN: r269101

This patch adds -mcpu and -mtune support for the Neoverse E1 CPU [1].
The new option is -mcpu=neoverse-e1.
Bootstrapped and tested on aarch64-none-linux-gnu. 

	* config/aarch64/aarch64-cores.def (neoverse-e1): Define.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* doc/invoke.texi (AArch64 Options): Document neoverse-e1 -mcpu option.

From-SVN: r269100

This patch adds support for the Neoverse N1 CPU [1]. This was supported in GCC earlier through the codename Ares,
which it now replaces. -mcpu=ares is still accepted as there's been a binutils release supporting it,
but the internal structures are renamed to use Neoverse N1-related identifiers.

Bootstrapped and tested on aarch64-none-linux-gnu.


	* config/aarch64/aarch64.c (ares_tunings): Rename to...
	(neoversen1_tunings): ... This.
	* config/aarch64/aarch64-cores.def (ares): Change tuning to the above.
	(neoverse-n1): New CPU.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* doc/invoke.txt (AArch64 Options): Document neoverse-n1.

From-SVN: r269099

2019-02-22  Richard Biener  <rguenther@suse.de>

	PR middle-end/87609
	* cfghooks.h (dependence_hash): New typedef.
	(struct copy_bb_data): New type.
	(cfg_hooks::duplicate_block): Adjust to take a copy_bb_data argument.
	(duplicate_block): Likewise.
	* cfghooks.c (duplicate_block): Pass down copy_bb_data.
	(copy_bbs): Create and pass down copy_bb_data.
	* cfgrtl.c (cfg_layout_duplicate_bb): Adjust.
	(rtl_duplicate_bb): Likewise.
	* tree-cfg.c (gimple_duplicate_bb): If the copy_bb_data arg is not NULL
	remap dependence info.

	* gcc.dg/torture/restrict-7.c: New testcase.

From-SVN: r269098

2019-02-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/87609
	* tree-core.h (tree_base): Document special clique values.
	* tree-inline.c (remap_dependence_clique): Do not use the
	special clique value of one.
	(maybe_set_dependence_info): Use clique one.
	(clear_dependence_clique): New callback.
	(compute_dependence_clique): Clear clique one from all refs
	before assigning it (again).

From-SVN: r269097

	* configure.host (abi_baseline_pair): Adjust for SPARC64/Linux.
	* config/abi/post/sparc64-linux-gnu: New directory.
	* config/abi/post/sparc64-linux-gnu/baseline_symbols.txt: New file.
	* config/abi/post/sparc64-linux-gnu/32: New directory.
	* config/abi/post/sparc64-linux-gnu/32/baseline_symbols.txt: New file.

From-SVN: r269096

The standard says that in a generic lambda we should speculatively capture
'this' if we see a call to an overload set that contains a non-static member
function, but it seems wrong to reject the program if we can't capture,
since it might not actually be needed.

	* lambda.c (lambda_expr_this_capture): Change add_capture_p to int.
	(maybe_generic_this_capture): Pass -1.

From-SVN: r269095

We mostly use is_normal_capture_proxy to decide whether or not to use
DECL_CAPTURED_VARIABLE; we could just check whether it's set.  VLA capture
is still mostly broken, but this fixes this ICE.

	* lambda.c (is_normal_capture_proxy): Check DECL_CAPTURED_VARIABLE.

From-SVN: r269094

The members of an explicit specialization of a class template don't have the
template parameters of that class template, so we shouldn't try to provide
arguments for them.  Only set outer_args when the class is an instantiation.

	* pt.c (do_class_deduction): Don't include explicit specialization
	args in outer_args.

From-SVN: r269093