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  1. 12 Jun, 2008 8 commits
  3. 11 Jun, 2008 19 commits
  5. 10 Jun, 2008 8 commits
    • dfp.c (WORDS_BIGENDIAN): Define to 0 if not defined. · bc6d4c3f 
      gcc:
	* dfp.c (WORDS_BIGENDIAN): Define to 0 if not defined.
	(encode_decimal64, decode_decimal64, encode_decimal128,
	decode_decimal128): Reverse order of 32-bit parts of value if host
	and target endianness differ.

libdecnumber:
	* dconfig.h: New.
	* decContext.c, decExcept.c, decExcept.h, decLibrary.c,
	decNumber.c, decNumberLocal.h, decRound.c, dpd/decimal128.c,
	dpd/decimal32.c, dpd/decimal64.c: Include dconfig.h not config.h.
	* dpd/decimal128Local.h (decimal128SetSign, decimal128ClearSign,
	decimal128FlipSign): Use WORDS_BIGENDIAN not
	FLOAT_WORDS_BIG_ENDIAN.
	* bid/host-ieee128.c: Include dconfig.h.
	(__host_to_ieee_128, __ieee_to_host_128): Swap 64-bit halves of
	value if WORDS_BIGENDIAN.

libgcc:
	* Makefile.in (DECNUMINC): Remove
	-I$(MULTIBUILDTOP)../../libdecnumber.
	* gstdint.h: New.

From-SVN: r136641
      Joseph Myers committed
    • value_prob.c (tree_divmod_fixed_value_transform): Use gcov_type. · 0178d644 
      2008-06-10  Vinodha Ramasamy  <vinodha@google.com>
        * value_prob.c (tree_divmod_fixed_value_transform): Use gcov_type.
	Avoid division by 0.
	(tree_mod_pow2_value_transform): Likewise.
	(tree_ic_transform): Likewise.
	(tree_stringops_transform): Likewise.
	(tree_mod_subtract_transform): Likewise.
	* tree-inline-c (copy_bb): Corrected int type to gcov_type.
	(copy_edges_for_bb): Likewise.
	(initialize_cfun): Likewise.

From-SVN: r136639
      Vinodha Ramasamy committed
    • i386.md (*btdi_rex64): Change operand 1 predicate to nonmemory_operand. · 88b9490b 
      	* config/i386/i386.md (*btdi_rex64): Change operand 1 predicate to
	nonmemory_operand. Add "N" operand constraint.
	(*btsi): Ditto.
	(*jcc_btdi_mask_rex64): New instruction and split pattern.
	(*jcc_btsi_mask): Ditto.
	(*jcc_btsi_mask_1): Ditto.

testsuite/ChangeLog:

	* gcc.target/i386/bt-mask-1.c: New test.
	* gcc.target/i386/bt-mask-2.c: Ditto.

From-SVN: r136636
      Uros Bizjak committed
    • rs6000.c (build_opaque_vector_type): Set TYPE_CANONICAL for copied element type. · 0627bfb4 
      	* config/rs6000/rs6000.c (build_opaque_vector_type): Set
	TYPE_CANONICAL for copied element type.

From-SVN: r136632
      Joseph Myers committed
    • utils.c (create_subprog_decl): If this is for the 'main' entry point according to the asm name... · 12ae9b26 
      
        * utils.c (create_subprog_decl): If this is for the 'main' entry
        point according to the asm name, redirect main_identifier_node.

From-SVN: r136619
      Olivier Hainque committed
    • Object.m (compare): Add type id. · c24aadf3 
      2008-06-10  Kai Tietz  <kai.tietz@onevision.com>

	* Object.m (compare): Add type id.
	* objc/Object.h: Likewise.
	* archive.c (objc_read_class): Use size_t to extend version to be
	size of pointer scalar width.
	* sendmsg.c (rtx): Undefine it before redefinition.
	(__objc_print_dtable_stats): Cast arguments to long as intended.

From-SVN: r136617
      Kai Tietz committed
    • re PR target/36473 (Generate bit test (bt) instructions) · 33ee5810 
      	PR target/36473
	* config/i386/i386.c (ix86_tune_features) [TUNE_USE_BT]:
	Add m_CORE2 and m_GENERIC.
	* config/i386/predicates.md (bt_comparison_operator): New predicate.
	* config/i386/i386.md (*btdi_rex64): New instruction pattern.
	(*btsi): Ditto.
	(*jcc_btdi_rex64): New instruction and split pattern.
	(*jcc_btsi): Ditto.
	(*jcc_btsi_1): Ditto.
	(*btsq): Fix Intel asm dialect operand order.
	(*btrq): Ditto.
	(*btcq): Ditto.

testsuite/ChangeLog:

	PR target/36473
	* testsuite/gcc.target/i386/bt-1.c: New test.
	* testsuite/gcc.target/i386/bt-2.c: Ditto.

From-SVN: r136615
      Uros Bizjak committed
    • Daily bump. · f1ebbb57 
      From-SVN: r136609
      GCC Administrator committed
  7. 09 Jun, 2008 5 commits
    • * gcc.c-torture/execute/builtins/lib/chk.c: Only include sys/types.h for unix to check for uClibc. · ce80a05b 
      From-SVN: r136605
      Andy Hutchinson committed
    • re PR testsuite/36285 (gcc.dg/compat/struct-by-value-xxx improper test for AVR target) · ab748139 
      PR testsuite/36285
* gcc.dg/compat/struct-return-10_y.c: Remove test_va.
* gcc.dg/compat/vector-defs.h: Add check for availability of 8 byte double.
* gcc.dg/compat/struct-layout-1_test.h: Change bitfield to match integer size.

From-SVN: r136604
      Andy Hutchinson committed
    • re PR middle-end/36447 (simplify_subreg ICE with right shift more than length type AVR) · 3115c00d 
      PR middle-end/36447
* simplify-rtx.c (simplify_subreg): Add check for shift count greater than size.

From-SVN: r136602
      Andy Hutchinson committed
    • pr34856.c: Condition use of -maltivec on powerpc_altivec_ok. · 5cb0cd01 
      	* gcc.dg/pr34856.c: Condition use of -maltivec on
	powerpc_altivec_ok.  Use -w on other powerpc*-*-linux*.

From-SVN: r136601
      Joseph Myers committed
    • md.texi: Synchronize with later constraints.md change. · 21dfc6dc 
      gcc/
	* doc/md.texi: Synchronize with later constraints.md change.
	* longlong.h (umul_ppmm): Replace the MIPS asm implementation
	with a C implementation.
	* config/mips/mips.c (mips_legitimize_move): Remove MFHI and
	MFLO handling.
	(mips_subword): Assume TImode for CONST_INTs if TARGET_64BIT.
	(mips_split_doubleword_move): Use special MTHI and MFHI instructions
	when moving to and from MD_REGNUM.
	(mips_output_move): Don't handle moves from GPRs to HI_REGNUM.
	Handle moves from LO_REGNUM to GPRs using MFLO, MACC or DMACC.
	Handle byte and halfword moves.
	(mips_hard_regno_mode_ok_p): Handle MD_REGS and DSP_ACC_REGS
	separately.
	* config/mips/constraints.md (h): Turn into NO_REGS.
	(l, x): Update documentation.
	* config/mips/mips.md (UNSPEC_MFHILO): Delete.
	(UNSPEC_MFHI, UNSPEC_MTHI, UNSPEC_SET_HILO): New.
	(UNSPEC_TLS_LDM, UNSPEC_TLS_GET_TP): Renumber.
	(HILO): New mode iterator.
	(MOVE128): Add TI.
	(any_div): New code iterator.
	(u): Extend code attribute to div and udiv.
	(*add<mode>3_mips16, *movdi_64bit_mips16, *movsi_mips16): Use
	d_operand in the splitters.  Remove redundant CONST_INT checks.
	(mulsi3_mult3, mul<mode>3_internal, mul<mode>3_r4000, *mul_acc_si)
	(*macc, *msac, *msac_using_macc, *macc2, *msac2, *mul_sub_si)
	(*muls): Remove "=h" clobbers.  Adjust peephole2s and define_splits
	accordingly, using normal moves instead of unspecs to move LO into
	a GPR.  Use d_operand and lo_operand instead of *_REG_P checks.
	(<u>mulsidi3): Handle expansion in C code.
	(<u>mulsidi3_32bit_internal): Rename to...
	(<u>mulsidi3_32bit): ...this.
	(<u>mulsidi3_32bit_r4000): Fix insn separator.
	(*<u>mulsidi3_64bit): Rename to...
	(<u>mulsidi3_64bit): ...this.  Combine DImode "=h" and "=l" clobbers
	into a TImode "=x" clobber.  In the split, use an UNSPEC_SET_HILO
	to set LO and HI to the multiplication result.  Use a normal move
	for MFLO and an unspec for MFHI.
	(*<u>mulsidi3_64bit_parts): Replace with...
	(<u>mulsidi3_64bit_hilo): ...this new instruction.
	(<su>mulsi3_highpart): Extend to TARGET_FIX_R4000.
	(<su>mulsi3_highpart_internal): Turn into a define_insn_and_split
	and extend it to TARGET_FIX_R4000.  Store the destination in a GPR
	instead of HI.  Split the instruction into a separate multiplication
	and MFHI if !TARGET_FIX_R4000.
	(<su>muldi3_highpart): Likewise.
	(<su>mulsi3_highpart_mulhi_internal): Remove the first alternative
	and the "=h" clobber.
	(*<su>mulsi3_highpart_neg_mulhi_internal): Likewise.
	(<u>mulditi3): New expander.
	(<u>mulditi3_internal, <u>mulditi3_r4000): New patterns.
	(madsi): Remove "=h" clobber.
	(divmod<mode>4, udivmod<mode>4): Turn into define_insn_and_splits.
	Force the modulus result to be a GPR and split the instruction into
	a division followed by an MFHI after reload.
	(<u>divmod<GPR:mode>4_hilo_<HILO:mode>): New instruction.
	(*lea_high64): Use d_operand in the define_peephole2.  Likewise
	the MIPS16 HIGH define_split.
	(*movdi_32bit, *movdi_gp32_fp64, *movdi_32bit_mips16): Change type
	of acc<->gpr moves to "multi".
	(*movdi_64bit): Replace the single "x" alternative with
	alternatives for moving into and out of "a".
	(*movhi_internal, *movqi_internal): Likewise.  Use mips_output_move.
	(*movsi_internal): Extend the "d<-A" alternative to "d<-a".
	(*movdi_64bit_mips16, *movsi_mips16): Add d<-a alternatives.
	Use d_operand in the splitters.  Remove redundant CONST_INT checks.
	(*movhi_mips16, *movqi_mips16): Likewise.  Use mips_output_move.
	(movti): New expander.
	(*movti, *movti_mips16): New insns.
	(mfhilo_<mode>, *mfhilo_<mode>, *mfhilo_<mode>_macc): Delete.
	(mfhi<GPR:mode>_<HILO:mode>): New pattern.
	(mthi<GPR:mode>_<HILO:mode>): Likewise.
	* config/mips/predicates.md (fpr_operand): Delete.
	(d_operand): New predicate.

gcc/testsuite/
	* gcc.dg/torture/mips-hilo-1.c: Delete.
	* gcc.target/mips/pr35232.c: Likewise.
	* gcc.target/mips/fix-vr4130-1.c: Use modulus to create an mfhi.
	* gcc.target/mips/fix-vr4130-3.c: Likewise.
	* gcc.target/mips/int-moves-1.c: New test.
	* gcc.target/mips/int-moves-2.c: Likewise.
	* gcc.target/mips/fix-r4000-1.c: Likewise.
	* gcc.target/mips/fix-r4000-2.c: Likewise.
	* gcc.target/mips/fix-r4000-3.c: Likewise.
	* gcc.target/mips/fix-r4000-4.c: Likewise.
	* gcc.target/mips/fix-r4000-5.c: Likewise.
	* gcc.target/mips/fix-r4000-6.c: Likewise.
	* gcc.target/mips/fix-r4000-7.c: Likewise.
	* gcc.target/mips/fix-r4000-8.c: Likewise.
	* gcc.target/mips/fix-r4000-9.c: Likewise.
	* gcc.target/mips/fix-r4000-10.c: Likewise.
	* gcc.target/mips/fix-r4000-11.c: Likewise.
	* gcc.target/mips/fix-r4000-12.c: Likewise.
	* gcc.target/mips/timode-1.c: Likewise.
	* gcc.target/mips/timode-2.c: Likewise.

From-SVN: r136600
      Richard Sandiford committed