This patch extends the legality of the GNAT attribute Scalar_Storage_Order,
to apply to formal private types. Previously this extension applied only
in GNAT_Mode, to support instantiations of Ada.Sequential_IO, but it is more
generally useful.

The following must compile quietly:

----
with Memory_View_Generic;
procedure Main is
   type T is array (1..10) of integer;
   package OK is new Memory_View_Generic (T);

   type T2 is new Long_Float;
   package Wrong is new Memory_View_Generic (T2);
begin
   null;
end;
----
with System;
generic
   type Source_Type is private;
package Memory_View_Generic is
   -- various declarations ...
   SSO : System.Bit_Order := Source_Type'Scalar_Storage_Order;
end Memory_View_Generic;

2018-05-21  Ed Schonberg  <schonberg@adacore.com>

gcc/ada/

	* sem_attr.adb (Analyze_Attribute, case Scalar_Storage_Order): The
	attribute reference is legal within a generic unit when the prefix is a
	formal private type.

From-SVN: r260444

This patch modifies the creation of transient scopes to eliminate potential
premature secondary stack reclamations when there is no suitable transient
context and the scope was intended to manage the secondary stack. Instead,
the logic was changed to accommodate a special case where an assignment with
suppressed controlled actions that appears within a type initialization
procedure requires secondary stack reclamation.

The patch also corrects the handling of function calls which utilize the
secondary stack in loop parameter specifications. Previously the predicate
which determined whether the function will utilize the secondary stack was
not accurate enough, and in certain cases could lead to leaks.

------------
-- Source --
------------

--  iterators.ads

package Iterators is
   type Iterator is limited interface;
   type Iterator_Access is access all Iterator'Class;

   function Next
     (I       : in out Iterator;
      Element : out Character) return Boolean is abstract;

   procedure Iterate
     (I    : in out Iterator'Class;
      Proc : access procedure (Element : Character));
end Iterators;

--  iterators.adb

package body Iterators is
   procedure Iterate
     (I    : in out Iterator'Class;
      Proc : access procedure (Element : Character))
   is
      Element : Character;
   begin
      while I.Next (Element) loop
         Proc (Element);
      end loop;
   end Iterate;
end Iterators;

--  base.ads

with Iterators; use Iterators;

package Base is
   type String_Access is access all String;
   type Node is tagged record
      S : String_Access;
   end record;

   type Node_Access is access all Node'Class;
   type Node_Array is array (Positive range <>) of Node_Access;

   function As_Array (N : Node_Access) return Node_Array;
   function Get_String (C : Character) return String;

   type Node_Iterator is limited new Iterator with record
      Node : Node_Access;
      I    : Positive;
   end record;

   overriding function Next
     (It      : in out Node_Iterator;
      Element : out Character) return Boolean;

   function Constructor_1 (N : Node_Access) return Node_Iterator;
   function Constructor_2 (N : Node_Access) return Node_Iterator;
end Base;

--  base.adb

package body Base is
   function As_Array (N : Node_Access) return Node_Array is
   begin
      return (1 => N);
   end As_Array;

   function Get_String (C : Character) return String is
   begin
      return (1 .. 40 => C);
   end Get_String;

   function Next
     (It      : in out Node_Iterator;
      Element : out Character) return Boolean
   is
   begin
      if It.I > It.Node.S'Last then
         return False;
      else
         It.I := It.I + 1;
         Element := It.Node.S (It.I - 1);
         return True;
      end if;
   end Next;

   function Constructor_1 (N : Node_Access) return Node_Iterator is
   begin
      return Node_Iterator'(N, 1);
   end Constructor_1;

   function Constructor_2 (N : Node_Access) return Node_Iterator is
   begin
      return Constructor_1 (As_Array (N) (1));
   end Constructor_2;
end Base;

--  main.adb

with Ada.Text_IO; use Ada.Text_IO;
with Base;        use Base;
with Iterators;   use Iterators;

procedure Main is
   N : constant Node_Access := new Node'(S => new String'("hello world"));

   procedure Process (C : Character) is
   begin
      Put_Line (Get_String (C));
   end Process;

   C : Iterator'Class := Constructor_2 (N);

begin
   C.Iterate (Process'Access);
end Main;

----------------------------
-- Compilation and output --
----------------------------

$ gnatmake -q main.adb
$ ./main
hhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh
eeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeee
llllllllllllllllllllllllllllllllllllllll
llllllllllllllllllllllllllllllllllllllll
oooooooooooooooooooooooooooooooooooooooo

wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
oooooooooooooooooooooooooooooooooooooooo
rrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrr
llllllllllllllllllllllllllllllllllllllll
dddddddddddddddddddddddddddddddddddddddd

2018-05-21  Hristian Kirtchev  <kirtchev@adacore.com>

gcc/ada/

	* exp_ch7.adb (Establish_Transient_Scope): Code cleanup. Do not
	delegate the secondary stack management when there is no suitable
	transient context, and the transient scope was intended to manage the
	secondary stack because this causes premature reclamation. Change the
	transient scope creation logic by special casing assignment statements
	of controlled components for type initialization procedures.
	(Find_Node_To_Be_Wrapped): Renamed to Find_Transient_Context. Update
	the comment on usage.
	(Find_Transient_Context): Change the initinte loop into a while loop.
	Iterations schemes and iterator specifications are not valid transient
	contexts because they rely on special processing. Assignment statements
	are now treated as a normal transient context, special cases are
	handled by the caller. Add special processing for pragma Check.
	(Is_OK_Construct): Removed. Its functionality has been merged in
	routine Find_Transient_Context.
	* sem_ch5.adb (Check_Call): Reimplemented. Add code to properly
	retrieve the subprogram being invoked. Use a more accurate predicate
	(Requires_Transient_Scope) to determine that the function will emply
	the secondary stack.

From-SVN: r260443

These are GNAT style violations detected with a trivial Libadalang checker.

2018-05-21  Piotr Trojanek  <trojanek@adacore.com>

gcc/ada/

	* ada_get_targ.adb: Fix subprogram body headers.
	* adabkend.adb: Likewise.
	* checks.adb: Likewise.
	* exp_ch3.adb: Likewise.
	* exp_ch5.adb: Likewise.
	* exp_ch9.adb: Likewise.
	* exp_dist.adb: Likewise.
	* exp_tss.adb: Likewise.
	* inline.adb: Likewise.
	* lib-writ.adb: Likewise.
	* lib-xref-spark_specific.adb: Likewise.
	* libgnarl/s-osinte__darwin.adb: Likewise.
	* libgnarl/s-stusta.adb: Likewise.
	* libgnarl/s-taprop__solaris.adb: Likewise.
	* libgnarl/s-tposen.adb: Likewise.
	* libgnarl/s-vxwext__kernel-smp.adb: Likewise.
	* libgnarl/s-vxwext__kernel.adb: Likewise.
	* libgnat/a-btgbso.adb: Likewise.
	* libgnat/a-cfdlli.adb: Likewise.
	* libgnat/a-cfhama.adb: Likewise.
	* libgnat/a-cfinve.adb: Likewise.
	* libgnat/a-cimutr.adb: Likewise.
	* libgnat/a-coboho.adb: Likewise.
	* libgnat/a-cofove.adb: Likewise.
	* libgnat/a-cofuve.adb: Likewise.
	* libgnat/a-comutr.adb: Likewise.
	* libgnat/a-exexda.adb: Likewise.
	* libgnat/a-tags.adb: Likewise.
	* libgnat/a-tideau.adb: Likewise.
	* libgnat/a-wtdeau.adb: Likewise.
	* libgnat/a-ztdeau.adb: Likewise.
	* libgnat/g-alleve.adb: Likewise.
	* libgnat/s-excdeb.adb: Likewise.
	* libgnat/s-parint.adb: Likewise.
	* libgnat/s-shasto.adb: Likewise.
	* libgnat/s-traceb__hpux.adb: Likewise.
	* prepcomp.adb: Likewise.
	* sem_ch4.adb: Likewise.
	* sem_ch6.adb: Likewise.
	* sem_dist.adb: Likewise.
	* sem_prag.adb: Likewise.
	* sem_util.adb: Likewise.
	* sinfo.adb: Likewise.
	* switch.adb: Likewise.

From-SVN: r260442

	* src/filesystem/std-ops.cc (absolute): Report an error for empty
	paths.
	(weakly_canonical(const path&)): Do not call canonical on empty path.
	(weakly_canonical(const path&, error_code&)): Likewise.
	* testsuite/27_io/filesystem/operations/absolute.cc: Check for errors.

From-SVN: r260441

	PR libstdc++/85818
	* testsuite/experimental/filesystem/path/preferred_separator.cc: Add
	dg-require-filesystem-ts.

From-SVN: r260439

From-SVN: r260438

This patch implements the usadv16qi and ssadv16qi standard names.
See the thread at on gcc@gcc.gnu.org [1] for background.

The V16QImode variant is important to get right as it is the most commonly used pattern:
reducing vectors of bytes into an int.
The midend expects the optab to compute the absolute differences of operands 1 and 2 and
reduce them while widening along the way up to SImode. So the inputs are V16QImode and
the output is V4SImode.

I've tried out a few different strategies for that, the one I settled with is to emit:
UABDL2    tmp.8h, op1.16b, op2.16b
UABAL    tmp.8h, op1.16b, op2.16b
UADALP    op3.4s, tmp.8h

To work through the semantics let's say operands 1 and 2 are:
op1 { a0, a1, a2, a3, a4, a5, a6, a7, a8, a9, a10, a11, a12, a13, a14, a15 }
op2 { b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, b12, b13, b14, b15 }
op3 { c0, c1, c2, c3 }

The UABDL2 takes the upper V8QI elements, computes their absolute differences, widens them and stores them into the V8HImode tmp:

tmp { ABS(a[8]-b[8]), ABS(a[9]-b[9]), ABS(a[10]-b[10]), ABS(a[11]-b[11]), ABS(a[12]-b[12]), ABS(a[13]-b[13]), ABS(a[14]-b[14]), ABS(a[15]-b[15]) }

The UABAL after that takes the lower V8QI elements, computes their absolute differences, widens them and accumulates them into the V8HImode tmp from the previous step:

tmp { ABS(a[8]-b[8])+ABS (a[0]-b[0]), ABS(a[9]-b[9])+ABS(a[1]-b[1]), ABS(a[10]-b[10])+ABS(a[2]-b[2]), ABS(a[11]-b[11])+ABS(a[3]-b[3]), ABS(a[12]-b[12])+ABS(a[4]-b[4]), ABS(a[13]-b[13])+ABS(a[5]-b[5]), ABS(a[14]-b[14])+ABS(a[6]-b[6]), ABS(a[15]-b[15])+ABS(a[7]-b[7]) }

Finally the UADALP does a pairwise widening reduction and accumulation into the V4SImode op3:
op3 { c0+ABS(a[8]-b[8])+ABS(a[0]-b[0])+ABS(a[9]-b[9])+ABS(a[1]-b[1]), c1+ABS(a[10]-b[10])+ABS(a[2]-b[2])+ABS(a[11]-b[11])+ABS(a[3]-b[3]), c2+ABS(a[12]-b[12])+ABS(a[4]-b[4])+ABS(a[13]-b[13])+ABS(a[5]-b[5]), c3+ABS(a[14]-b[14])+ABS(a[6]-b[6])+ABS(a[15]-b[15])+ABS(a[7]-b[7]) }

(sorry for the text dump)

Remember, according to [1] the exact reduction sequence doesn't matter (for integer arithmetic at least).
I've considered other sequences as well (thanks Wilco), for example
* UABD + UADDLP + UADALP
* UABLD2 + UABDL + UADALP + UADALP

I ended up settling in the sequence in this patch as it's short (3 instructions) and in the future we can potentially
look to optimise multiple occurrences of these into something even faster (for example accumulating into H registers for longer
before doing a single UADALP in the end to accumulate into the final S register).

If your microarchitecture has some some strong preferences for a particular sequence, please let me know or, even better, propose a patch
to parametrise the generation sequence by code (or the appropriate RTX cost).


This expansion allows the vectoriser to avoid unpacking the bytes in two steps and performing V4SI arithmetic on them.
So, for the code:

unsigned char pix1[N], pix2[N];

int foo (void)
{
  int i_sum = 0;
  int i;

  for (i = 0; i < 16; i++)
    i_sum += __builtin_abs (pix1[i] - pix2[i]);

  return i_sum;
}

we now generate on aarch64:
foo:
        adrp    x1, pix1
        add     x1, x1, :lo12:pix1
        movi    v0.4s, 0
        adrp    x0, pix2
        add     x0, x0, :lo12:pix2
        ldr     q2, [x1]
        ldr     q3, [x0]
        uabdl2  v1.8h, v2.16b, v3.16b
        uabal   v1.8h, v2.8b, v3.8b
        uadalp  v0.4s, v1.8h
        addv    s0, v0.4s
        umov    w0, v0.s[0]
        ret


instead of:
foo:
        adrp    x1, pix1
        adrp    x0, pix2
        add     x1, x1, :lo12:pix1
        add     x0, x0, :lo12:pix2
        ldr     q0, [x1]
        ldr     q4, [x0]
        ushll   v1.8h, v0.8b, 0
        ushll2  v0.8h, v0.16b, 0
        ushll   v2.8h, v4.8b, 0
        ushll2  v4.8h, v4.16b, 0
        usubl   v3.4s, v1.4h, v2.4h
        usubl2  v1.4s, v1.8h, v2.8h
        usubl   v2.4s, v0.4h, v4.4h
        usubl2  v0.4s, v0.8h, v4.8h
        abs     v3.4s, v3.4s
        abs     v1.4s, v1.4s
        abs     v2.4s, v2.4s
        abs     v0.4s, v0.4s
        add     v1.4s, v3.4s, v1.4s
        add     v1.4s, v2.4s, v1.4s
        add     v0.4s, v0.4s, v1.4s
        addv    s0, v0.4s
        umov    w0, v0.s[0]
        ret

So I expect this new expansion to be better than the status quo in any case.
Bootstrapped and tested on aarch64-none-linux-gnu.
This gives about 8% on 525.x264_r from SPEC2017 on a Cortex-A72.

	* config/aarch64/aarch64.md ("unspec"): Define UNSPEC_SABAL,
	UNSPEC_SABDL2, UNSPEC_SADALP, UNSPEC_UABAL, UNSPEC_UABDL2,
	UNSPEC_UADALP values.
	* config/aarch64/iterators.md (ABAL): New int iterator.
	(ABDL2): Likewise.
	(ADALP): Likewise.
	(sur): Add mappings for the above.
	* config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>_3):
	New define_insn.
	(aarch64_<sur>abal<mode>_4): Likewise.
	(aarch64_<sur>adalp<mode>_3): Likewise.
	(<sur>sadv16qi): New define_expand.

	* gcc.c-torture/execute/ssad-run.c: New test.
	* gcc.c-torture/execute/usad-run.c: Likewise.
	* gcc.target/aarch64/ssadv16qi.c: Likewise.
	* gcc.target/aarch64/usadv16qi.c: Likewise.

From-SVN: r260437

2018-05-21  Alexander Nesterovskiy  <alexander.nesterovskiy@intel.com>

gcc/
        * config/i386/i386.md (*movsf_internal): AVX falsedep fix.
        (*movdf_internal): Ditto.
        (*rcpsf2_sse): Ditto.
        (*rsqrtsf2_sse): Ditto.
        (*sqrt<mode>2_sse): Ditto.

From-SVN: r260436

This patch adds the missing neon intrinsics for all 128 bit vector Integer modes for the
three-way XOR and negate and xor instructions for Arm8.2-a to Armv8.4-a.

gcc/
2018-05-21  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_eor3qv8hi): Change to
	eor3q<mode>4.
	(aarch64_bcaxqv8hi): Change to bcaxq<mode>4.
	* config/aarch64/aarch64-simd-builtins.def (veor3q_u8, veor3q_u32,
	veor3q_u64, veor3q_s8, veor3q_s16, veor3q_s32, veor3q_s64, vbcaxq_u8,
	vbcaxq_u32, vbcaxq_u64, vbcaxq_s8, vbcaxq_s16, vbcaxq_s32,
	vbcaxq_s64): New.
	* config/aarch64/arm_neon.h: Likewise.
	* config/aarch64/iterators.md (VQ_I): New.

gcc/testsuite/
2018-05-21  Tamar Christina  <tamar.christina@arm.com>

	* gcc.target/gcc.target/aarch64/sha3.h (veor3q_u8, veor3q_u32,
	veor3q_u64, veor3q_s8, veor3q_s16, veor3q_s32, veor3q_s64, vbcaxq_u8,
	vbcaxq_u32, vbcaxq_u64, vbcaxq_s8, vbcaxq_s16, vbcaxq_s32,
	vbcaxq_s64): New.
	* gcc.target/gcc.target/aarch64/sha3_1.c: Likewise.
	* gcc.target/gcc.target/aarch64/sha3_1.c: Likewise.
	* gcc.target/gcc.target/aarch64/sha3_1.c: Likewise.

From-SVN: r260435

We used to build baremetal (AKA Elf32) multilibbed toolchains for years
now but never made that for Linux targets since there were problems with
uClibc n multilib setup. Now with help of Crosstool-NG it is finally
possible to create uClibc-based multilibbed toolchains and so we add
relevant CPUs for multilib in case of configuration for "arc*-*-linux*".

This will be essentially useful for glibc-based multilibbbed toolchains
in the future.

gcc/
2018-05-16  Alexey Brodkin <abrodkin@synopsys.com>

        * config.gcc: Add arc/t-multilib-linux to tmake_file for
        arc*-*-linux*.
        * config/arc/t-multilib-linux: Specify MULTILIB_OPTIONS and
        MULTILIB_DIRNAMES

From-SVN: r260434

2018-05-21  Janus Weil  <janus@gcc.gnu.org>

	PR fortran/85841
	* libgfortran.h: New macros GFC_STD_OPT_*.
	* error.c (notify_std_msg): New function.
	(gfc_notify_std): Adjust such that it can handle combinations of
	GFC_STD_* flags in the 'std' argument, not just a single one.
	* match.c (match_arithmetic_if, gfc_match_if): Reject arithmetic if
	in Fortran 2018.
	(gfc_match_stopcode): Use GFC_STD_OPT_* macros.
	* options.c (set_default_std_flags): Warn for F2018 deleted features
	by default.
	(gfc_handle_option): F2018 deleted features are allowed in earlier
	standards.
	* symbol.c (gfc_define_st_label, gfc_reference_st_label): Reject
	nonblock do constructs in Fortran 2018.


2018-05-21  Janus Weil  <janus@gcc.gnu.org>

	PR fortran/85841
	* gfortran.dg/g77/19990826-3.f: Add option "-std=legacy".
	* gfortran.dg/g77/20020307-1.f: Ditto.
	* gfortran.dg/g77/980310-3.f: Ditto.
	* gfortran.dg/goacc/loop-1-2.f95: Ditto.
	* gfortran.dg/goacc/loop-1.f95: Ditto.
	* gfortran.dg/gomp/appendix-a/a.6.1.f90: Ditto.
	* gfortran.dg/gomp/appendix-a/a.6.2.f90: Ditto.
	* gfortran.dg/gomp/do-1.f90: Ditto.
	* gfortran.dg/gomp/omp_do1.f90: Ditto.
	* gfortran.dg/pr17229.f: Ditto.
	* gfortran.dg/pr37243.f: Ditto.
	* gfortran.dg/pr49721-1.f: Ditto.
	* gfortran.dg/pr58484.f: Ditto.
	* gfortran.dg/pr81175.f: Ditto.
	* gfortran.dg/pr81723.f: Ditto.
	* gfortran.dg/predcom-2.f: Ditto.
	* gfortran.dg/vect/Ofast-pr50414.f90: Ditto.
	* gfortran.dg/vect/cost-model-pr34445a.f: Ditto.
	* gfortran.dg/vect/fast-math-mgrid-resid.f: Ditto.
	* gfortran.dg/vect/pr52580.f: Ditto.

From-SVN: r260433

	* class.c (type_has_user_nondefault_constructor): Check for a
	user-provided ctor, not user-declared.

From-SVN: r260432

From-SVN: r260431

	PR libstdc++/85843
	* src/c++11/cow-stdexcept.cc (logic_error, runtime_error): Explicitly
	initialize base class to avoid warnings.

From-SVN: r260427

gcc/
	* config/nds32/constraints.md (S): New constraint.
	* config/nds32/nds32.md (call_internal): Use constraint S.
	(call_value_internal): Likewise.
	(sibcall_internal): Likewise.
	(sibcall_value_internal): Likewise.

From-SVN: r260422

re PR fortran/82275 (gfortran rejects valid & accepts invalid reference to dimension-remapped type SELECT TYPE selector)

2018-05-20  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/82275
	Correcting ChangeLogs
	* match.c (gfc_match_type_spec): Go through the array ref and
	decrement 'rank' for every dimension that is an element.

2018-05-20  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/82275
	Correcting ChangeLogs
	* gfortran.dg/select_type_42.f90: New test.

From-SVN: r260416

2018-05-19  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/80657
	* resolve.c (flag_fn_result_spec): Use the 'sym' argument to
	test for self refs to the function result in the character len
	expression. If a self reference is found, emit an error and
	return true.
	(resolve_fntype): Use the function symbol in the calls to the
	above.

2018-05-19  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/80657
	* gfortran.dg/char_result_18.f90: New test.

From-SVN: r260415

2018-05-20  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/49636
	* trans-array.c (gfc_get_array_span): Renamed from
	'get_array_span'.
	(gfc_conv_expr_descriptor): Change references to above.
	* trans-array.h : Add prototype for 'gfc_get_array_span'.
	* trans-stmt.c (trans_associate_var): If the associate name is
	a subref array pointer, use gfc_get_array_span for the span.

2018-05-20  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/49636
	* gfortran.dg/associate_38.f90: New test.

From-SVN: r260414

2018-05-19  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/82923
	PR fortran/66694
	PR fortran/82617
	* trans-array.c (gfc_alloc_allocatable_for_assignment): Set the
	charlen backend_decl of the rhs expr to ss->info->string_length
	so that the value in the current scope is used.

2018-05-19  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/82923
	* gfortran.dg/allocate_assumed_charlen_4.f90: New test. Note
	that the patch fixes PR66694 & PR82617, although the testcases
	are not explicitly included.

From-SVN: r260413

gcc/
	* config/nds32/nds32.c (nds32_register_move_cost): Take garywolf cpu
	into consideration.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>

From-SVN: r260412

gcc/
	* config/nds32/nds32-cost.c (rtx_cost_model_t): New structure.
	(insn_size_16bit, insn_size_32bit): New variables for cost evaluation.
	(nds32_rtx_costs_impl): Simplify.
	(nds32_address_cost_impl): Simplify.
	(nds32_init_rtx_costs): New function.
	(nds32_rtx_costs_speed_prefer): Likewise.
	(nds32_rtx_costs_size_prefer): Likewise.
	(nds32_address_cost_speed_prefer): Likewise.
	(nds32_address_cost_speed_fwprop): Likewise.
	(nds32_address_cost_size_prefer): Likewise.
	* config/nds32/nds32-protos.h (nds32_init_rtx_costs): Declare.
	* config/nds32/nds32.c (nds32_option_override): Use
	nds32_init_rtx_costs function.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>

From-SVN: r260411

From-SVN: r260410

gcc/
	* config/nds32/nds32.c (nds32_asm_file_start): Output pipeline model.
	* config/nds32/nds32.h (TARGET_PIPELINE_N7): Define.
	(TARGET_PIPELINE_N8): Likewise.
	(TARGET_PIPELINE_N10): Likewise.
	(TARGET_PIPELINE_N13): Likewise.
	(TARGET_PIPELINE_GRAYWOLF): Likewise.

From-SVN: r260409

From-SVN: r260408

	* pt.c (tsubst_pack_expansion): Sorry rather than abort
	on __integer_pack as subexpression of pattern.

From-SVN: r260404

gcc/
	* config/nds32/nds32-fpu.md: Update copyright year.

From-SVN: r260402

gcc/
	* config/nds32/nds32.h (ASM_SPEC): Adjust spec rule.

From-SVN: r260401

gcc/
	* config/nds32/nds32.c
	(nds32_md_asm_adjust): Consider flag_inline_asm_r15 variable.
	* config/nds32/nds32.opt (minline-asm-r15): New option.

From-SVN: r260400

gcc/
	* common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): Add
	MASK_HW_ABS.
	* config/nds32/nds32.md (abssi2): New pattern.

From-SVN: r260398

	* config/i386/i386.md (rex64namesuffix): New mode attribute.
	* config/i386/sse.md (sse_cvtsi2ss<rex64namesuffix><round_name>):
	Merge insn pattern from sse_cvtsi2ss<round_name> and
	sse_cvtsi2ssq<round_name> using SWI48 mode iterator.
	(sse_cvtss2si<rex64namesuffix><round_name>): Merge insn pattern
	from sse_cvtss2si<round_name> and sse_cvtss2siq<round_name>
	using SWI48 mode iterator.
	(sse_cvtss2si<rex64namesuffix>_2): Merge insn pattern from
	sse_cvtss2si_2 and sse_cvtss2siq_2 using SWI48 mode iterator.
	(sse_cvttss2si<rex64namesuffix><round_saeonly_name>): Merge insn
	pattern from sse_cvttss2si<round_saeonly_name>
	and sse_cvttss2siq<round_saeonly_name> using SWI48 mode iterator.
	(avx512f_vcvtss2usi<rex64namesuffix><round_name>): Merge insn pattern
	from avx512f_vcvtss2usi<round_name> and avx512f_vcvtss2usiq<round_name>
	using SWI48 mode iterator.
	(avx512f_vcvttss2usi<rex64namesuffix><round_saeonly_name>): Merge
	insn pattern from avx512f_vcvttss2usi<round_saeonly_name> and
	avx512f_vcvttss2usiq<round_saeonly_name> using SWI48 mode iterator.
	(avx512f_vcvtsd2usi<rex64namesuffix><round_name>): Merge insn pattern
	from avx512f_vcvtsd2usi<round_name> and avx512f_vcvtsd2usiq<round_name>
	using SWI48 mode iterator.
	(avx512f_vcvttsd2usi<rex64namesuffix><round_saeonly_name>): Merge
	insn pattern from avx512f_vcvttsd2usi<round_saeonly_name> and
	avx512f_vcvttsd2usiq<round_saeonly_name> using SWI48 mode iterator.
	(sse2_cvtsd2si<rex64namesuffix><round_name>): Merge insn pattern from
	sse2_cvtsd2si<round_name> and sse2_cvtsd2siq<round_name> using
	SWI48 mode iterator.
	(sse2_cvtsd2si<rex64namesuffix>_2): Merge insn pattern from
	sse2_cvtsd2si_2 and sse2_cvtsd2siq_2 using SWI48 mode iterator.
	(sse_cvttsd2si<rex64namesuffix><round_saeonly_name>): Merge insn
	pattern from sse_cvttsd2si<round_saeonly_name>
	and sse_cvttsd2siq<round_saeonly_name> using SWI48 mode iterator.

From-SVN: r260397

gcc/
	* config/nds32/nds32-md-auxiliary.c
	(nds32_valid_smw_lwm_base_p): Refine.
	(nds32_output_smw_single_word): Refine.
	(nds32_output_smw_double_word): New.
	* config/nds32/nds32-protos.h (nds32_output_smw_double_word): New.

From-SVN: r260396

gcc/
	* config/nds32/nds32-md-auxiliary.c (nds32_output_stack_push): Refine.
	(nds32_output_stack_pop): Refine.
	(nds32_expand_unaligned_load): Refine.
	(nds32_expand_unaligned_store): Refine.

From-SVN: r260394

gcc/
	* config/nds32/constants.md: Add TP_REGNUM constant.
	(unspec_element): Add UNSPEC_GOTINIT, UNSPEC_GOT, UNSPEC_GOTOFF,
	UNSPEC_PLT, UNSPEC_TLSGD, UNSPEC_TLSLD, UNSPEC_TLSIE, UNSPEC_TLSLE and
	UNSPEC_ADD32.
	* config/nds32/nds32-doubleword.md: Consider flag_pic.
	* config/nds32/nds32-dspext.md (mov<mode>): Expand TLS and PIC cases.
	* config/nds32/nds32-predicates.c (nds32_const_unspec_p): New.
	* config/nds32/nds32-md-auxiliary.c: Implementation that support TLS
	and PIC code generation.
	* config/nds32/nds32-protos.h: Declarations that support TLS and PIC
	code generation.
	* config/nds32/nds32-relax-opt.c: Consider TLS and PIC for relax
	optimization.
	* config/nds32/nds32.md: Support TLS and PIC.
	* config/nds32/nds32.c: Support TLS and PIC.
	* config/nds32/nds32.h (nds32_relax_insn_type): New enum type.
	* config/nds32/predicates.md (nds32_nonunspec_symbolic_operand): New
	predicate.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>

From-SVN: r260393

2018-05-19  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/82923
	PR fortran/66694
	PR fortran/82617
	* trans-array.c (gfc_alloc_allocatable_for_assignment): Set the
	charlen backend_decl of the rhs expr to ss->info->string_length
	so that the value in the current scope is used.

2018-05-19  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/82923
	* gfortran.dg/allocate_assumed_charlen_4.f90: New test. Note
	that the patch fixes PR66694 & PR82617, although the testcases
	are not explicitly included.

From-SVN: r260392

gcc/
	* config/nds32/nds32-predicates.c (const_vector_to_hwint): Use machine
	mode with E_ prefix.

From-SVN: r260391

	* config/nds32/constants.md (unspec_element): Add UNSPEC_ICT.
	* config/nds32/nds32-md-auxiliary.c
	(symbolic_reference_mentioned_p): New.
	(nds32_legitimize_ict_address): New.
	(nds32_expand_ict_move): New.
	(nds32_indirect_call_referenced_p): New.
	(nds32_symbol_binds_local_p): Delete.
	(nds32_long_call_p): Modify.
	* config/nds32/nds32-opts.h (nds32_ict_model_type): New enum type.
	* config/nds32/nds32-protos.h
	(symbolic_reference_mentioned_p): Declare.
	(nds32_legitimize_ict_address): Declare.
	(nds32_expand_ict_move): Declare.
	(nds32_indirect_call_referenced_p): Declare.
	* config/nds32/nds32-relax-opt.c (nds32_ict_const_p): New.
	(nds32_relax_group): Use nds32_ict_const_p as condition.
	* config/nds32/nds32.c (nds32_attribute_table): Add "indirect_call".
	(nds32_asm_file_start): Output ict_model directive in asm code.
	(nds32_legitimate_address_p): Consider indirect call.
	(nds32_print_operand): Consider indirect call.
	(nds32_print_operand_address): Consider indirect call.
	(nds32_insert_attributes): Handle "indirect_call" attribute.
	(TARGET_LEGITIMATE_ADDRESS_P): Define.
	(TARGET_LEGITIMATE_CONSTANT_P): Define.
	(TARGET_CANNOT_FORCE_CONST_MEM): Define.
	(TARGET_DELEGITIMIZE_ADDRESS): Define.
	(TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA): Define.
	* config/nds32/nds32.h (SYMBOLIC_CONST_P): Define.
	(TARGET_ICT_MODEL_SMALL): Define.
	(TARGET_ICT_MODEL_LARGE): Define.
	* config/nds32/nds32.md (movsi): Consider ict model.
	(call, call_value): Consider ict model.
	(sibcall, sibcall_value): Consider ict model.
	* config/nds32/nds32.opt (mict-model): New option.
	* config/nds32/predicates.md (nds32_symbolic_operand): Consider ict
	model.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>

From-SVN: r260390

	* src/c++11/codecvt.cc (__codecvt_utf8_base<wchar_t>::do_in)
	[__SIZEOF_WCHAR_T__==2 && __BYTE_ORDER__!=__ORDER_BIG_ENDIAN__]: Set
	little_endian element in bitmask.
	* testsuite/22_locale/codecvt/codecvt_utf8/69703.cc: Run all tests.
	* testsuite/22_locale/codecvt/codecvt_utf8/wchar_t/1.cc: New.

From-SVN: r260389

From-SVN: r260388

	Kito Cheng <kito.cheng@gmail.com>
	Monk Chiang  <sh.chiang04@gmail.com>

	gcc/
	* common/config/riscv/riscv-common.c (riscv_parse_arch_string):
	Add support to parse rv32e*.  Clear MASK_RVE for rv32i and rv64i.
	* config.gcc (riscv*-*-*): Add support for rv32e* and ilp32e.
	* config/riscv/riscv-c.c (riscv_cpu_cpp_builtins): Define
	__riscv_32e when TARGET_RVE.  Handle ABI_ILP32E as soft-float ABI.
	* config/riscv/riscv-opts.h (riscv_abi_type): Add ABI_ILP32E.
	* config/riscv/riscv.c (riscv_compute_frame_info): When TARGET_RVE,
	compute save_libcall_adjustment properly.
	(riscv_option_override): Call error if TARGET_RVE and not ABI_ILP32E.
	(riscv_conditional_register_usage): Handle TARGET_RVE and ABI_ILP32E.
	* config/riscv/riscv.h (UNITS_PER_FP_ARG): Handle ABI_ILP32E.
	(STACK_BOUNDARY, ABI_STACK_BOUNDARY): Handle TARGET_RVE.
	(GP_REG_LAST, MAX_ARGS_IN_REGISTERS): Likewise.
	(ABI_SPEC): Handle mabi=ilp32e.
	* config/riscv/riscv.opt (abi_type): Add ABI_ILP32E.
	(RVE): Add RVE mask.
	* doc/invoke.texi (RISC-V options) <-mabi>: Add ilp32e info.
	<-march>: Add rv32e as an example.

	gcc/testsuite/
	* gcc.dg/stack-usage-1.c: Add support for rv32e.

	libgcc/
	* config/riscv/save-restore.S: Add support for rv32e.

Co-Authored-By: Jim Wilson <jimw@sifive.com>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r260384

2018-05-18  Marc Glisse  <marc.glisse@inria.fr>

	PR c++/82899
gcc/
	* tree-ssa-structalias.c (create_variable_info_for_1): Extra argument.
	(intra_create_variable_infos): Handle C++ constructors.

gcc/testsuite/
	* g++.dg/pr82899.C: New testcase.

From-SVN: r260383