Commit b28c01ab by Chung-Ju Wu Committed by Chung-Ju Wu

[NDS32] New option -minline-asm-r15.

gcc/
	* config/nds32/nds32.c
	(nds32_md_asm_adjust): Consider flag_inline_asm_r15 variable.
	* config/nds32/nds32.opt (minline-asm-r15): New option.

From-SVN: r260400
parent 8c9babb8
2018-05-19 Chung-Ju Wu <jasonwucj@gmail.com> 2018-05-19 Chung-Ju Wu <jasonwucj@gmail.com>
* config/nds32/nds32.c
(nds32_md_asm_adjust): Consider flag_inline_asm_r15 variable.
* config/nds32/nds32.opt (minline-asm-r15): New option.
2018-05-19 Chung-Ju Wu <jasonwucj@gmail.com>
* common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): Add * common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): Add
MASK_HW_ABS. MASK_HW_ABS.
* config/nds32/nds32.md (abssi2): New pattern. * config/nds32/nds32.md (abssi2): New pattern.
......
...@@ -4066,8 +4066,11 @@ nds32_md_asm_adjust (vec<rtx> &outputs ATTRIBUTE_UNUSED, ...@@ -4066,8 +4066,11 @@ nds32_md_asm_adjust (vec<rtx> &outputs ATTRIBUTE_UNUSED,
vec<const char *> &constraints ATTRIBUTE_UNUSED, vec<const char *> &constraints ATTRIBUTE_UNUSED,
vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs) vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
{ {
clobbers.safe_push (gen_rtx_REG (SImode, TA_REGNUM)); if (!flag_inline_asm_r15)
SET_HARD_REG_BIT (clobbered_regs, TA_REGNUM); {
clobbers.safe_push (gen_rtx_REG (SImode, TA_REGNUM));
SET_HARD_REG_BIT (clobbered_regs, TA_REGNUM);
}
return NULL; return NULL;
} }
......
...@@ -446,3 +446,7 @@ Always save $lp in the stack. ...@@ -446,3 +446,7 @@ Always save $lp in the stack.
munaligned-access munaligned-access
Target Report Var(flag_unaligned_access) Init(0) Target Report Var(flag_unaligned_access) Init(0)
Enable unaligned word and halfword accesses to packed data. Enable unaligned word and halfword accesses to packed data.
minline-asm-r15
Target Report Var(flag_inline_asm_r15) Init(0)
Allow use r15 for inline ASM.
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