* tree-ssa-math-opts.c (do_shift_rotate, find_bswap_or_nop_1): Cast
	0xff to uint64_t before shifting it up.

From-SVN: r211837

2014-06-20  Julian Brown  <julian@codesourcery.com>
	    Chung-Lin Tang  <cltang@codesourcery.com>

	* config/arm/arm.c (arm_output_mi_thunk): Fix offset for
	TARGET_THUMB1_ONLY. Add comments.


Co-Authored-By: Chung-Lin Tang <cltang@codesourcery.com>

From-SVN: r211834

2014-06-20  Tobias Burnus  <burnus@net-b.de>

        PR testsuite/61567
        * gfortran.dg/coarray_collectives_5.f90: Update
        dg-final scan-tree-dump-times.
        * gfortran.dg/coarray_collectives_6.f90: Ditto.

From-SVN: r211833

c-family/ChangeLog
2014-06-20 Hale Wang <hale.wang@arm.com>

	PR lto/61123
	* c.opt (fshort-enums): Add to LTO.
	* c.opt (fshort-wchar): Likewise.

testsuite/ChangeLog
2014-06-20 Hale Wang <hale.wang@arm.com>

	* gcc.target/arm/lto/: New folder to verify the LTO option.
	* gcc.target/arm/lto/pr61123-enum-size_0.c: New test case.
	* gcc.target/arm/lto/pr61123-enum-size_1.c: Likewise.
	* gcc.target/arm/lto/lto.exp: New exp file used to test LTO option.
	* lib/lto.exp (object-readelf): New procedure.

From-SVN: r211832

From-SVN: r211831

2014-06-19  Tom de Vries  <tom@codesourcery.com>

	* config/aarch64/aarch64-protos.h (aarch64_emit_call_insn): Change
	return type to void.
	* config/aarch64/aarch64.c (aarch64_emit_call_insn): Same.

From-SVN: r211823

	PR fortran/61454
	* expr.c (scalarize_intrinsic_call): Take care of optional
	arguments.
	* gfortran.dg/pr61454.f90: New file.

From-SVN: r211822

	PR c++/59296
	* call.c (add_function_candidate): Also set LOOKUP_NO_TEMP_BIND.

From-SVN: r211821

2014-06-19  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	* loop-invariant.c (get_inv_cost): Skip invariants, which are marked
	as "move", from depends_on.

From-SVN: r211818

gcc/ChangeLog:

2014-06-19  Terry Guo  <terry.guo@arm.com>

	* config/arm/thumb1.md (define_split): Split 64bit constant in earlier
	stage.

gcc/testsuite/ChangeLog:

2014-06-19  Terry Guo  <terry.guo@arm.com>

	* gcc.target/arm/thumb1-load-64bit-constant-1.c: New test.
	* gcc.target/arm/thumb1-load-64bit-constant-2.c: Ditto.
	* gcc.target/arm/thumb1-load-64bit-constant-3.c: Ditto.

From-SVN: r211817

gcc/fortran/
2014-06-19  Tobias Burnus  <burnus@net-b.de>

        * trans-intrinsic.c (conv_co_minmaxsum): Fix argument
        passing.

gcc/testsuite/
2014-06-19  Tobias Burnus  <burnus@net-b.de>

        * gfortran.dg/coarray/collectives_2.f90: Extend
        and make valid.

libgfortran/
2014-06-19  Tobias Burnus  <burnus@net-b.de>

        * caf/single.c (_gfortran_caf_co_sum, _gfortran_caf_co_max,
        _gfortran_caf_co_min): Fix stat setting.

From-SVN: r211816

From-SVN: r211815

From-SVN: r211814

A comment in rs6000.h says "cr5 is not supposed to be used".  I checked
all ABIs, going as far back as PowerOpen (1994), and found no mention
of this.

Also document cr6 is used by some vector instructions.

From-SVN: r211811

	PR c++/59296
	* call.c (add_function_candidate): Set LOOKUP_NO_RVAL_BIND for
	ref-qualifier handling.

From-SVN: r211809

	PR c++/61507
	* pt.c (resolve_overloaded_unification): Preserve
	ARGUMENT_PACK_EXPLICIT_ARGS.

From-SVN: r211808

	PR target/61550
	* config/sh/sh.c (prepare_move_operands): Don't process TLS
	addresses here if reload in progress or completed.

From-SVN: r211807

2014-06-18  Tobias Burnus  <burnus@net-b.de>

        * gfortran.texi (OpenMP): Update refs to OpenMP 4.0.
        * intrinsic.texi (OpenMP Modules): Ditto.

From-SVN: r211806

gcc/

	* config/mips/constraints.md ("d"): BASE_REG_CLASS replaced by
	"TARGET_MIPS16 ? M16_REGS : GR_REGS".
	* config/mips/mips.c (mips_regno_to_class): Update for M16_SP_REGS.
	(mips_regno_mode_ok_for_base_p): Remove use of !strict_p for MIPS16.
	(mips_register_priority): New function that implements the target
	hook TARGET_REGISTER_PRIORITY.
	(mips_spill_class): Likewise for TARGET_SPILL_CLASS.
	(mips_lra_p): Likewise for TARGET_LRA_P.
	(TARGET_REGISTER_PRIORITY): Define macro.
	(TARGET_SPILL_CLASS): Likewise.
	(TARGET_LRA_P): Likewise.
	* config/mips/mips.h (reg_class): Add M16_SP_REGS and SPILL_REGS
	classes.
	(REG_CLASS_NAMES): Likewise.
	(REG_CLASS_CONTENTS): Likewise.
	(BASE_REG_CLASS): Use M16_SP_REGS.
	* config/mips/mips.md (*mul_acc_si): Add alternative tuned for LRA.
	New set attribute to enable alternatives depending on the register
	allocator used.
	(*mul_acc_si_r3900, *mul_sub_si): Likewise.
	(*lea64): Disable pattern for MIPS16.
	* config/mips/mips.opt (mlra): New option.

From-SVN: r211805

	* ChangeLog: Fix whitespace.
	* testsuite/ChangeLog: Fix invalid entry.

From-SVN: r211804

gcc/

	* lra-constraints.c (base_to_reg): New function.
	(process_address): Use new function.

From-SVN: r211802

2014-05-30  Tom de Vries  <tom@codesourcery.com>

	* config/aarch64/aarch64-protos.h (aarch64_emit_call_insn): Declare.
	* config/aarch64/aarch64.c
	(TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS): Redefine as true.
	(aarch64_emit_call_insn): New function.
	(aarch64_load_symref_appropriately): Use aarch64_emit_call_insn instead
	of emit_call_insn.
	* config/aarch64/aarch64.md (define_expand "call_internal")
	(define_expand "call_value_internal", define_expand "sibcall_internal")
	(define_expand "sibcall_value_internal"): New.
	(define_expand "call", define_expand "call_value")
	(define_expand "sibcall", define_expand "sibcall_value"): Use internal
	expand variant and aarch64_emit_call_insn.

	* gcc.target/aarch64/fuse-caller-save.c: New test.

From-SVN: r211799

2014-06-18  Radovan Obradovic  <robradovic@mips.com>
            Tom de Vries  <tom@codesourcery.com>

	* config/arm/arm-protos.h (arm_emit_call_insn): Add bool parameter.
	* config/arm/arm.c (TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS):
	Redefine to true.
	(arm_emit_call_insn): Add and use sibcall parameter.  Add IP and CC
	clobbers to CALL_INSN_FUNCTION_USAGE.
	(define_expand "sibcall_internal")
	(define_expand "sibcall_value_internal"): New.
	(define_expand "call", define_expand "call_value"): Add argument to
	arm_emit_call_insn.
	(define_expand "sibcall"): Use sibcall_internal and arm_emit_call_insn.
	(define_expand "sibcall_value"): Use sibcall_value_internal and
	arm_emit_call_insn.

	* gcc.target/arm/fuse-caller-save.c: New test.

Co-Authored-By: Tom de Vries <tom@codesourcery.com>

From-SVN: r211798

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

	* config/arm/bpabi.c (__gnu_uldivmod_helper): Remove.

From-SVN: r211797

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

	* config/arm/bpabi-v6m.S (__aeabi_uldivmod): Perform division using
	__udivmoddi4.

From-SVN: r211796

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

	* config/arm/bpabi.S (__aeabi_ldivmod, __aeabi_uldivmod,
	push_for_divide, pop_for_divide): Use .cfi_* directives for DWARF
	annotations. Fix DWARF information.

From-SVN: r211795

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

	* config/arm/bpabi.S (__aeabi_ldivmod): Perform division using
	__udivmoddi4, and fixups for negative operands.

From-SVN: r211794

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

	* config/arm/bpabi.S (__aeabi_ldivmod): Optimise stack manipulation.

From-SVN: r211793

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

	* config/arm/bpabi.S (__aeabi_uldivmod): Perform division using call
	to __udivmoddi4.

From-SVN: r211792

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

	* config/arm/bpabi.S (__aeabi_uldivmod): Optimise stack pointer
	manipulation.

From-SVN: r211791

bpabi.S (__aeabi_uldivmod, [...]): Add comment describing register usage on function entry and exit.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

	* config/arm/bpabi.S (__aeabi_uldivmod, __aeabi_ldivmod): Add comment
	describing register usage on function entry and exit.

From-SVN: r211790

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

	* config/arm/bpabi.S (__aeabi_uldivmod): Fix whitespace.
	(__aeabi_ldivmod): Fix whitespace.

From-SVN: r211789

* doc/md.texi (Standard Names): Use @itemx for grouped items.
Remove blank line after @item.

From-SVN: r211788

PR target/61545

* config/aarch64/aarch64.md (tlsdesc_small_<PTR>): Clobber CC_REGNUM.

From-SVN: r211785

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

	* config/arm/arm.c (neon_vector_mem_operand): Allow register
	POST_MODIFY for neon loads and stores.
	(arm_print_operand): Output post-index register for neon loads and
	stores.

From-SVN: r211783

2014-06-18  Richard Biener  <rguenther@suse.de>

	* tree-ssa-dce.c (perform_tree_ssa_dce): Fixup bogus commit.

From-SVN: r211782

2014-06-18  Richard Biener  <rguenther@suse.de>

	* tree-pass.h (make_pass_dce_loop): Remove.
	* passes.def: Replace pass_dce_loop with pass_dce.
	* tree-ssa-dce.c (perform_tree_ssa_dce): If something
	changed free niter estimates and reset the scev cache.
	(tree_ssa_dce_loop, pass_data_dce_loop, pass_dce_loop,
	make_pass_dce_loop): Remove.
	* tree-ssa-copy.c: Include tree-ssa-loop-niter.h.
	(fini_copy_prop): Return whether something changed.  Always
	let substitute_and_fold perform DCE and free niter estimates
	and reset the scev cache if so.
	(execute_copy_prop): If sth changed schedule cleanup-cfg.
	(pass_data_copy_prop): Do not unconditionally schedule
	cleanup-cfg or update-ssa.

	* gcc.dg/vect/vect.exp: Remove dump-tree-dceloop-* processing.
	* gcc.dg/vect/dump-tree-dceloop-pr26359.c: Rename to ...
	* gcc.dg/vect/pr26359.c: ... this and adjust appropriately.

From-SVN: r211781

        PR tree-optimization/61518
gcc/
        * tree-if-conv.c (is_cond_scalar_reduction): Add missed check that
        reduction var is used in reduction stmt or phi-function only.

gcc/testsuite/
        * gcc.dg/torture/pr61518.c: New test.

From-SVN: r211780

	* config/arm/arm_neon.h (vadd_f32): Change #ifdef to __FAST_MATH.

From-SVN: r211779

2014-06-18  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    PR tree-optimization/61517
    * tree-ssa-math-opts.c (find_bswap_or_nop_1): Adapt to return a stmt
    whose rhs's first tree is the source expression instead of the
    expression itself.
    (find_bswap_or_nop): Likewise.
    (bsap_replace): Rename stmt in cur_stmt. Pass gsi by value and src as a
    gimple stmt whose rhs's first tree is the source. In the memory source
    case, move the stmt to be replaced close to one of the original load to
    avoid the problem of a store between the load and the stmt's original
    location.
    (pass_optimize_bswap::execute): Adapt to change in bswap_replace's
    signature.

    gcc/testsuite/
    * gcc.c-torture/execute/bswap-2.c (incorrect_read_le32): New.
    (incorrect_read_be32): Likewise.
    (main): Call incorrect_read_* to test stmt replacement is made by
    bswap at the right place.
    * gcc.c-torture/execute/pr61517.c: New test.

From-SVN: r211778