Commit 36bd0c3e by Segher Boessenkool Committed by Segher Boessenkool

rs6000: Make cr5 allocatable

A comment in rs6000.h says "cr5 is not supposed to be used".  I checked
all ABIs, going as far back as PowerOpen (1994), and found no mention
of this.

Also document cr6 is used by some vector instructions.

From-SVN: r211811
parent 74f4bbb7
2014-06-18 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.h (FIXED_REGISTERS): Update comment.
Remove cr5.
(REG_ALLOC_ORDER): Update comment. Move cr5 earlier.
2014-06-18 Kaz Kojima <kkojima@gcc.gnu.org>
PR target/61550
......
......@@ -978,8 +978,6 @@ enum data_align { align_abi, align_opt, align_both };
On RS/6000, r1 is used for the stack. On Darwin, r2 is available
as a local register; for all other OS's r2 is the TOC pointer.
cr5 is not supposed to be used.
On System V implementations, r13 is fixed and not available for use. */
#define FIXED_REGISTERS \
......@@ -987,7 +985,7 @@ enum data_align { align_abi, align_opt, align_both };
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 1, \
0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
/* AltiVec registers. */ \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
......@@ -1048,7 +1046,8 @@ enum data_align { align_abi, align_opt, align_both };
fp13 - fp2 (not saved; incoming fp arg registers)
fp1 (not saved; return value)
fp31 - fp14 (saved; order given to save least number)
cr7, cr6 (not saved or special)
cr7, cr5 (not saved or special)
cr6 (not saved, but used for vector operations)
cr1 (not saved, but used for FP operations)
cr0 (not saved, but used for arithmetic operations)
cr4, cr3, cr2 (saved)
......@@ -1061,7 +1060,7 @@ enum data_align { align_abi, align_opt, align_both };
r12 (not saved; if used for DImode or DFmode would use r13)
ctr (not saved; when we have the choice ctr is better)
lr (saved)
cr5, r1, r2, ap, ca (fixed)
r1, r2, ap, ca (fixed)
v0 - v1 (not saved or used for anything)
v13 - v3 (not saved; incoming vector arg registers)
v2 (not saved; incoming vector arg reg; return value)
......@@ -1099,14 +1098,14 @@ enum data_align { align_abi, align_opt, align_both };
33, \
63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \
50, 49, 48, 47, 46, \
75, 74, 69, 68, 72, 71, 70, \
75, 73, 74, 69, 68, 72, 71, 70, \
MAYBE_R2_AVAILABLE \
9, 10, 8, 7, 6, 5, 4, \
3, EARLY_R12 11, 0, \
31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \
18, 17, 16, 15, 14, 13, LATE_R12 \
66, 65, \
73, 1, MAYBE_R2_FIXED 67, 76, \
1, MAYBE_R2_FIXED 67, 76, \
/* AltiVec registers. */ \
77, 78, \
90, 89, 88, 87, 86, 85, 84, 83, 82, 81, 80, \
......
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