From-SVN: r118460

* config/mips/mips.h (processor_type): Removed PROCESSOR_24K, add
PROCESSOR_24KC and PROCESSOR_24KF.
* config/mips/mips.c (mips_cpu_info_table): Add processor names
and aliases for 4kec/4kem/4kep/24kec/24kef/24kex/34kc/34kf/34kx.
(mips_rtx_cost_data): Add costs for the 24kc.
* config/mips/mips.md ("cpu"): Remove 24k, add 24kc and 24kf.
* config/mips/24k.md: Remove references to 24k and replace with
uses of 24kc/24kf in the appropriate reservations.
* doc/invoke.texi (MIPS Options): Updated.

From-SVN: r118459

gcc:

2006-11-03  J"orn Rennecke  <joern.rennecke@st.com>

	* config/sh/crt1.asm: Fix #ifdef indent.

2006-11-03  J"orn Rennecke  <joern.rennecke@st.com>
	Merged from STMicroelectronics sources:
	2006-10-06  Andrew Stubbs  <andrew.stubbs@st.com>
	  * config/sh/crt1.asm (vbr_600): Add missing #if.
	2006-08-03  J"orn Rennecke  <joern.rennecke@st.com>
	  * sh.opt (mfused-madd): New option.
	  * sh.md (mac_media, macsf3): Make conditional on TARGET_FMAC.
	2006-07-04  Andrew Stubbs  <andrew.stubbs@st.com>
	  * config/sh/crt1.asm (vbr_start): Move to new section .test.vbr.
	  Remove pointless handler at VBR+0.
	  (vbr_200, vbr_300, vbr_500): Remove pointless handler.
	  (vbr_600): Save and restore mach and macl, fpul and fpscr and fr0 to
	  fr7. Make sure the timer handler is called with the correct FPU
	  precision setting, according to the ABI.
	2006-06-14  J"orn Rennecke <joern.rennecke@st.com>
	  * config/sh/sh.opt (m2a-single, m2a-single-only): Fix Condition.
	  * config/sh/sh.h (SUPPORT_SH2A_NOFPU): Fix condition.
	  (SUPPORT_SH2A_SINGLE_ONLY, SUPPORT_SH2A_SINGLE_ONLY): Likewise.
	2006-06-09  J"orn Rennecke <joern.rennecke@st.com>
	  * sh.md (cmpgeusi_t): Change into define_insn_and_split.  Accept
	  zero as second operand.
	2006-04-28  J"orn Rennecke <joern.rennecke@st.com>
	  * config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
	  Fixed some bugs related to negative values, in particular -0
	  and overflow at -0x80000000.
	  * config/sh/divcost-analysis: Added sh4-300 figures.
	2006-04-27  J"orn Rennecke <joern.rennecke@st.com>
	  * config/sh/t-sh (MULTILIB_MATCHES): Add -m4-300* / -m4-340 options.
	2006-04-26  J"orn Rennecke <joern.rennecke@st.com>
	  * config/sh/t-sh (OPT_EXTRA_PARTS): Add libgcc-4-300.a.
	  ($(T)div_table-4-300.o, $(T)libgcc-4-300.a): New rules.
	  * config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
	New files.
	  * config/sh/embed-elf.h (LIBGCC_SPEC): Use -lgcc-4-300 for -m4-300* /
	  -m4-340.
	2006-04-24  J"orn Rennecke <joern.rennecke@st.com>
	  SH4-300 scheduling description & fixes to SH4-[12]00 description:
	  * sh.md: New instruction types: fstore, movi8, fpscr_toggle, gp_mac,
	  mac_mem, mem_mac, dfp_mul, fp_cmp.
	  (insn_class, dfp_comp, any_fp_comp): Update.
	  (push_fpul, movsf_ie, fpu_switch, toggle_sz, toggle_pr): Update type.
	  (cmpgtsf_t, "cmpeqsf_t, cmpgtsf_t_i4, cmpeqsf_t_i4): Likewise.
	  (muldf3_i): Likewise.
	  (movsi_i): Split rI08 alternative into two separate alternatives.
	  Update type.
	  (movsi_ie, movsi_i_lowpart): Likewise.
	  (movqi_i): Split ri alternative into two separate alternatives.
	  Update type.
	  * sh1.md (sh1_load_store, sh1_fp): Update.
	  * sh4.md (sh4_store, sh4_mac_gp, fp_arith, fp_double_arith): Update.
	  (mac_mem, sh4_fpscr_toggle): New insn_reservations.
	  * sh4a.md (sh4a_mov, sh4a_load, sh4a_store, sh4a_fp_arith): Update.
	  (sh4a_fp_double_arith): Likewise.
	  * sh4-300.md: New file.
	  * sh.c (sh_handle_option): Handle m4-300* options.
	  (sh_adjust_cost): Fix latency of auto-increments.
	  Handle SH4-300 differently than other SH4s.  Check for new insn types.
	  * sh.h (OVERRIDE_OPTIONS): Initilize sh_branch_cost if it has not
	  been set by an option.
	  * sh.opt (m4-300, m4-100-nofpu, m4-200-nofpu): New options.
	  (m4-300-nofpu, -m4-340, m4-300-single, m4-300-single-only): Likewise.
	  (mbranch-cost=): Likewise.
	  * superh.h (STARTFILE_SPEC): Take -m4-340 into account.

	  * sh.md (mulsf3): Remove special expansion code.
	  (mulsf3_ie): Now a define_insn_and_split.
	  (macsf3): Allow for TARGET_SH4.

	  * sh.md (cbranchsi4, cbranchdi4, cbranchdi4_i): New patterns.
	  * sh.c (prepare_cbranch_operands, expand_cbranchsi4): New functions.
	  (expand_cbranchdi4): Likewise.
	  (sh_rtx_costs): Give lower cost for certain CONST_INT values and for
	  CONST_DOUBLE if the outer code is COMPARE.
	  * sh.h (OPTIMIZATION_OPTIONS): If not optimizing for size, set
	  TARGET_CBRANCHDI4 and TARGET_EXPAND_CBRANCHDI4.
	  (OVERRIDE_OPTIONS): For TARGET_SHMEDIA, clear TARGET_CBRANCHDI4.
	  (LEGITIMATE_CONSTANT_P): Also allow DImode and VOIDmode CONST_DOUBLEs.
	  Remove redundant fp_{zero,one}_operand checks.
	  * sh.opt (mcbranchdi, mexpand-cbranchdi, mcmpeqdi): New options.
	  * sh-protos.h (prepare_cbranch_operands, expand_cbranchsi4): Declare.
	  (expand_cbranchdi4): Likewise.
	2006-04-20  J"orn Rennecke <joern.rennecke@st.com>
	  * sh.h (LOCAL_ALIGNMENT): Use DATA_ALIGNMENT.

gcc/testsuite:

2006-11-03  J"orn Rennecke  <joern.rennecke@st.com>

	* testsuite/gcc.c-torture/execute/arith-rand-ll.c:
	Also test for bogus rest sign.

From-SVN: r118458

	PR libfortran/27895

	* intrinsics/reshape_generic.c (reshape_internal): Fix so that it
	works correctly for zero-sized arrays.
	* m4/reshape.m4: Likewise.
	* generated/reshape_r16.c: Regenerate.
	* generated/reshape_c4.c: Regenerate.
	* generated/reshape_i4.c: Regenerate.
	* generated/reshape_c16.c: Regenerate.
	* generated/reshape_r10.c: Regenerate.
	* generated/reshape_r8.c: Regenerate.
	* generated/reshape_c10.c: Regenerate.
	* generated/reshape_c8.c: Regenerate.
	* generated/reshape_i8.c: Regenerate.
	* generated/reshape_i16.c: Regenerate.
	* generated/reshape_r4.c: Regenerate.

	* gcc/testsuite/gfortran.dg/zero_sized_1.f90: Uncomment checks
	for RESHAPE.

From-SVN: r118455

	* java/net/Inet4Address.java
	(FAMILY): Renamed to AF_INET.
	(<init>, writeReplace): Reflect the above.
	* java/net/Inet6Address.java
	(FAMILY): Renamed to AF_INET6.
	(<init>): Reflect the above.

From-SVN: r118452

2006-11-03  Gary Benson  <gbenson@redhat.com>

	* java/net/InetAddress.java: Removed.
	* java/net/natInetAddressNoNet.cc: Likewise.
	* java/net/natInetAddressPosix.cc: Likewise.
	* java/net/natInetAddressWin32.cc: Likewise.
	* java/net/VMInetAddress.java (getLocalHostname,
	lookupInaddrAny, getHostByAddr, getHostByName,
	aton): Replace glue methods with native ones.
	* java/net/natVMInetAddressNoNet.cc: New file.
	* java/net/natVMInetAddressPosix.cc: Likewise.
	* java/net/natVMInetAddressWin32.cc: Likewise.
	* Makefile.am, configure.ac: Reflect the above.
	* sources.am, Makefile.in, configure: Rebuilt.

	* java/net/natVMNetworkInterfaceWin32.cc
	(winsock2GetRealNetworkInterfaces): Create InetAddress
	objects using InetAddress.getByAddress.
	* gnu/java/net/natPlainSocketImplWin32.cc
	(accept, getOption): Likewise.
	* gnu/java/net/natPlainDatagramSocketImplWin32.cc
	(peekData, receive, getOption): Likewise.

From-SVN: r118451

* fortran/error.c (show_locus): Remove "In file" from error messages.
* testsuite/lib/gfortran-dg.exp (gfortran-dg-test): Remove expected "In file" from error 
messages.

From-SVN: r118450

	* inclhack.def (glibc_c99_inline_1): New.
	* inclhack.def (glibc_c99_inline_2): New.
	* inclhack.def (glibc_c99_inline_3): New.
	* inclhack.def (glibc_c99_inline_4): New.
	* fixincl.x: Regenerate.
	* tests/base/bits/string2.h: New.
	* tests/base/sys/sysmacros.h: New.
	* tests/base/sys/stat.h: Update.

From-SVN: r118449

2006-11-02  Andrew Pinski  <andrew_pinski@playstation.sony.com>

        * doc/md.texi (RS6000 constraints): Document H, Z, a, t, and W
        constraints.

From-SVN: r118448

* doc/invoke.texi: Fix mfp-trap-mode typo.

From-SVN: r118447

2006-11-02  Carlos O'Donell  <carlos@codesourcery.com>

	gcc/
	* config/arm/linux-elf.h (NEED_INDICATE_EXEC_STACK): Define as 1.
	* arm.c (arm_file_end): If NEED_INDICATE_EXEC_STACK call 
	file_end_indicate_exec_stack. 
	* arm.h [!NEED_INDICATE_EXEC_STACK] (NEED_INIDCATE_EXEC_STACK): 
	Define as 0.
	* lib1funcs.asm [__ELF__ && __linux__]: Emit .note.GNU-stack section
	for a non-executable stack.
	* crti.asm: Likewise.
	* crtn.asm: Likewise.
	* libunwind.S: Likewise.

From-SVN: r118445

	* tree-ssa.c (warn_uninit): Use expand_location variables for
	locus and declaration locus.

From-SVN: r118444

From-SVN: r118442

	PR target/27405
	* config/sh/sh.md (cmp{eq,gt,gtu}{si,di}_media): Remove.
	(cmpsi{eq,gt,gtu}{si,di}_media): Rename to
	cmp{eq,gt,gtu}{si,di}_media.
	(*cmpne0si_media): Remove.
	(*movsicc_umin): Adjust gen_cmp*_media call.
	(unordered): Change the mode of unordered and operands[1] to
	SImode.
	(seq): Adjust gen_cmp*_media calls.  Make the mode of
	a temporary result of compare SImode if needed.  If the mode
	of operands[0] is DImode, extend the temporary result to DImode.
	(slt, sle, sgt, sge, sgtu, sltu, sleu, sgue, sne): Likewise.
	(sunorderd): Change the mode of match_operand and unorderd to
	SImode.
	(cmpeq{sf,df}_media): Remove.
	(cmpsieq{sf,df}_media): Rename to cmpeq{sf,df}_media.
	(cmp{gt,ge,un}{sf,df}_media): Change the mode of match_operand
	and compare operation to SImode.

From-SVN: r118435

From-SVN: r118433

From-SVN: r118431

	* doc/install.texi (sparc-sun-solaris2*): Update GMP/MPFR build
	instructions.
	(sparc64-sun-solaris2*): Likewise.

From-SVN: r118426

2006-11-02  Paul Brook  <paul@codesourcery.com>

	gcc/
	* config/arm/arm.c (arm_elf_asm_constructor): Remove ATTRIBUTE_UNUSED
	from priority argument.  Use different section for non-default
	priority.
	* config/arm/elf.h: Remove definition of SUPPORTS_INIT_PRIORITY.

From-SVN: r118425

objc-act.c (objc_finish_file): Remove ifdef clause for OBJCPLUS and content where we called cp_finish_file.

2006-11-02  Andreas Tobler  <a.tobler@schweiz.org>

	* objc-act.c (objc_finish_file): Remove ifdef clause for OBJCPLUS and
	content where we called cp_finish_file.

From-SVN: r118424

	PR other/29639
	* except.c (switch_to_exception_section): Do not cache the section
	if named sections are supported and HAVE_LD_EH_GC_SECTIONS is defined
	and flag_function_sections is set.

From-SVN: r118422

From-SVN: r118420

        * jvmti.cc (_Jv_JVMTI_GetLineNumberTable): New function.
        (_Jv_JVMTI_Interface): Define GetLineNumberTable.

From-SVN: r118419

re PR middle-end/29335 (transcendental functions with constant arguments should be resolved at compile-time)

	PR middle-end/29335
	* builtins.c (do_mpfr_sincos): New.
	(fold_builtin_1): Use it to fold builtin sincos.

testsuite:
	* gcc.dg/torture/builtin-math-3.c: Fix semicolons.
	(TESTIT_2P, TESTIT_2P_R): New macros.  Test sincos.

From-SVN: r118409

	* config/darwin.h (CPP_SPEC): Handle -pthread, transforming
	it into -D_REENTRANT.

From-SVN: r118408

configure.ac (HAVE_AS_IX86_DIFF_SECT_DELTA): New test to determine whether the assembler supports taking the difference of...


	* configure.ac (HAVE_AS_IX86_DIFF_SECT_DELTA): New test to determine
	whether the assembler supports taking the difference of symbols in
	different sections.  On x86/Solaris, GAS does but Solaris as doesn't.
	* configure: Regenerate.
	* config.in: Regenerate.
	* config/i386/sol2-10.h (JUMP_TABLES_IN_TEXT_SECTION): Define if
	the assembler doesn't support taking the difference of symbols in
	different sections, i.e. we're using the native solaris assembler.

From-SVN: r118405

From-SVN: r118403

	* doc/invoke.texi: Add cpu_type power6x
	(RS/6000 and PowerPC Options): Add -mmfpgpr.
	* config.gcc: Add cpu_type power6x.
	* configure.ac: Add test for mf{t,f}gpr instructions.
	(HAVE_AS_MFPGPR): New.
	* config.in: Regenerate.
	* configure: Regenerate.
	* config/rs6000/aix52.h (ASM_CPU_SPEC): Add power6x.
	* config/rs6000/rs6000.md (define_attr "type"): Add insert_dword,
	shift,trap,var_shift_rotate,cntlz,exts, var_delayed_compare, mffgpr
	and mftgpr attributes.
	(define_attr "cpu"): Add power6.
	Change instruction sequences to use new attributes.
	(floatsidf2,fix_truncdfsi2): use TARGET_MFPGPR.
	(fix_truncdfsi2_mfpgpr): New.
	(floatsidf_ppc64_mfpgpr): New.
	(floatsidf_ppc64): Added !TARGET_MFPGPR condition.
	(movdf_hardfloat64_mfpgpr,movdi_mfpgpr): New.
	(movdf_hardfloat64): Added !TARGET_MFPGPR condition.
	(movdi_internal64): Added !TARGET_MFPGPR and related conditions.
	(fix_truncdfsi2): Use gpc_reg_operand constraint.
	* config/rs6000/{6xx.md,power4.md,8540.md,603.md,mpc.md,
	7xx.md,rios2.md,7450.md,440.md,rios1.md,rs64.md,power5.md,40x.md}:
	Add descriptions for insert_dword, shift,trap,var_shift_rotate,
	cntlz,exts and var_delayed_compare.
	* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Define
	_ARCH_PWR6X, if features enabled.
	* config/rs6000/rs6000.opt (mmfpgpr): New.
	* config/rs6000/rs6000.c (rs6000_align_branch_targets): New variable.
	(cached_can_issue_more): New variable.
	(processor_costs): Add power6_cost.
	(rs6000_sched_init): New function.
	(is_dispatch_slot_restricted): Deleted.
	(set_to_load_agen): New function.
	(is_load_insn,is_store_insn): New functions.
	(adjacent_mem_locations): New function.
	(insn_must_be_first_in_group): New function.
	(insn_must_be_last_in_group): New function.
	(rs6000_sched_reorder): New function.
	(rs6000_sched_reorder2): New function.
	(TARGET_SCHED_INIT,TARGET_SCHED_REORDER,
	TARGET_SCHED_REORDER2): Define.
	(processor_target_table): Use PROCESSOR_POWER6 for power6.
	Add power6x. Add MASK_MFPGPR for power6x.
	(POWERPC_MASKS): Add MASK_MFPGPR.
	(rs6000_override_options): Set rs6000_always_hint to false
	for power6.  Set rs6000_align_branch_targets. Replace
	rs6000_sched_groups check with rs6000_align_branch_targets.
	Use PROCESSOR_POWER6.
	(last_scheduled_insn): New variable.
	(load_store_pendulum): New variable.
	(rs6000_variable_issue): Set last_scheduled_insn and
	cached_can_issue_more.
	(rs6000_adjust_cost): Add power6 cost adjustments.
	(rs6000_adjust_priority): Replace is_dispatch_slot_restricted
	with insn_must_be_first_in_group. Add power6 priority adjustments.
	(rs6000_issue_rate): Add CPU_POWER6.
	(insn_terminates_group_p): Use insn_must_be_{first,last}_in_group.
	* config/rs6000/rs6000.h (processor_type): Add PROCESSOR_POWER6.
	(TARGET_MFPGPR): New.
	(SECONDARY_MEMORY_NEEDED): Use TARGET_MFPGPR.
	(ASM_CPU_SPEC): Add power6x.
	(SECONDARY_MEMORY_NEEDED): Added mode!=DFmode and mode!=DImode
	conditions.
	* config/rs6000/power6.md: New file.


Co-Authored-By: Peter Bergner <bergner@vnet.ibm.com>

From-SVN: r118396

	* gcc.dg/fold-mod-1.c: Match the leading 0x for the
	hexadecimal value.
	* gcc.dg/tree-prof/val-prof-2.c: Likewise.
	* gcc.dg/pr14796-2.c: Likewise.

From-SVN: r118394

	* tree-pretty-print.c (dump_generic_node) <INTEGER_CST>: Use
	HOST_WIDE_INT_PRINT to print high and low parts.  Use
	HOST_BITS_PER_WIDE_INT for the width of HOST_WIDE_INT.  When
	printing a hexadecimal number prefix it with 0x.

From-SVN: r118393

2006-11-01  Chris Johns <chris@contemporary.net.au>

        PR bootstrap/28400
        * Makefile.in (install-driver): Use exeext when installing
        $target-gcc-$version.

From-SVN: r118392

        * gnu/gcj/jvmti/Location.java: New file.
        * gnu/gcj/jvmti/BreakpointManager.java: New file.
        * jvmti.cc (_Jv_JVMTI_SetBreakpoint): New function.
        (_Jv_JVMTI_ClearBreakpoint): New function.
        (_Jv_JVMTI_Interface): Define SetBreakpoint and ClearBreakpoint.
        * sources.am: Regenerated.
        * Makefile.in: Regenerated.

From-SVN: r118391

2006-11-01	Douglas Gregor <doug.gregor@gmail.com>

	* c-common.c (flag_cpp0x): New.
	* c-common.h (flag_cpp0x): New.
	* c-cppbuiltin.c (c_cpp_builtins): If C++0x extensions are
	supported, define __GXX_EXPERIMENTAL_CPP0X__.
	* c-opts.c (set_std_cxx0x): New.
	(c_common_handle_option): Handle -std=c++0x, -std=gnu++0x.
	* c.opt (std=c++0x): Document.
	(std=gnu++0x): Ditto.
	* doc/cpp.texi: Document __GXX_EXPERIMENTAL_CPP0X__.
	* doc/invoke.texi: Document -std=c++0x, -std=gnu++0x.

From-SVN: r118389

2006-11-01	Douglas Gregor <doug.gregor@gmail.com>

	* c-common.c (flag_cpp0x): New.
	* c-common.h (flag_cpp0x): New.
	* c-cppbuiltin.c (c_cpp_builtins): If C++0x extensions are
	supported, define __GXX_EXPERIMENTAL_CPP0X__.
	* c-opts.c (set_std_cxx0x): New.
	(c_common_handle_option): Handle -std=c++0x, -std=gnu++0x.
	* c.opt (std=c++0x): Document.
	(std=gnu++0x): Ditto.
	* doc/cpp.texi: Document __GXX_EXPERIMENTAL_CPP0X__.
	* doc/invoke.texi: Document -std=c++0x, -std=gnu++0x.

From-SVN: r118386

2006-11-01	Douglas Gregor <doug.gregor@gmail.com>

	* include/cpplib.h (enum c_lang): Add CLK_GNUCXX0X and CLK_CXX0X
	for experimental C++0x mode.
	* init.c (lang_defaults): Add defaults for C++0x modes. C++0x has
	adopted the preprocessor changes introduced in C99.

From-SVN: r118385

From-SVN: r118384

	* gcc.c-torture/execute/20061101-1.c: New test.

From-SVN: r118377

From-SVN: r118374

2006-11-01  Richard Guenther  <rguenther@suse.de>

	* config/i386/i386.c (ix86_expand_rint): Fix issues with
	signed zeros.
	(ix86_expand_floorceildf_32): Likewise.
	(ix86_expand_floorceil): Likewise.
	(ix86_expand_trunc): Likewise.

	* testsuite/gcc.target/i386/fpprec-1.c: New testcase.

From-SVN: r118373

2006-10-31  Andrew Pinski  <pinskia@gmail.com>

        * doc/invoke.texi (-fkeep-inline-functions): Change "GNU C"
        to "GNU C89".

From-SVN: r118372

	* target.h (targetm.cxx.use_atexit_for_cxa_atexit): New target
	hook.
	* target-def.h: (TARGET_CXX_USE_ATEXIT_FOR_CXA_ATEXIT): Define
	default.
	* config/i386/mingw32.h (TARGET_CXX_USE_ATEXIT_FOR_CXA_ATEXIT):
	Override default.
	* doc/tm.texi (TARGET_CXX_USE_ATEXIT_FOR_CXA_ATEXIT): Document.
	* configure.ac (use_cxa_atexit): As a special case, don't test
	for libc definition of __cxa_atexit on mingw32
	* configure: Regenerate.
	* config.gcc (i[34567]86-pc-mingw32): Default to
	enable__cxa_atexit=yes.

cp

	* decl.c (get_atexit_node): Reference atexit, not __cxa_exit.
	if targetm.cxx.use_atexit_for cxa_atexit.
	(start_cleanup_fn): Likewise.
	(register_dtor_fn): Likewise.

From-SVN: r118371