Since LWG 445 was implemented for GCC 4.7, the std::iterator base class
of std::istreambuf_iterator changes type depending on the -std mode
used. This creates an ABI incompatibility between different -std modes.

This change ensures the base class always has the same type. This makes
layout for C++98 compatible with the current -std=gnu++14 default, but
no longer compatible with C++98 code from previous releases. In practice
this is unlikely to cause real problems, because it only affects the
layout of types with two std::iterator base classes, one of which comes
from std::istreambuf_iterator. Such types are expected to be vanishingly
rare.

	PR libstdc++/92285
	* include/bits/streambuf_iterator.h (istreambuf_iterator): Make type
	of base class independent of __cplusplus value.
	[__cplusplus < 201103L] (istreambuf_iterator::reference): Override the
	type defined in the base class
	* testsuite/24_iterators/istreambuf_iterator/92285.cc: New test.
	* testsuite/24_iterators/istreambuf_iterator/requirements/
	base_classes.cc: Adjust expected base class for C++98.

From-SVN: r280116

2020-01-10  Gergö Barany  <gergo@codesourcery.com>
	    Thomas Schwinge <thomas@codesourcery.com>
	    Julian Brown  <julian@codesourcery.com>
	    Tobias Burnus  <tobias@codesourcery.com>

        gcc/c/
        * c-parser.c (OACC_HOST_DATA_CLAUSE_MASK): Add PRAGMA_OACC_CLAUSE_IF
        and PRAGMA_OACC_CLAUSE_IF_PRESENT.

        gcc/cp/
        * parser.c (OACC_HOST_DATA_CLAUSE_MASK): Add PRAGMA_OACC_CLAUSE_IF
        and PRAGMA_OACC_CLAUSE_IF_PRESENT.

        gcc/fortran/
        * openmp.c (OACC_HOST_DATA_CLAUSES): Add PRAGMA_OACC_CLAUSE_IF
        and PRAGMA_OACC_CLAUSE_IF_PRESENT.

	gcc/
	* omp-low.c (lower_omp_target): Use GOMP_MAP_USE_DEVICE_PTR_IF_PRESENT
	if PRAGMA_OACC_CLAUSE_IF_PRESENT exist.

	gcc/testsuite/
	* c-c++-common/goacc/host_data-1.c: Added tests of if and if_present
	clauses on host_data.
	* gfortran.dg/goacc/host_data-tree.f95: Likewise.

	include/
	* gomp-constants.h (enum gomp_map_kind): New enumeration constant
	GOMP_MAP_USE_DEVICE_PTR_IF_PRESENT.
        
	libgomp/
	* oacc-parallel.c (GOACC_data_start): Handle
	GOMP_MAP_USE_DEVICE_PTR_IF_PRESENT.
	* target.c (gomp_map_vars_async): Likewise.
	* testsuite/libgomp.oacc-c-c++-common/host_data-7.c: New.
	* testsuite/libgomp.oacc-fortran/host_data-5.F90: New.

From-SVN: r280115

aarch64_builtin_vectorized_function checked vectors based on the
number of elements and the element mode.  This doesn't interact
well with fixed-length 128-bit SVE, where SVE modes can have those
same properties.  (And we can't just use the built-ins for SVE because
the types use a different ABI.  SVE handles this kind of thing using
optabs instead.)

2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-builtins.c
	(aarch64_builtin_vectorized_function): Check for specific vector modes,
	rather than checking the number of elements and the element mode.

From-SVN: r280114

The related_vector_mode series missed this case in
vect_create_epilog_for_reduction, where we want to create the
unsigned integer equivalent of another vector.  Without it we
could mix SVE and Advanced SIMD vectors in the same operation.

This showed up on existing tests when testing with fixed-length
-msve-vector-bits=128.

2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vect-loop.c (vect_create_epilog_for_reduction): Use
	get_related_vectype_for_scalar_type rather than build_vector_type
	to create the index type for a conditional reduction.

From-SVN: r280112

update_epilogue_loop_vinfo applies SSA renmaing to the DR_REF of a
gather or scatter, so that vect_check_gather_scatter continues to work.
However, we sometimes also rely on vect_check_gather_scatter when
using gathers and scatters to implement strided accesses.

This showed up on existing tests when testing with fixed-length
-msve-vector-bits=128.

2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
	for any type of gather or scatter, including strided accesses.

From-SVN: r280111

    
    This is a language change for Go 1.14.
    
    Updates golang/go#6977
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/214240

From-SVN: r280109

gcc/ChangeLog:
2020-01-10  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
	 comment.

From-SVN: r280108

gcc/ChangeLog:
2020-01-10  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
	get_dr_vinfo_offset
	* tree-vect-loop.c (update_epilogue_loop_vinfo):  Remove orig_drs_init
	parameter and its use to reset DR_OFFSET's.
	(vect_transform_loop): Remove orig_drs_init argument.
	* tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
	member of dr_vec_info rather than the offset of the associated
	data_reference's innermost_loop_behavior.
	(vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
	(vect_do_peeling): Remove orig_drs_init parameter and its construction.
	* tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
	get_dr_vinfo_offset.
	(vectorizable_store): Likewise.
	(vectorizable_load): Likewise.

From-SVN: r280107

	* gimple-ssa-store-merging
	(pass_store_merging::terminate_all_aliasing_chains): Cache alias info.

From-SVN: r280106

2020-01-10  Martin Jambor  <mjambor@suse.cz>

	* gcc.dg/ipa/ipa-clone-3.c: Replace struct initializer with
	piecemeal initialization.

From-SVN: r280105

One of the SVE run tests was specific to 256-bit SVE but tried to
run for all SVE lengths.

2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
	* gcc.target/aarch64/sve/index_1_run.c: Require aarch64_sve256_hw
	rather than aarch64_sve_hw.

From-SVN: r280104

2020-01-10  Martin Liska  <mliska@suse.cz>

	PR ipa/93217
	* ipa-inline-analysis.c (offline_size): Make proper parenthesis
	encapsulation that was there before r280040.

From-SVN: r280103

2020-01-10  Richard Biener  <rguenther@suse.de>

	PR middle-end/93199
	* tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
	sequences to avoid walking them again for secondary opportunities.
	(pass_lower_eh_dispatch::execute): Instead actually insert
	them here.

From-SVN: r280102

2020-01-10  Richard Biener  <rguenther@suse.de>

	PR middle-end/93199
	* tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
	(cleanup_all_empty_eh): Walk landing pads in reverse order to
	avoid quadraticness.

From-SVN: r280101

2020-01-10  Martin Jambor  <mjambor@suse.cz>

	* params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
	* ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
	to get param_ipa_sra_max_replacements.
	(param_splitting_across_edge): Pass the caller to
	pull_accesses_from_callee.

From-SVN: r280100

2020-01-10  Martin Jambor  <mjambor@suse.cz>

	* params.opt (param_ipcp_unit_growth): Mark as Optimization.
	* ipa-cp.c (max_new_size): Removed.
	(orig_overall_size): New variable.
	(get_max_overall_size): New function.
	(estimate_local_effects): Use it.  Adjust dump.
	(decide_about_value): Likewise.
	(ipcp_propagate_stage): Do not calculate max_new_size, just store
	orig_overall_size.  Adjust dump.
	(ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.

From-SVN: r280099

2020-01-10  Martin Jambor  <mjambor@suse.cz>

	* params.opt (param_ipa_max_agg_items): Mark as Optimization
	* ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
	instead of param_ipa_max_agg_items.
	(merge_aggregate_lattices): Extract param_ipa_max_agg_items from
	optimization info for the callee.

From-SVN: r280098

2020-01-10  Richard Biener  <rguenther@suse.de>

	PR testsuite/93216
	* gcc.dg/optimize-bswaphi-1.c: Split previously added
	case into a LE and BE variant.

From-SVN: r280097

From-SVN: r280096

    
    Previously if the only names defined by _test packages were examples,
    the gotest script would emit an incorrect _testmain.go file.
    I worked around that by marking the example_test.go files +build ignored.
    
    This CL changes the gotest script to handle this case correctly,
    and removes the now-unnecessary build tags.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/214039

From-SVN: r280085

2020-01-09  Olivier Hainque  <hainque@adacore.com>

	* doc/xml/manual/appendix_contributing.xml: Document _C2
	as a reserved identifier, by VxWorks.
	* include/bits/stl_map.h: Rename _C2 template typenames	as _Cmp2.
	* include/bits/stl_multimap.h: Likewise.

From-SVN: r280076

The equality operators for _ExtPtr_allocator are defined as non-const
member functions, which causes ambiguities in C++20 due to the
synthesized operator!= candidates. They should always have been const.

The _Pointer_adapter class template has both value_type and element_type
members, which makes readable_traits<_Pointer_adapter<T>> ambiguous. The
intended workaround is to add a specialization of readable_traits.

	* include/ext/extptr_allocator.h (_ExtPtr_allocator::operator==)
	(_ExtPtr_allocator::operator!=): Add missing const qualifiers.
	* include/ext/pointer.h (readable_traits<_Pointer_adapter<S>>): Add
	partial specialization to disambiguate the two constrained
	specializations.

From-SVN: r280067

With -std=gnu++2a and -Wsystem-headers the std::is_pod deprecation
causes some new diagnostics. This suppresses them.

	* include/experimental/type_traits (experimental::is_pod_v): Disable
	-Wdeprecated-declarations warnings around reference to std::is_pod.
	* include/std/type_traits (is_pod_v): Likewise.
	* testsuite/18_support/max_align_t/requirements/2.cc: Also check
	is_standard_layout and is_trivial. Do not check is_pod for C++20.
	* testsuite/20_util/is_pod/requirements/explicit_instantiation.cc:
	Add -Wno-deprecated for C++20.
	* testsuite/20_util/is_pod/requirements/typedefs.cc: Likewise.
	* testsuite/20_util/is_pod/value.cc: Likewise.
	* testsuite/experimental/type_traits/value.cc: Likewise.

From-SVN: r280066

This adds the deprecated attribute to std::is_pod and std::is_pod_v for
C++20.

2019-12-05  JeanHeyd "ThePhD" Meneide  <phdofthehouse@gmail.com>

	* include/bits/c++config (_GLIBCXX20_DEPRECATED): Add new macro.
	* include/std/type_traits (is_pod, is_pod_v): Deprecate for C++20.
	* testuite/20_util/is_pod/deprecated-2a.cc: New test.

From-SVN: r280065

From-SVN: r280064

2020-01-09  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/65428
	* array.c (empty_constructor): New variable.
	(empty_ts): New variable.
	(expand_constructor): Save typespec in empty_ts.
	Unset empty_constructor if there is an element.
	(gfc_expand_constructor): Initialize empty_constructor
	and empty_ts.  If there was no explicit constructor
	type and the constructor is empty, take the type from
	empty_ts.

2020-01-09  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/65428
	* gfortran.dg/zero_sized_11.f90: New test.

From-SVN: r280063

2020-01-09  Kwok Cheung Yeung  <kcy@codesourcery.com>

	gcc/
	* lto-streamer-in.c (input_function): Remove streamed-in inline debug
	markers	if debug_inline_points is false.

From-SVN: r280062

The deserialization functions for random number distributions fail to
check the stream state before using the extracted values. In some cases
this leads to using indeterminate values to resize a vector, and then
filling that vector with indeterminate values.

No values that affect control flow should be used without checking that a
good value was read from the stream.

Additionally, where reasonable to do so, defer modifying any state in
the distribution until all values have been successfully read, to avoid
modifying some of the distribution's parameters and leaving others
unchanged.

	PR libstdc++/93205
	* include/bits/random.h (operator>>): Check stream operation succeeds.
	* include/bits/random.tcc (operator<<): Remove redundant __ostream_type
	typedefs.
	(operator>>): Remove redundant __istream_type typedefs. Check stream
	operations succeed.
	(__extract_params): New function to fill a vector from a stream.
	* testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error line.

From-SVN: r280061

This patch adds support for the SVE2 ACLE,  The implementation
and tests follow the same pattern as the exiting SVE ACLE support.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
	extra_objs.
	* config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
	aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
	aarch64-sve-builtins-sve2.h.
	(aarch64-sve-builtins-sve2.o): New rule.
	* config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
	(AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
	(AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
	(TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
	TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
	TARGET_SVE2_SM4.
	* config/aarch64/aarch64-sve.md: Update comments with SVE2
	instructions that are handled here.
	(@cond_asrd<mode>): Generalize to...
	(@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
	(*cond_asrd<mode>_2): Generalize to...
	(*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
	(*cond_asrd<mode>_z): Generalize to...
	(*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
	* config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
	(UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
	(UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
	* config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
	pattern.
	(@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
	(@aarch64_scatter_stnt<mode>): Likewise.
	(@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
	(@aarch64_mul_lane_<mode>): Likewise.
	(@aarch64_sve_suqadd<mode>_const): Likewise.
	(*<sur>h<addsub><mode>): Generalize to...
	(@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
	new pattern.
	(@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
	(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
	(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
	(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
	(*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
	(@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
	(@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
	(@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
	(@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
	(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
	(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
	(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
	(@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
	(@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
	(@aarch64_sve_add_mul_lane_<mode>): Likewise.
	(@aarch64_sve_sub_mul_lane_<mode>): Likewise.
	(@aarch64_sve2_xar<mode>): Likewise.
	(@aarch64_sve2_bcax<mode>): Likewise.
	(*aarch64_sve2_eor3<mode>): Rename to...
	(@aarch64_sve2_eor3<mode>): ...this.
	(@aarch64_sve2_bsl<mode>): New expander.
	(@aarch64_sve2_nbsl<mode>): Likewise.
	(@aarch64_sve2_bsl1n<mode>): Likewise.
	(@aarch64_sve2_bsl2n<mode>): Likewise.
	(@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
	(*aarch64_sve2_sra<mode>): Add MOVPRFX support.
	(@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
	(@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
	(@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
	(*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
	(@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
	(<su>mull<bt><Vwide>): Generalize to...
	(@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
	pattern.
	(@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
	(@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
	(@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
	(@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
	(@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
	(@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
	(@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
	(@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
	(@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
	(@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
	(@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
	(@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
	(@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
	(@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
	(@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
	(@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
	(<SHRNB:r>shrnb<mode>): Generalize to...
	(@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
	new pattern.
	(<SHRNT:r>shrnt<mode>): Generalize to...
	(@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
	new pattern.
	(@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
	(@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
	(@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
	(*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
	(*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
	(@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
	(@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
	(@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
	(@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
	(@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
	(@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
	(@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
	(*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
	(@aarch64_sve2_cvtnt<mode>): Likewise.
	(@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
	(@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
	(*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
	(@aarch64_sve2_cvtxnt<mode>): Likewise.
	(@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
	(@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
	(*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
	(@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
	(@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
	(*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
	(@aarch64_sve2_pmul<mode>): Likewise.
	(@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
	(@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
	(@aarch64_sve2_tbl2<mode>): Likewise.
	(@aarch64_sve2_tbx<mode>): Likewise.
	(@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
	(@aarch64_sve2_histcnt<mode>): Likewise.
	(@aarch64_sve2_histseg<mode>): Likewise.
	(@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
	(*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
	(*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
	(aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
	(aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
	(*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
	(aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
	(<su>mulh<r>s<mode>3): Update after above pattern name changes.
	* config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
	(SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
	(SVE2_PMULL_PAIR_I): New mode iterators.
	(UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
	(UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
	(UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
	(UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
	(UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
	(UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
	(UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
	(UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
	(UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
	(UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
	(UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
	(UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
	(UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
	(UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
	(UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
	(UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
	(UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
	(UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
	(UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
	(UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
	(UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
	(UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
	(UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
	(UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
	(UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
	(UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
	(UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
	(UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
	(UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
	(UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
	(UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
	further down file.
	(VNARROW, Ventype): New mode attributes.
	(Vewtype): Handle VNx2DI.  Fix typo in comment.
	(VDOUBLE): New mode attribute.
	(sve_lane_con): Handle VNx8HI.
	(SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
	(SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
	(sve_int_op, sve_int_op_rev): Handle the above codes.
	(sve_pred_int_rhs2_operand): Likewise.
	(MULLBT, SHRNB, SHRNT): Delete.
	(SVE_INT_SHIFT_IMM): New int iterator.
	(SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
	and UNSPEC_WHILEHS for TARGET_SVE2.
	(SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
	(SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
	(SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
	(SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
	(SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
	(SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
	(SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
	(SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
	(SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
	(SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
	(SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
	(SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
	(SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
	(SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
	(SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
	(SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
	(SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
	(optab): Handle the new unspecs.
	(su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
	and UNSPEC_RSHRNT.
	(lr): Handle the new unspecs.
	(bt): Delete.
	(cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
	(sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
	(sve_int_qsub_op): New int attributes.
	(sve_fp_op, rot): Handle the new unspecs.
	* config/aarch64/aarch64-sve-builtins.h
	(function_resolver::require_matching_pointer_type): Declare.
	(function_resolver::resolve_unary): Add an optional boolean argument.
	(function_resolver::finish_opt_n_resolution): Add an optional
	type_suffix_index argument.
	(gimple_folder::redirect_call): Declare.
	(gimple_expander::prepare_gather_address_operands): Add an optional
	bool parameter.
	* config/aarch64/aarch64-sve-builtins.cc: Include
	aarch64-sve-builtins-sve2.h.
	(TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
	(TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
	(TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
	(TYPES_hsd_integer): Use TYPES_hsd_signed.
	(TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
	(TYPES_s_unsigned): Likewise.
	(TYPES_s_integer): Use TYPES_s_unsigned.
	(TYPES_sd_signed, TYPES_sd_unsigned): New macros.
	(TYPES_sd_integer): Use them.
	(TYPES_d_unsigned): New macro.
	(TYPES_d_integer): Use it.
	(TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
	(TYPES_cvt_narrow): Likewise.
	(DEF_SVE_TYPES_ARRAY): Include the new types macros above.
	(preds_mx): New variable.
	(function_builder::add_overloaded_function): Allow the new feature
	set to be more restrictive than the original one.
	(function_resolver::infer_pointer_type): Remove qualifiers from
	the pointer type before printing it.
	(function_resolver::require_matching_pointer_type): New function.
	(function_resolver::resolve_sv_displacement): Handle functions
	that don't support 32-bit vector indices or svint32_t vector offsets.
	(function_resolver::finish_opt_n_resolution): Take the inferred type
	as a separate argument.
	(function_resolver::resolve_unary): Optionally treat all forms in
	the same way as normal merging functions.
	(gimple_folder::redirect_call): New function.
	(function_expander::prepare_gather_address_operands): Add an argument
	that says whether scaled forms are available.  If they aren't,
	handle scaling of vector indices and don't add the extension and
	scaling operands.
	(function_expander::map_to_unspecs): If aarch64_sve isn't available,
	fall back to using cond_* instead.
	* config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
	Split out the member variables into...
	(rtx_code_function_base): ...this new base class.
	(rtx_code_function_rotated): Inherit rtx_code_function_base.
	(unspec_based_function): Split out the member variables into...
	(unspec_based_function_base): ...this new base class.
	(unspec_based_function_rotated): Inherit unspec_based_function_base.
	(unspec_based_function_exact_insn): New class.
	(unspec_based_add_function, unspec_based_add_lane_function)
	(unspec_based_lane_function, unspec_based_pred_function)
	(unspec_based_qadd_function, unspec_based_qadd_lane_function)
	(unspec_based_qsub_function, unspec_based_qsub_lane_function)
	(unspec_based_sub_function, unspec_based_sub_lane_function): New
	typedefs.
	(unspec_based_fused_function): New class.
	(unspec_based_mla_function, unspec_based_mls_function): New typedefs.
	(unspec_based_fused_lane_function): New class.
	(unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
	typedefs.
	(CODE_FOR_MODE1): New macro.
	(fixed_insn_function): New class.
	(while_comparison): Likewise.
	* config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
	(binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
	(binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
	(load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
	(load_gather_sv_restricted, shift_left_imm_long): Declare.
	(shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
	(shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
	(shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
	(store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
	(ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
	(ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
	(unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
	(unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
	* config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
	Also add an initial argument for unary_convert_narrowt, regardless
	of the predication type.
	(build_32_64): Allow loads and stores to specify MODE_none.
	(build_sv_index64, build_sv_uint_offset): New functions.
	(long_type_suffix): New function.
	(binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
	(binary_imm_long_base, load_gather_sv_base): Likewise.
	(shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
	(ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
	(unary_narrowb_base, unary_narrowt_base): Likewise.
	(binary_long_lane_def, binary_long_lane): New shape.
	(binary_long_opt_n_def, binary_long_opt_n): Likewise.
	(binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
	(binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
	(binary_to_uint_def, binary_to_uint): Likewise.
	(binary_wide_def, binary_wide): Likewise.
	(binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
	(compare_def, compare): Likewise.
	(compare_ptr_def, compare_ptr): Likewise.
	(load_ext_gather_index_restricted_def,
	load_ext_gather_index_restricted): Likewise.
	(load_ext_gather_offset_restricted_def,
	load_ext_gather_offset_restricted): Likewise.
	(load_gather_sv_def): Inherit from load_gather_sv_base.
	(load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
	(shift_left_imm_def, shift_left_imm): Likewise.
	(shift_left_imm_long_def, shift_left_imm_long): Likewise.
	(shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
	(store_scatter_index_restricted_def,
	store_scatter_index_restricted): Likewise.
	(store_scatter_offset_restricted_def,
	store_scatter_offset_restricted): Likewise.
	(tbl_tuple_def, tbl_tuple): Likewise.
	(ternary_long_lane_def, ternary_long_lane): Likewise.
	(ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
	(ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
	(ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
	(ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
	(ternary_qq_rotate_def, ternary_qq_rotate): New shape.
	(ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
	(ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
	(ternary_uint_def, ternary_uint): Likewise.
	(unary_convert): Fix typo in comment.
	(unary_convert_narrowt_def, unary_convert_narrowt): New shape.
	(unary_long_def, unary_long): Likewise.
	(unary_narrowb_def, unary_narrowb): Likewise.
	(unary_narrowt_def, unary_narrowt): Likewise.
	(unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
	(unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
	(unary_to_int_def, unary_to_int): Likewise.
	* config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
	(unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
	(svasrd_impl): Delete.
	(svcadd_impl::expand): Handle integer operations too.
	(svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
	new functions to derive the unspec numbers.
	(svmla_svmls_lane_impl): Replace with...
	(svmla_lane_impl, svmls_lane_impl): ...these new classes.  Handle
	integer operations too.
	(svwhile_impl): Rename to...
	(svwhilelx_impl): ...this and inherit from while_comparison.
	(svasrd): Use unspec_based_function.
	(svmla_lane): Use svmla_lane_impl.
	(svmls_lane): Use svmls_lane_impl.
	(svrecpe, svrsqrte): Handle unsigned integer operations too.
	(svwhilele, svwhilelt): Use svwhilelx_impl.
	* config/aarch64/aarch64-sve-builtins-sve2.h: New file.
	* config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
	* config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
	* config/aarch64/aarch64-sve-builtins.def: Include
	aarch64-sve-builtins-sve2.def.

gcc/testsuite/
	* g++.target/aarch64/sve/acle/general-c++/mul_lane_1.c: New test.
	* g++.target/aarch64/sve2/acle: New directory.
	* gcc.target/aarch64/pragma_cpp_predefs_3.c: New test.
	* gcc.target/aarch64/sve/acle/asm/test_sve_acle.h (TEST_TYPE_CHANGE_Z)
	(TEST_DUAL_ZD, TEST_TYPE_CHANGE_ZX, TEST_TBL2, TEST_TBL2_REV): New
	macros.
	* gcc.target/aarch64/sve/acle/general-c/binary_lane_1.c: Do not
	expect an error saying that the function has no f32 form, but instead
	expect an error about SVE2 being required if the current target
	doesn't support SVE2.
	* gcc.target/aarch64/sve/acle/general-c/ternary_lane_1.c: Likewise.
	* gcc.target/aarch64/sve/acle/general-c/ternary_lane_rotate_1.c Likewise.
	* gcc.target/aarch64/sve/acle/general-c/binary_long_lane_1.c,
	* gcc.target/aarch64/sve/acle/general-c/binary_long_opt_n_1.c,
	* gcc.target/aarch64/sve/acle/general-c/binary_narrowb_opt_n_1.c,
	* gcc.target/aarch64/sve/acle/general-c/binary_narrowt_opt_n_1.c,
	* gcc.target/aarch64/sve/acle/general-c/binary_to_uint_1.c,
	* gcc.target/aarch64/sve/acle/general-c/binary_wide_1.c,
	* gcc.target/aarch64/sve/acle/general-c/binary_wide_opt_n_1.c,
	* gcc.target/aarch64/sve/acle/general-c/compare_1.c,
	* gcc.target/aarch64/sve/acle/general-c/compare_ptr_1.c,
	* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_index_restricted_1.c,
	* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_1.c,
	* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_2.c,
	* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_3.c,
	* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_4.c,
	* gcc.target/aarch64/sve/acle/general-c/load_gather_sv_restricted_1.c,
	* gcc.target/aarch64/sve/acle/general-c/load_gather_sv_restricted_2.c,
	* gcc.target/aarch64/sve/acle/general-c/mul_lane_1.c,
	* gcc.target/aarch64/sve/acle/general-c/shift_left_imm_long_1.c,
	* gcc.target/aarch64/sve/acle/general-c/shift_left_imm_to_uint_1.c,
	* gcc.target/aarch64/sve/acle/general-c/shift_left_imm_to_uint_2.c,
	* gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowb_1.c,
	* gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowb_to_uint_1.c,
	* gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowt_1.c,
	* gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowt_to_uint_1.c,
	* gcc.target/aarch64/sve/acle/general-c/store_scatter_index_restricted_1.c,
	* gcc.target/aarch64/sve/acle/general-c/store_scatter_offset_restricted_1.c,
	* gcc.target/aarch64/sve/acle/general-c/tbl_tuple_1.c,
	* gcc.target/aarch64/sve/acle/general-c/ternary_long_lane_1.c,
	* gcc.target/aarch64/sve/acle/general-c/ternary_long_opt_n_1.c,
	* gcc.target/aarch64/sve/acle/general-c/ternary_qq_lane_rotate_1.c,
	* gcc.target/aarch64/sve/acle/general-c/ternary_qq_rotate_1.c,
	* gcc.target/aarch64/sve/acle/general-c/ternary_shift_right_imm_1.c,
	* gcc.target/aarch64/sve/acle/general-c/ternary_uint_1.c,
	* gcc.target/aarch64/sve/acle/general-c/unary_convert_narrowt_1.c,
	* gcc.target/aarch64/sve/acle/general-c/unary_narrowb_1.c,
	* gcc.target/aarch64/sve/acle/general-c/unary_narrowb_to_uint_1.c,
	* gcc.target/aarch64/sve/acle/general-c/unary_narrowt_1.c,
	* gcc.target/aarch64/sve/acle/general-c/unary_narrowt_to_uint_1.c,
	* gcc.target/aarch64/sve/acle/general-c/unary_to_int_1.c: New tests.
	* gcc.target/aarch64/sve2/bcax_1.c: Likewise.
	* gcc.target/aarch64/sve2/acle: New directory.

From-SVN: r280060

It helps the SVE2 ACLE support if aarch64_sve_arith_immediate_p and
aarch64_sve_sqadd_sqsub_immediate_p accept scalars as well as vectors.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
	(aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
	* config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
	(aarch64_sve_sqadd_sqsub_immediate_p): Likewise.  Handle scalar
	immediates as well as vector ones.
	* config/aarch64/predicates.md (aarch64_sve_arith_immediate)
	(aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
	(aarch64_sve_qsub_immediate): Update calls accordingly.

From-SVN: r280059

This patch imposes the same sort of structure on aarch64-sve2.md
as we already have for aarch64-sve.md, before it grows a lot more
patterns.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve2.md: Add banner comments.
	(<su>mulh<r>s<mode>3): Move further up file.
	(<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
	(*aarch64_sve2_sra<mode>): Move further down file.
	* config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.

From-SVN: r280058

    
    Localizing names in export data causes the compiler output to change
    depending on the LANG environment variable, so don't do it.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/214038

From-SVN: r280057

    
    Adding composite literal keys to package bindings gets confusing when
    it is combined with dot imports.  The test case showing the resulting
    compilation failure is https://golang.org/cl/213899.
    
    Fix this by adding a new expression type to hold composite literal keys.
    We shouldn't see it during lowering if it is a struct field name,
    because Composite_literal_expression::do_traverse skips struct field names.
    Or, it should, but that didn't quite work with pointer types so it had to
    be tweaked.
    
    This lets us remove the code that recorded whether an Unknown_expression
    is a composite literal key.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/214017

From-SVN: r280056

2020-01-09  Kwok Cheung Yeung  <kcy@codesourcery.com>

	libgcc/
	* config/gcn/atomic.c: New.
	* config/gcn/t-amdgcn (LIB2ADD): Add atomic.c.

From-SVN: r280055

I'd made WHILERW and WHILEWR use separate patterns from the SVE
WHILE instructions, but they're similar enough that we can use
a single pattern.  This means that we also get the flag-related
patterns "for free".

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
	and UNSPEC_WHILEWR.
	(while_optab_cmp): Handle them.
	* config/aarch64/aarch64-sve.md
	(*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
	and add a "@" marker.
	* config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
	instead of gen_aarch64_sve2_while_ptest.
	(@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.

From-SVN: r280054

The UNSPEC_WHILE*s had an underscore before the condition code,
whereas almost all other SVE unspecs are taken directly from
the mnemonic.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
	(UNSPEC_WHILELE): ...this.
	(UNSPEC_WHILE_LO): Rename to...
	(UNSPEC_WHILELO): ...this.
	(UNSPEC_WHILE_LS): Rename to...
	(UNSPEC_WHILELS): ...this.
	(UNSPEC_WHILE_LT): Rename to...
	(UNSPEC_WHILELT): ...this.
	* config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
	(cmp_op, while_optab_cmp): Likewise.
	* config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
	* config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
	(svwhilelt): Likewise.

From-SVN: r280053

The SVE ACLE shape names use "_int" and "_uint" for arguments that are
signed-integer or unsigned-integer variants of the main vector type.
With SVE2 this variation also becomes common for return values,
which the main SVE2 patch handles using "_to_int" and "_to_uint".
This patch renames the existing unary_count shape to match the
new scheme.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
	(unary_to_uint): Define.
	* config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
	(unary_count): Rename to...
	(unary_to_uint_def, unary_to_uint): ...this.
	* config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.

gcc/testsuite/
	* gcc.target/aarch64/sve/acle/general-c/unary_count_1.c: Rename to...
	* gcc.target/aarch64/sve/acle/general-c/unary_to_uint_1.c: ...this.
	* gcc.target/aarch64/sve/acle/general-c/unary_count_2.c: Rename to...
	* gcc.target/aarch64/sve/acle/general-c/unary_to_uint_2.c: ...this.
	* gcc.target/aarch64/sve/acle/general-c/unary_count_3.c: Rename to...
	* gcc.target/aarch64/sve/acle/general-c/unary_to_uint_3.c: ...this.

From-SVN: r280052

This patch generalises some boilerplate that becomes much more
common with SVE2 intrinsics.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve-builtins-functions.h
	(code_for_mode_function): New class.
	(CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
	* config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
	(svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
	(svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
	(svmul_lane, svtmad): Use CODE_FOR_MODE0.

From-SVN: r280051

The pattern:

;; <su>q<addsub>

(define_insn "aarch64_<su_optab><optab><mode>"
  [(set (match_operand:VSDQ_I 0 "register_operand" "=w")
	(BINQOPS:VSDQ_I (match_operand:VSDQ_I 1 "register_operand" "w")
			  (match_operand:VSDQ_I 2 "register_operand" "w")))]
  "TARGET_SIMD"
  "<su_optab><optab>\\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>"
  [(set_attr "type" "neon_<optab><q>")]
)

meant that we overloaded "optab" to be "qadd" for both SQADD and
UQADD.  Most other "optab" entries are instead the full optab name,
which for these patterns would be "ssadd" and "usadd" respectively.
(Unfortunately, the optabs don't extend to vectors yet, something
that would be good to fix in GCC 11.)

This patch therefore does what the comment implies and uses
q<addsub> to distinguish qadd and qsub instead.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (addsub): New code attribute.
	* config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
	Re-express as...
	(aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
	in the asm string and attributes.  Fix indentation.
	* config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
	Re-express as...
	(@aarch64_sve_<optab><mode>): ...this.
	* config/aarch64/aarch64-sve-builtins.h
	(function_expander::expand_signed_unpred_op): Delete.
	* config/aarch64/aarch64-sve-builtins.cc
	(function_expander::expand_signed_unpred_op): Likewise.
	(function_expander::map_to_rtx_codes): If the optab isn't defined,
	try using code_for_aarch64_sve instead.
	* config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
	(svqsub_impl): Likewise.
	(svqadd, svqsub): Use rtx_code_function instead.

From-SVN: r280050

We've had skeleton support for "SRHSUB" and "URHSUB" since the initial
commit of the port, but no such instructions exist.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
	(HADDSUB, sur, addsub): Remove them.

From-SVN: r280049