2017-06-01  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        * config/i386/i386.c (x86_64_ms_sysv_extra_clobbered_registers): Make
        static.
        (xlogue_layout::get_stack_space_used, xlogue_layout::s_instances,
        xlogue_layout::get_instance, logue_layout::xlogue_layout,
        sp_valid_at, fp_valid_at, choose_basereg): Formatting.
        (xlogue_layout::get_stub_rtx): Make static.
        (xlogue_layout::get_stub_name): Avoid const-cast, make static.
        (xlogue_layout::compute_stub_managed_regs): Rename to...
        (xlogue_layout::count_stub_managed_regs): ...this.
        (xlogue_layout::is_stub_managed_reg): New function.
        (xlogue_layout::m_stub_names): Rename to...
        (xlogue_layout::s_stub_names): ...this, make static.
        (xlogue_layout::STUB_INDEX_OFFSET, xlogue_layout::MIN_REGS,
        xlogue_layout::MAX_REGS, xlogue_layout::MAX_EXTRA_REGS,
        xlogue_layout::VARIANT_COUNT, xlogue_layout::STUB_NAME_MAX_LEN,
        xlogue_layout::s_stub_names): Instantiate statics.
        (stub_managed_regs): Remove.
        (ix86_save_reg): Use xlogue_layout::compute_stub_managed_regs.
        (disable_call_ms2sysv_xlogues): Rename to...
        (warn_once_call_ms2sysv_xlogues): ...this, and warn only once.
        (ix86_initial_elimination_offset, ix86_expand_call): Fix call_ms2sysv
        warning logic.
        (ix86_static_chain): Make sure that ix86_static_chain_on_stack can't
        change after reload_completed.
        (ix86_can_use_return_insn_p): Use the ix86_frame data structure
        directly.
        (ix86_expand_prologue): Likewise.
        (ix86_expand_epilogue): Likewise.
        (ix86_expand_split_stack_prologue): Likewise.
        (ix86_compute_frame_layout): Remove frame parameter ...
        (TARGET_COMPUTE_FRAME_LAYOUT): ... and export it as a target hook.
        (ix86_finalize_stack_realign_flags): Call ix86_compute_frame_layout
        only if necessary.
        (ix86_init_machine_status): Don't set use_fast_prologue_epilogue_nregs.
        (ix86_frame): Move from here ...
        * config/i386/i386.h (ix86_frame): ... to here.
        (machine_function): Remove use_fast_prologue_epilogue_nregs, cache the
        complete ix86_frame data structure instead.  Remove some_ld_name.

From-SVN: r248798

In GNAT, we materialize renamings that cannot be described in standard
DWARF as synthetic variables that describe how to fetch the renamed
object.  Look for "___XR" in gcc/ada/exp_dbug.ads for more details about
this convention.

In order to have a location for these variables in the debug info (GDB
requires it not to discard the variable) but also to avoid allocating
runtime space for them, we make these variable hold a DECL_VALUE_EXPR
tree.  However, since GCC 7, the DWARF back-end no longer generates a
DW_AT_location attribute for those.  This patch is an attempt to restore
this attribute.

gcc/

	* dwarf2out.c (dwarf2out_late_global_decl): Add locations for
	symbols that hold a DECL_VALUE_EXPR.

gcc/testsuite/

	* debug12.adb, debug12.ads: New testcase.

From-SVN: r248792

	(GLIBCXX_CROSSCONFIG): Handle *-solaris* like *-linux* etc.
	Remove *-solaris* section.
	* configure: Regenerate.

From-SVN: r248791

2017-06-01  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/80898
	* tree-sra.c (process_subtree_disqualification): Removed.
	(disqualify_candidate): Do not acll
	process_subtree_disqualification.
	(subtree_mark_written_and_enqueue): New function.
	(propagate_all_subaccesses): Set grp_write of LHS subtree if the
	RHS has been disqualified and re-queue LHS if necessary.  Apart
	from that, ignore disqualified RHS.

testsuite/
	* gcc.dg/tree-ssa/pr80898.c: New test.
	* gcc.dg/tree-ssa/pr80898-2.c: Likewise.

From-SVN: r248790

We used to load the return address slot some time in advance.  This
helped on older machines to resolve the data dependencies in time.
However, it is pointless on out of order CPUs.  Disabled with that
patch.

gcc/ChangeLog:

2017-06-01  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/s390.c (s390_emit_epilogue): Disable early return
	address fetch for z10 or later.

From-SVN: r248789

PR c++/80812

cp/

PR c++/80812
* method.c (constructible_expr): Strip array types before calling
build_value_init.

libstdc++/

PR c++/80812
* testsuite/20_util/is_constructible/80812.cc: New.

From-SVN: r248788

	PR ada/80921
	* configure.ac (default_gnatlib_target): Remove bogus condition.
	(have_getipinfo): Tweak.
	* configure: Regenerate.

From-SVN: r248785

/cp
2017-06-01  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/80896
	* cvt.c (convert_to_void): Possibly call maybe_warn_nodiscard
	for case INDIRECT_REF too in the main switch.

/testsuite
2017-06-01  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/80896
	* g++.dg/cpp1z/nodiscard5.C: New.

From-SVN: r248784

The tst_movb pattern is missing guarding when spitting.

gcc/
2017-06-01  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (tst_movb): Add guard when splitting.

testsuite/
2017-06-01  Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/pr9001195952.c: New test.

From-SVN: r248783

arc_can_eliminate is using arc_frmae_pointer_required() which is wrong
as the frame_pointer_needed can be set on different conditions. Fix it
by calling arc_frame_pointer_needed().

gcc/
2017-06-01  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (arc_can_eliminate): Test against
	arc_frame_pointer_needed.

From-SVN: r248782

If the stack pointer is needed, emit a special barrier that will prevent
the scheduler from moving stores to the frame before the stack adjustment.

For example:

[snip]
	mov_s	fp,sp 	; frame pointer is set here
[snip]
	st	r1,[fp,-24]	; frame pointer is used here
[snip]
	sub_s	sp,sp,0x20	; stack pointer adjusted

So we can easily see that any interrupt between the `st` and `sub`
instruction will lead to faulty code as the interrupt routine will use
a faulty sp register, and, potentially, overwriting the value stored
by 'st' instruction. Thus, adding a scheduler barrier will force the
compiler to emit the `sub` instruction before the store one.

2017-06-01  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (arc_expand_prologue): Emit a special barrier
	to prevent store reordering.
	* config/arc/arc.md (UNSPEC_ARC_STKTIE): Define.
	(type): Add block type.
	(stack_tie): Define special instruction to be used in
	expand_prologue.

From-SVN: r248781

gcc/
2017-06-01  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (commutative_binary_comparison): Remove 'I'
	constraint. It is not valid for the pattern.
	(noncommutative_binary_comparison): Likewise.

From-SVN: r248780

2017-06-01  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/simdext.md (movv2hi_insn): Change predicate to avoid
	scaled addresses.

From-SVN: r248779

gcc/
2018-06-01  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (arc_conditional_register_usage): Allow r30 to
	be used by the reg-alloc.

From-SVN: r248778

gcc/
2017-06-01  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (mulsi3): Avoid use of hard registers before
	reg-alloc when having mul64 or mul32x16 instructions.
	(mulsidi3): Likewise.
	(umulsidi3): Likewise.
	(mulsi32x16): New pattern.
	(mulsi64): Likewise.
	(mulsidi64): Likewise.
	(umulsidi64): Likewise.
	(MUL32x16_REG): Define.
	(mul64_600): Use MUL32x16_REG.
	(mac64_600): Likewise.
	(umul64_600): Likewise.
	(umac64_600): Likewise.

From-SVN: r248777

gcc/
2017-06-01  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (mulsi3_700): Make it commutative.

From-SVN: r248776

2017-06-01  Tom de Vries  <tom@codesourcery.com>

	* c-c++-common/pr43395.c: Add dg-require-effective-target label_values.
	* gcc.c-torture/compile/asmgoto-1.c: Same.
	* gcc.dg/20000707-1.c: Same.
	* gcc.dg/pr38700.c: Same.
	* gcc.dg/pr70169.c: Same.
	* gcc.dg/pr80112.c: Same.
	* gcc.dg/torture/pr51071-2.c: Same.
	* gcc.dg/torture/pr51071.c: Same.
	* gcc.dg/tree-ssa/alias-34.c: Same.

From-SVN: r248775

gcc/ChangeLog:
	* config/sparc/sparc.md (*zero_extendsidi2_insn_sp64): Set insn
	type for movstouw.
	(*sign_extendsidi2_insn): Likewise for movstosw.

From-SVN: r248774

In Ada, the Character type is supposed to be unsigned.  However,
depending on the sign of C char types, GNAT can materialize it as a
signed type for code generation purposes.  When this is the case, GNAT
also attach a debug type to it so it is represented as an unsigned base
type in the debug information.

This change adapts record variant parts processing in the DWARF back-end
so that when the debug type of discriminant is unsigned while
discriminant values are signed themselves, we output unsigned
discriminant values in DWARF.

gcc/

	* dwarf2out.c (get_discr_value): Call the get_debug_type hook on
	the type of the input discriminant value.  Convert the
	discriminant value of signedness vary.

gcc/testsuite/

	* gnat.dg/debug11.adb: New testcase.

From-SVN: r248773

        * c.opt (Wcatch-value): New shortcut for Wcatch-value=1.
        (Wcatch-value=1): Enable by -Wall.

        * doc/invoke.texi (-Wcatch-value): Document new shortcut.
        Add to -Wall section.

From-SVN: r248772

2017-06-01  Richard Biener  <rguenther@suse.de>

	PR middle-end/66313
	* fold-const.c (fold_plusminus_mult_expr): If the factored
	factor may be zero use a wrapping type for the inner operation.
	* tree-tailcall.c (independent_of_stmt_p): Pass in to_move bitmap
	and handle moved defs.
	(process_assignment): Properly guard the unary op case.  Return a
	tri-state indicating that moving the stmt before the call may allow
	to continue.  Pass through to_move.
	(find_tail_calls): Handle moving unrelated defs before
	the call.

	* c-c++-common/ubsan/pr66313.c: New testcase.
	* gcc.dg/tree-ssa/loop-15.c: Adjust.

From-SVN: r248771

From-SVN: r248770

when compiling --with-cpu=power6.

2017-05-31  Steven Munroe  <munroesj@gcc.gnu.org>

	* gcc.target/powerpc/bmi2-pdep32-1.c: Add -mcpu=power7 to
        dg-options.  Change dg-require-effective-target powerpc_vsx_ok
        to vsx_hw.  Add dg-skip-if directive to disable this test if
	-mcpu overridden.
	* gcc.target/powerpc/bmi2-pdep64-1.c: Likewise.
	* gcc.target/powerpc/bmi2-pext32-1.c: Likewise.
	* gcc.target/powerpc/bmi2-pext64-1.c: Likewise.
	* gcc.target/powerpc/bmi2-pext64-1a.c: Add -mcpu=power7
	to dg-option.  Add dg-skip-if directive to disable this test
	for darwin.  Add dg-skip-if directive to disable this test if
	-mcpu overridden.

From-SVN: r248766

    
    Fix lfstack code to work with sparc64 GNU/Linux address map.
    
    Force alignment of epollevent.  To make this work reliably, pass
    GOARCH explicitly to mkrsysinfo.sh.
    
    Patch by Vladimir Mezentsev.
    
    Reviewed-on: https://go-review.googlesource.com/44494

From-SVN: r248765

	PR target/80618
	* config/rs6000/vector.md (*vector_uneq<mode>): Write the nor in the
	splitter result in the canonical way.

From-SVN: r248764

The canonical RTL for "nor" is (and (not ()) (not ())), and that is
indeed what we use in boolccv2df3_internal1.  So, the splitter for
*vector_uneq<mode> should use that form, not (not (ior () ())), which
does not match any pattern.


	PR target/80618
	* config/rs6000/rs6000.md (*vector_uneq<mode>): Write the nor in the
	splitter result in the canonical way.

From-SVN: r248763

	* config/i386/i386.md (*zero_extendsidi2): Enable alternative (?r, *Yj)
	also for 32bit target.  Update insn attributes.
	(zero-extendsidi2 splitter): Allow all registers for operand 1.

From-SVN: r248757

        (_mm_maskz_max_sd, _mm_mask_max_ss, _mm_maskz_max_ss)
        (_mm_mask_min_sd, _mm_maskz_min_sd, _mm_mask_min_ss)
        (_mm_maskz_min_ss): New intrinsics.

testsuite/ChangeLog:

	* gcc.target/i386/avx512f-vmaxsd-1.c (_mm_mask_max_sd)
	(_mm_maskz_max_sd): Test new intrinsics.
	* gcc.target/i386/avx512f-vmaxsd-2.c (_mm_mask_max_sd)
	(_mm_maskz_max_sd): Test new intrinsics.
	* gcc.target/i386/avx512f-vmaxss-1.c (_mm_mask_max_ss)
	(_mm_maskz_max_ss): Test new intrinsics.
	* gcc.target/i386/avx512f-vmaxss-2.c (_mm_mask_max_ss)
	(_mm_maskz_max_ss): Test new intrinsics.
	* gcc.target/i386/avx512f-vminsd-1.c (_mm_mask_min_sd)
	(_mm_maskz_min_sd): Test new intrinsics.
	* gcc.target/i386/avx512f-vminsd-2.c (_mm_mask_min_sd)
	(_mm_maskz_min_sd): Test new intrinsics.
	* gcc.target/i386/avx512f-vminss-1.c (_mm_mask_min_ss)
	(_mm_maskz_min_ss): Test new intrinsics.
	* gcc.target/i386/avx512f-vminss-2.c (_mm_mask_min_ss)
	(_mm_maskz_min_ss): Test new intrinsics.

From-SVN: r248756

	* pt.c (convert_nontype_argument): Don't test whether a decl is
	value-dependent when binding to a reference.

From-SVN: r248749

	* cp-tree.h (lang_decl_slector): New enum.
	(lang_decl_base): Make selector an enum.  Drop decomposition_p
	field.
	(lang_decl): Use enum for discrimination.
	(LANG_DECL_FN_CHECK, LANG_DECL_NS_CHECK, LANG_DECL_PARM_CHECK,
	LANG_DECL_DEOMP_CHECK): Use enum.
	(DECL_DECOMPOSITION_P): Use selector value.
	(SET_DECL_DECOMPOSITION_P): Delete.
	(retrofit_lang_decl): Lose SEL parm.
	(fit_decomposition_lang_decl): Declare.
	* decl.c (cp_finish_decomp, grokdeclarator): Use
	fit_decomposition_lang_decl.
	* lex.c (maybe_add_lang_decl_raw): New. Broken out of
	retrofit_lang_decl.
	(set_decl_linkage): New.  Broken out of retrofit_lang_decl.  Use
	enum.
	(fit_decomposition_lang_decl): Likewise.
	(retrofit_lang_decl): Use worker functions.
	(cxx_dup_lang_specific_decl): Use selector enum.
	(maybe_add_lang_type_raw): New.  Broken out of ...
	(cxx_make_type_name): ... here.  Call it.

From-SVN: r248748

From-SVN: r248747

	gcc/testsuite
	* gcc.dg/tree-ssa/ivopt_mult_4.c: Explicitly check comparison
	on pointer should not be replaced.

From-SVN: r248746

2017-05-31  Martin Liska  <mliska@suse.cz>

	* filter_params.py:
	Transform ENUM_BITFIELD and comments starting with '/**'

From-SVN: r248741

2017-05-31  Martin Liska  <mliska@suse.cz>

	* tree-vect-loop.c (vect_create_epilog_for_reduction):
	Change comment style to one we normally use.
	(vectorizable_reduction): Likewise.
	(vectorizable_induction): Likewise.
	* tree-vect-stmts.c (vectorizable_mask_load_store): Likewise.
	(vectorizable_call): Likewise.
	(vectorizable_simd_clone_call): Likewise.
	(vectorizable_conversion): Likewise.
	(vectorizable_assignment): Likewise.
	(vectorizable_shift): Likewise.
	(vectorizable_operation): Likewise.
	(vectorizable_store): Likewise.
	(vectorizable_load): Likewise.
	* tree-vectorizer.h: Likewise.

From-SVN: r248740

2017-05-31  David Malcolm  <dmalcolm@redhat.com>
	    Martin Liska  <mliska@suse.cz>

	* filter_params.py: New, porting the perl script to python,
	adding a test suite.
	* filter_gcc_for_doxygen_new: New file.

Co-Authored-By: Martin Liska <mliska@suse.cz>

From-SVN: r248739

gcc/c/

	PR testsuite/80580
	* gimple-parser.c (c_parser_gimple_if_stmt): Check for empty labels.

gcc/testsuite/

	PR testsuite/80580
	* gcc.dg/gimplefe-error-7.c: New test.

From-SVN: r248738

2017-05-31  Martin Liska  <mliska@suse.cz>

	* configure.ac: Add handling of stage2_werror_flags to
	action-if-given and to action-if-not-given.
	* configure: Regenerate.

From-SVN: r248737

	* passes.c (emergency_dump_function): New.
	* tree-pass.h (emergency_dump_function): Declare.
	* plugin.c (plugins_internal_error_function): Remove.
	* plugin.h (plugins_internal_error_function): Remove declaration.
	* toplev.c (internal_error_function): New static function.  Use it...
	(general_init): ...here.

From-SVN: r248736

Since the combine pass canonicalises shift-add insns using plus and
ashift (as opposed to plus and mult which it previously used to do), it
no longer creates *add_n or *sub_n insns, as the patterns match plus and
mult only. The outcome of this is that some opportunities to generate
add{1,2,3} and sub{1,2,3} instructions are missed.

This change adds additional *add_n and *sub_n insns that match the
plus-ashift pattern. The original *add_n and *sub_n insns are still left
in, as they are sometimes generated later on by constant propagation.
The idea of adding these insns is modelled on the changes in:

  https://gcc.gnu.org/ml/gcc-patches/2015-05/msg01882.html

which addresses a similar issue for the PA target.

For the small test cases that are added, even if the combine pass misses
the opportunity to generate addN or subN, constant propagation manages
to do so, so the rtl of the combine pass is checked.

gcc/ChangeLog:

        * config/arc/arc.c (arc_print_operand): Handle constant operands.
        (arc_rtx_costs): Add costs for new patterns.
        * config/arc/arc.md: Additional *add_n and *sub_n patterns.
        * config/arc/predicates.md: Add _1_2_3_operand predicate.

gcc/testsuite/ChangeLog:

        * gcc.target/arc/add_n-combine.c: New test.
        * gcc.target/arc/sub_n-combine.c: New test.

From-SVN: r248735

	PR libstdc++/80893
	* include/bits/stl_bvector.h (vector<bool>::_M_initialize): Avoid
	null pointer dereference when size is zero.
	* testsuite/23_containers/vector/bool/80893.cc: New.
	* testsuite/util/testsuite_allocator.h (PointerBase::PointerBase):
	Add non-explicit constructor from nullptr.
	(PointerBase::derived() const): Add const-qualified overload.

From-SVN: r248734