2017-07-28  Martin Liska  <mliska@suse.cz>

	PR sanitizer/81460
	* sanopt.c (sanitize_rewrite_addressable_params): Do not rewrite
	parameters that are of a variable-length.
2017-07-28  Martin Liska  <mliska@suse.cz>

	PR sanitizer/81460
	* gcc.dg/asan/pr81460.c: New test.

From-SVN: r250655

Add 64-bit support for RTEMS using the ELFv2 ABI with 64-bit long
double.

gcc/
	* config.gcc (powerpc-*-rtems*): Remove rs6000/eabi.h.  Add
	rs6000/biarch64.h.
	* config/rs6000/rtems.h (ASM_DECLARE_FUNCTION_SIZE): New macro.
	(ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
	(CRT_CALL_STATIC_FUNCTION): Likewise.
	(ASM_DEFAULT_SPEC): New define.
	(ASM_SPEC32): Likewise.
	(ASM_SPEC64): Likewise.
	(ASM_SPEC_COMMON): Likewise.
	(ASM_SPEC): Likewise.
	(INVALID_64BIT): Likewise.
	(LINK_OS_DEFAULT_SPEC): Likewise.
	(LINK_OS_SPEC32): Likewise.
	(LINK_OS_SPEC64): Likewise.
	(POWERPC_LINUX): Likewise.
	(PTRDIFF_TYPE): Likewise.
	(RESTORE_FP_PREFIX): Likewise.
	(RESTORE_FP_SUFFIX): Likewise.
	(SAVE_FP_PREFIX): Likewise.
	(SAVE_FP_SUFFIX): Likewise.
	(SIZE_TYPE): Likewise.
	(SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise.
	(TARGET_64BIT): Likewise.
	(TARGET_64BIT): Likewise.
	(TARGET_AIX): Likewise.
	(WCHAR_TYPE_SIZE): Likewise.
	(WCHAR_TYPE): Undefine.
	(TARGET_OS_CPP_BUILTINS): Add 64-bit PowerPC defines.
	(CPP_OS_DEFAULT_SPEC): Use previous CPP_OS_RTEMS_SPEC.
	(CPP_OS_RTEMS_SPEC): Delete.
	(SUBSUBTARGET_EXTRA_SPECS): Remove cpp_os_rtems.  Add
	asm_spec_common, asm_spec32, asm_spec64, link_os_spec32, and
	link_os_spec64.
	* config/rs6000/t-rtems: Add mcpu=e6500/m64 multilibs.

libgcc/
	* config/rs6000/ibm-ldouble.c: Disable if defined __rtems__.

From-SVN: r250652

	PR tree-optimization/81578
	* tree-parloops.c (build_new_reduction): Bail out if
	reduction_code isn't one of the standard OpenMP reductions.
	Move the details printing after that decision.

	* gcc.dg/pr81578.c: New test.

From-SVN: r250651

2017-07-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/81573
	* gcc.dg/torture/pr81573.c: Explicitely use signed char.

From-SVN: r250650

	* go-backend.c (go_write_export_data): Use EXCLUDE section for
	AIX.

From-SVN: r250648

From-SVN: r250647

	* config/rs6000/predicates.md (volatile_mem_operand): Remove code
	related to reload_in_progress.
	(splat_input_operand): Likewise.
	* config/rs6000/rs6000-protos.h (rs6000_secondary_memory_needed_rtx):
	Delete prototype.
	* config/rs6000/rs6000.c (machine_function): Remove sdmode_stack_slot
	field.
	(TARGET_EXPAND_TO_RTL_HOOK): Delete.
	(TARGET_INSTANTIATE_DECLS): Likewise.
	(legitimate_indexed_address_p): Delete reload_in_progress code.
	(rs6000_debug_legitimate_address_p): Likewise.
	(rs6000_eliminate_indexed_memrefs): Likewise.
	(rs6000_emit_le_vsx_store): Likewise.
	(rs6000_emit_move_si_sf_subreg): Likewise.
	(rs6000_emit_move): Likewise.
	(register_to_reg_type): Likewise.
	(rs6000_pre_atomic_barrier): Likewise.
	(rs6000_machopic_legitimize_pic_address): Likewise.
	(rs6000_allocate_stack_temp): Likewise.
	(rs6000_address_for_fpconvert): Likewise.
	(rs6000_address_for_altivec): Likewise.
	(rs6000_secondary_memory_needed_rtx): Delete function.
	(rs6000_check_sdmode): Likewise.
	(rs6000_alloc_sdmode_stack_slot): Likewise.
	(rs6000_instantiate_decls): Likewise.
	* config/rs6000/rs6000.h (SECONDARY_MEMORY_NEEDED_RTX): Delete.
	* config/rs6000/rs6000.md (splitter for *movsi_got_internal):
	Delete reload_in_progress.
	(*vec_reload_and_plus_<mptrsize>): Likewise.
	* config/rs6000/vsx.md (vsx_mul_v2di): Likewise.
	(vsx_div_v2di): Likewise.
	(vsx_udiv_v2di): Likewise.

From-SVN: r250638

gcc/

	* config/rs6000/rs6000.opt (mlra): Replace with stub.
	* config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Delete OPTION_MASK_LRA.
	* config/rs6000/rs6000.c (TARGET_LRA_P): Delete.
	(rs6000_debug_reg_global): Delete print of LRA status.
	(rs6000_option_override_internal): Delete dead LRA related code.
	(rs6000_lra_p): Delete function.
	* doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mlra.

gcc/testsuite/

	* g++.dg/pr69667.C: Remove option -mlra.
	* gcc.target/powerpc/dform-1.c: Likewise.
	* gcc.target/powerpc/dform-2.c: Likewise.
	* gcc.target/powerpc/dform-3.c: Likewise.
	* gcc.target/powerpc/p8vector-int128-1.c: Likewise.
	* gcc.target/powerpc/p9-vparity.c: Likewise.
	* gcc.target/powerpc/pr63491.c: Likewise.
	* gcc.target/powerpc/pr67808.c: Likewise.
	* gcc.target/powerpc/pr68805.c: Likewise.
	* gcc.target/powerpc/pr69461.c: Likewise.
	* gcc.target/powerpc/pr71680.c: Likewise.
	* gcc.target/powerpc/pr77289.c: Likewise.
	* gcc.target/powerpc/pr78458.c: Likewise.
	* gcc.target/powerpc/pr78543.c: Likewise.
	* g++.dg/pr71294.C: Remove option -mno-lra.
	* gcc.target/powerpc/pr71656-1.c: Likewise.
	* gcc.target/powerpc/pr71656-2.c: Likewise.
	* gcc.target/powerpc/pr71698.c: Likewise.

From-SVN: r250637

	PR c/45784
	* c-omp.c (c_finish_omp_for): If the condition is wrapped in
	rhs of COMPOUND_EXPR(s), skip them and readd their lhs into
	new COMPOUND_EXPRs around the rhs of the comparison.

	* testsuite/libgomp.c/pr45784.c: New test.
	* testsuite/libgomp.c++/pr45784.C: New test.

From-SVN: r250635

gcc/ChangeLog

2017-07-27  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config.gcc (riscv*-*-elf*): Add (riscv*-*-rtems*).
	* config/riscv/rtems.h: New file.

From-SVN: r250632

During combine GCC tries to merge CMP (with zero) and AND into a TST. However,
in cases where an ANDS operand is not compatible, this was being missed. Adding
a define_split where this operand was moved to a register seems to help out. 

Committed on behalf of Sudi Das

---
gcc/

2017-07-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
	    Sudakshina Das  <sudi.das@arm.com>

	* config/aarch64/aarch64.md
	(define_split for and<mode>3nr_compare): Move
	non aarch64_logical_operand to a register.
	(define_split for and_<SHIFT:optab><mode>3nr_compare0): Move non
	register immediate operand to a register.
	* config/aarch64/predicates.md (aarch64_mov_imm_operand): New.

gcc/testsuite
    
2017-07-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
	    Sudakshina Das  <sudi.das@arm.com>

	* gcc.target/aarch64/tst_imm_split_1.c: New Test.


Co-Authored-By: Sudakshina Das <sudi.das@arm.com>

From-SVN: r250631

	PR c/81417
	* c-warn.c (warn_for_sign_compare): Tweak the warning message.  Print
	the types.

	* c-c++-common/Wsign-compare-1.c: New test.
	* g++.dg/warn/Wsign-compare-2.C: Update dg-warning.
	* g++.dg/warn/Wsign-compare-4.C: Likewise.
	* g++.dg/warn/Wsign-compare-6.C: Likewise.
	* g++.dg/warn/compare1.C: Likewise.
	* gcc.dg/compare1.c: Likewise.
	* gcc.dg/compare2.c: Likewise.
	* gcc.dg/compare4.c: Likewise.
	* gcc.dg/compare5.c: Likewise.
	* gcc.dg/pr35430.c: Likewise.
	* gcc.dg/pr60087.c: Likewise.

From-SVN: r250630

gcc/
	PR middle-end/81564
	* tree-cfg.c (group_case_labels_stmt): Handle already deleted blocks.

gcc/testsuite/
	PR middle-end/81564
	* gcc.dg/pr81564.c: New test.

From-SVN: r250628

2017-07-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/81573
	PR tree-optimization/81494
	* tree-vect-loop.c (vect_create_epilog_for_reduction): Handle
	multi defuse cycle case.

	* gcc.dg/torture/pr81573.c: New testcase.

From-SVN: r250627

re PR tree-optimization/81571 (ICE at -O3 in both 32-bit and 64-bit modes (internal compiler error: in as_a, at is-a.h:192))

2017-07-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/81571
	* tree-vect-slp.c (vect_build_slp_tree): Properly verify reduction
	PHIs.

	* gcc.dg/torture/pr81571.c: New testcase.

From-SVN: r250626

2017-07-27  Martin Liska  <mliska@suse.cz>

	* opt-functions.awk: Add validation of value of Init.
	* optc-gen.awk: Pass new argument.

From-SVN: r250625

	* config/sparc/sparc.c (sparc_option_override): Set MASK_FSMULD flag
	earlier and only if MASK_FPU is set.  Adjust formatting.

From-SVN: r250623

2017-07-27  Martin Liska  <mliska@suse.cz>

	* auto-profile.c (autofdo_source_profile::update_inlined_ind_target):
	Fix wrong condition.

From-SVN: r250622

2017-07-27  Martin Liska  <mliska@suse.cz>

	* auto-profile.c (afdo_annotate_cfg): Assign zero counts to
	BBs and edges seen by autoFDO.

From-SVN: r250621

re PR middle-end/81502 (In some cases the data is moved to memory unnecessarily [partial regression])

2017-07-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/81502
	* tree-ssa.c (non_rewritable_lvalue_p): Handle BIT_INSERT_EXPR
	with incompatible but same sized type.
	(execute_update_addresses_taken): Likewise.

	* gcc.target/i386/vect-insert-1.c: New testcase.

From-SVN: r250620

While answering a user question on the equivalence of
-ftree-loop-vectorize + -ftree-slp-vectorize and -ftree-vectorize I
spotted one case which broke the equivalence. pass_ch::process_loop_p
was guarded on flag_tree_vectorize, meaning you would get it for
-ftree-vectorize, but not for -ftree-loop-vectorize/-ftree-slp-vectorize.

This patch fixes that, getting rid of the only use of flag_tree_vectorize
in the code base.

gcc/

	* tree-ssa-loop-ch.c (pass_ch::process_loop_p): Guard on
	flag_tree_loop_vectorize rather than flag_tree_vectorize.

From-SVN: r250619

The HI/QI atomic_fetch_<atomic><mode>" expander accepted symbolic
references and emitted CAS patterns whose insn predicates rejected them.

Fixed by allowing symbolic references there as well.  Reload will get
rid of them due to the constraint letter.

Regression tested on s390x.

gcc/ChangeLog:

2017-07-27  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	PR target/81534
	* config/s390/s390.md ("*atomic_compare_and_swap<mode>_1")
	("*atomic_compare_and_swapdi_2", "*atomic_compare_and_swapsi_3"):
	Change s_operand to memory_operand.

gcc/testsuite/ChangeLog:

2017-07-27  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	PR target/81534
	* gcc.target/s390/pr81534.c: New test.

From-SVN: r250617

The little-endian VSX code uses rotates to swap the two 64-bit halves of
128-bit scalar modes.  This is fine for TImode and V1TImode, but it
isn't really valid to use RTL rotates on floating-point modes like
KFmode and TFmode, and doing that triggered an assert added by the
SVE series.  This patch uses bit-casts to V1TImode instead.

2017-07-27  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* config/rs6000/rs6000-protos.h (rs6000_emit_le_vsx_permute): Declare.
	* config/rs6000/rs6000.c (rs6000_gen_le_vsx_permute): Replace with...
	(rs6000_emit_le_vsx_permute): ...this.  Take the destination as input.
	Emit instructions rather than returning an expression.  Handle TFmode
	and KFmode by casting to TImode.
	(rs6000_emit_le_vsx_load): Update to use rs6000_emit_le_vsx_permute.
	(rs6000_emit_le_vsx_store): Likewise.
	* config/rs6000/vsx.md (VSX_TI): New iterator.
	(*vsx_le_permute_<mode>): Use it instead of VSX_LE_128.
	(*vsx_le_undo_permute_<mode>): Likewise.
	(*vsx_le_perm_load_<mode>): Use rs6000_emit_le_vsx_permute to
	emit the split sequence.
	(*vsx_le_perm_store_<mode>): Likewise.

From-SVN: r250615

	PR tree-optimization/81555
	PR tree-optimization/81556
	* tree-ssa-reassoc.c (rewrite_expr_tree): Add NEXT_CHANGED argument,
	if true, force CHANGED for the recursive invocation.
	(reassociate_bb): Remember original length of ops array, pass
	len != orig_len as NEXT_CHANGED in rewrite_expr_tree call.

	* gcc.c-torture/execute/pr81555.c: New test.
	* gcc.c-torture/execute/pr81556.c: New test.

From-SVN: r250609

	* attribs.c (decl_attributes): Imply noinline, noclone and no_icf
	attributes for noipa attribute.  For naked attribute use
	lookup_attribute first before lookup_attribute_spec.
	* final.c (rest_of_handle_final): Disable IPA RA for functions with
	noipa attribute.
	* ipa-visibility.c (non_local_p): Fix comment typos.  Return true
	for functions with noipa attribute.
	(cgraph_externally_visible_p): Return true for functions with noipa
	attribute.
	* cgraph.c (cgraph_node::get_availability): Return AVAIL_INTERPOSABLE
	for functions with noipa attribute.
	* doc/extend.texi: Document noipa function attribute.
	* tree-ssa-structalias.c (refered_from_nonlocal_fn): Set *nonlocal_p
	also for functions with noipa attribute.
	(ipa_pta_execute): Set nonlocal_p also for nodes with noipa attribute.
c-family/
	* c-attribs.c (c_common_attribute_table): Add noipa attribute.
	(handle_noipa_attribute): New function.
testsuite/
	* gcc.dg/attr-noipa.c: New test.
	* gcc.dg/ipa/ipa-pta-18.c: New test.
	* gcc.dg/ipa/ipa-sra-11.c: New test.

From-SVN: r250607

From-SVN: r250601

aarch64.c (thunderx_vector_cost): Decrease cost of vec_unalign_load_cost and vec_unalign_store_cost.

2017-07-26  Andrew Pinski  <apinski@cavium.com>

        * config/aarch64/aarch64.c (thunderx_vector_cost): Decrease cost of
        vec_unalign_load_cost and vec_unalign_store_cost.

From-SVN: r250597

[gcc]
2017-07-26  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete
	-mvsx-small-integer option.
	(ISA_3_0_MASKS_IEEE): Likewise.
	(OTHER_VSX_VECTOR_MASKS): Likewise.
	(POWERPC_MASKS): Likewise.
	* config/rs6000/rs6000.opt (-mvsx-small-integer): Likewise.
	* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Simplify
	code, only testing for DImode being allowed in non-VSX floating
	point registers.
	(rs6000_init_hard_regno_mode_ok): Change TARGET_VSX_SMALL_INTEGER
	to TARGET_P8_VECTOR test.  Remove redundant VSX test inside of
	another VSX test.
	(rs6000_option_override_internal): Delete -mvsx-small-integer.
	(rs6000_expand_vector_set): Change TARGET_VSX_SMALL_INTEGER to
	TARGET_P8_VECTOR test.
	(rs6000_secondary_reload_simple_move): Likewise.
	(rs6000_preferred_reload_class): Delete TARGET_VSX_SMALL_INTEGER,
	since TARGET_P9_VECTOR was already tested.
	(rs6000_opt_masks): Remove -mvsx-small-integer.
	* config/rs6000/vsx.md (vsx_extract_<mode>): Delete
	TARGET_VSX_SMALL_INTEGER, since a test for TARGET_P9_VECTOR was
	used.
	(vsx_extract_<mode>_p9): Delete TARGET_VSX_SMALL_INTEGER, since a
	test for TARGET_VEXTRACTUB was used, and that uses
	TARGET_P9_VECTOR.
	(p9 extract splitter): Likewise.
	(vsx_extract_<mode>_di_p9): Likewise.
	(vsx_extract_<mode>_store_p9): Likewise.
	(vsx_extract_si): Delete TARGET_VSX_SMALL_INTEGER, since a test
	for TARGET_P9_VECTOR was used.  Delete code that is now dead with
	the elimination of TARGET_VSX_SMALL_INTEGER.
	(vsx_extract_<mode>_p8): Likewise.
	(vsx_ext_<VSX_EXTRACT_I:VS_scalar>_fl_<FL_CONV:mode>): Likewise.
	(vsx_ext_<VSX_EXTRACT_I:VS_scalar>_ufl_<FL_CONV:mode>): Likewise.
	(vsx_set_<mode>_p9): Likewise.
	(vsx_set_v4sf_p9): Likewise.
	(vsx_set_v4sf_p9_zero): Likewise.
	(vsx_insert_extract_v4sf_p9): Likewise.
	(vsx_insert_extract_v4sf_p9_2): Likewise.
	* config/rs6000/rs6000.md (sign extend splitter): Change
	TARGET_VSX_SMALL_INTEGER to TARGET_P8_VECTOR test.
	(floatsi<mode>2_lfiwax_mem): Likewise.
	(floatunssi<mode>2_lfiwzx_mem): Likewise.
	(float<QHI:mode><FP_ISA3:mode>2): Delete TARGET_VSX_SMALL_INTEGER,
	since a test for TARGET_P9_VECTOR was used.
	(float<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
	(floatuns<QHI:mode><FP_ISA3:mode>2): Likewise.
	(floatuns<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
	(fix_trunc<mode>si2): Change TARGET_VSX_SMALL_INTEGER to
	TARGET_P8_VECTOR test.
	(fix_trunc<mode>si2_stfiwx): Likewise.
	(fix_trunc<mode>si2_internal): Likewise.
	(fix_trunc<SFDF:mode><QHI:mode>2): Delete
	TARGET_VSX_SMALL_INTEGER, since a test for TARGET_P9_VECTOR was
	used.
	(fix_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
	(fixuns_trunc<mode>si2): Change TARGET_VSX_SMALL_INTEGER to
	TARGET_P8_VECTOR test.
	(fixuns_trunc<mode>si2_stfiwx): Likewise.
	(fixuns_trunc<SFDF:mode><QHI:mode>2): Delete
	TARGET_VSX_SMALL_INTEGER, since a test for TARGET_P9_VECTOR was
	used.
	(fixuns_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
	(fctiw<u>z_<mode>_smallint): Delete TARGET_VSX_SMALL_INTEGER,
	since a test for TARGET_P9_VECTOR was used.
	(splitter for loading small constants): Likewise.

[gcc/testsuite]
2017-07-25  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/vsx-himode.c: Delete -mvsx-small-integer
	option.
	* gcc.target/powerpc/vsx-himode2.c: Likewise.
	* gcc.target/powerpc/vsx-himode3.c: Likewise.
	* gcc.target/powerpc/vsx-qimode.c: Likewise.
	* gcc.target/powerpc/vsx-qimode2.c: Likewise.
	* gcc.target/powerpc/vsx-qimode3.c: Likewise.
	* gcc.target/powerpc/vsx-simode.c: Likewise.
	* gcc.target/powerpc/vsx-simode2.c: Likewise.
	* gcc.target/powerpc/vsx-simode3.c: Likewise.

From-SVN: r250595

	PR libstdc++/53984
	* testsuite/27_io/basic_fstream/53984.cc: Fix test.

From-SVN: r250594

	PR go/81548
	* Makefile.am (MOSTLYCLEANFILES): Add *.sent.
	* Makefile.in: Rebuild.

From-SVN: r250593

2017-07-26  Andrew Pinski  <apinski@cavium.com>

        * config/aarch64/aarch64.c (thunderx_vector_cost): Fix
        vec_fp_stmt_cost.

From-SVN: r250592

re PR c++/71570 (ICE on invalid variable capture in cxx_incomplete_type_diagnostic, at cp/typeck2.c:55)

/cp
2017-07-26  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/71570
	* lambda.c (add_capture): Early return if we cannot capture by
	reference.

/testsuite
2017-07-26  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/71570
	* g++.dg/cpp0x/lambda/lambda-ice17.C: New.

From-SVN: r250591

	* configure.ac: Check for XCOFF32/XCOFF64.  Check for loadquery.
	* filetype.awk: Separate AIX XCOFF32 and XCOFF64.
	* xcoff.c: Add support for AIX XCOFF32 and XCOFF64 formats.
	* configure, config.h.in: Regenerate.

From-SVN: r250590

    
    Patch by Uros Bizjak.
    
    Reviewed-on: https://go-review.googlesource.com/51370

From-SVN: r250588

X86 prologue saves register at CFA offset.  Since its location on stack
is computed as CFA - its CFA_OFFSET, CFA_OFFSET points the end of the
saved register area on stack.  This patch updates sp_valid_at and
fp_valid_at to properly check saved register CFA offset.

gcc/

	PR target/81563
	* config/i386/i386.c (sp_valid_at): Properly check CFA offset.
	(fp_valid_at): Likewise.

gcc/testsuite/

	PR target/81563
	* gcc.target/i386/pr81563.c: New test

From-SVN: r250587

The special case address cost tables for Cortex-A57 and qdf24xx are no
different from the generic address cost table. We should just use the
address cost table directly. If this changes in future, a core is welcome
to add new address cost tables.

gcc/

	* config/aarch64/aarch64.c (cortexa57_addrcost_table): Remove.
	(qdf24xx_addrcost_table): Likewise.
	(cortexa57_tunings): Update to use generic_branch_cost.
	(cortexa72_tunings): Likewise.
	(cortexa73_tunings): Likewise.
	(qdf24xx_tunings): Likewise.

From-SVN: r250585

	* pt.c (do_class_deduction): Special-case deduction from a single
	element of related type.

From-SVN: r250584

        PR c++/67054 - Inherited ctor with non-default-constructible members
        * method.c (walk_field_subobs) Consider member initializers (NSDMIs)
	when deducing an inheriting constructor.

From-SVN: r250583

All the cores in AArch64 use the pair {1, 3} for their branch costs. As
that is covered by generic_branch_cost, we can just use that directly and
save the tiny amount of redundant code. If in future any core wants to
modify this, they can always add a special-case branch-cost back.

gcc/

	* config/aarch64/aarch64.c (cortexa57_branch_cost): Remove.
	(thunderx2t99_branch_cost): Likewise.
	(cortexa35_tunings): Update to use generic_branch_cost.
	(cortexa53_tunings): Likewise.
	(cortexa57_tunings): Likewise.
	(cortexa72_tunings): Likewise.
	(cortexa73_tunings): Likewise.
	(thunderx2t99_tunings): Likewise.

From-SVN: r250582

2017-07-26  Paolo Carlini  <paolo.carlini@oracle.com>

	* testsuite/27_io/basic_fstream/53984.cc: Fix typo in dg-require
	directive.

From-SVN: r250575