1. 16 Mar, 2016 6 commits
  2. 15 Mar, 2016 27 commits
  3. 14 Mar, 2016 7 commits
    • * gcc.dg/torture/pr70083.c: Prune non-standard ABI. · 1df7b330
      From-SVN: r234202
      David Edelsohn committed
    • re PR middle-end/70219 (ICE: in delete_move_and_clobber, at lra-constraints.c:5864 with -O2) · 79b57d18
      	PR middle-end/70219
      	* lra-constraints.c (delete_move_and_clobber): Change assertion
      	to also allow dregno == 0.
      
      	* gcc.dg/pr70219.c: New test.
      
      From-SVN: r234201
      Jakub Jelinek committed
    • re PR tree-optimization/68714 (less folding of vector comparison) · 51d4212a
      PR tree-opt/68714
      
        * tree-ssa-reassoc.c (ovce_extract_ops, optimize_vec_cond_expr): New.
        (can_reassociate_p): Allow ANY_INTEGRAL_TYPE_P.
        (reassociate_bb): Use optimize_vec_cond_expr; avoid
        optimize_range_tests, attempt_builtin_copysign and attempt_builtin_powi
        on vectors.
      
      From-SVN: r234196
      Richard Henderson committed
    • P08184R0: Generalizing the Range-Based For Loop · 598a208c
      	* parser.c (cp_convert_range_for): Set the type of __end separately.
      	(cp_parser_perform_range_for_lookup): Allow different begin/end
      	types if they are comparable.
      
      Co-Authored-By: Jason Merrill <jason@redhat.com>
      
      From-SVN: r234191
      Casey Carter committed
    • LRA: identify biggest access mode for hard_regs and use it in split_reg · 3cbf012a
      	PR target/70083
      	* lra-lives.c (process_bb_lives): Also update biggest mode for hard
      	regs.
      	(lra_create_live_ranges_1): initialize hard register biggest_mode to
      	VOIDmode.
      	* lra-constraints.c (split_reg): For hard regs, try to find the
      	biggest single-register mode used in the function.
      
      testsuite/
      	PR target/70083
      	* gcc.dg/torture/pr70083.c: New test.
      	* gcc.target/i386/pr70083.c: New test.
      
      From-SVN: r234184
      Bernd Schmidt committed
    • re PR tree-optimization/56365 (Missed opportunities for smin/smax standard name… · a9fee7cd
      re PR tree-optimization/56365 (Missed opportunities for smin/smax standard name patterns when compiling as C++)
      
      2016-03-14  Richard Biener  <rguenther@suse.de>
      
      	PR tree-optimization/56365
      	* tree-ssa-phiopt.c (minmax_replacement): Handle alternate
      	constants to compare against.
      
      	* gcc.dg/tree-ssa/phi-opt-14.c: New testcase.
      
      From-SVN: r234183
      Richard Biener committed
    • rs6000: Handle "d" output in the bd*z patterns (PR70098) · 4799603f
      In the rs6000 port, FLOAT_REGS can contain DImode values when compiling
      for 64-bit targets.  Some instructions (like "fcfid" in the testcase,
      convert from integer to DP float) only work on floating point registers.
      So, we do want to allow DImode in these regs.
      
      Now, in unusual cases IRA will assign FLOAT_REGS to some allocno where
      some insns cannot handle FLOAT_REGS there, so they will need a reload.
      Maybe IRA can be made smarter, but it isn't doing anything wrong here,
      so we should be able to handle it.
      
      The place it goes wrong is in the output of the *ctrdi_internal[1256]
      pattern: the "bdz" and "bdnz" instructions.  GCC refuses to do output
      reloads on JUMP_INSNs, probably because it is hard to do, needs different
      strategies than "normal" reloads do, and it cannot even be done at all
      for general patterns.  So JUMP_INSNs need to be able to handle every
      possible output for the register class used.
      
      These patterns already handle writing to "c" (the base insn case), and
      to "r", "m", and "c" or "l"; all those via splitters.  We just need to
      handle "d" as well.  That is what this patch does.  [A predicate in one
      of the splitters needs to be touched up so that the correct splitter
      is used for the FLOAT_REGS case.]
      
      But, that leaves another problem.  One of the insns that are split to
      is a move from a GPR to an FPR.  That work fine on targets with direct
      move (which does exactly that), i.e. power8 and up.  But older targets
      need memory to do the move, and this splitter runs after reload so
      it cannot allocate memory; and allocating memory beforehand for every
      bdnz insn is pretty horrible as well.
      
      This patch implements the easy part.  With it, power8 works, where it
      didn't before.
      
      
      	PR target/70098
      	* config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2,
      	*ctr<mode>_internal5, *ctr<mode>_internal6): Also allow "d" as output.
      	(define_split for the GPR case): Use int_reg_operand instead of
      	gpc_reg_operand for the output.
      
      gcc/testsuite/
      	PR target/70098
      	* lib/target-supports.exp (check_effective_target_powerpc64_no_dm):
      	New function.
      	* g++.dg/pr70098.C: New testcase.
      
      From-SVN: r234181
      Segher Boessenkool committed