2016-06-20  Tobias Burnus  <burnus@net-b.de>

        PR fortran/71068
        * resolve.c (resolve_function): Don't resolve caf_get/caf_send.
        (check_data_variable): Strip-off caf_get before checking.

        PR fortran/71068
        * gfortran.dg/coarray/data_1.f90: New.

From-SVN: r237656

	* constraint.cc (constraints_satisfied_p): Keep as many levels of
	args as our template has levels of parms.

From-SVN: r237655

	* pt.c (template_parm_outer_level, uses_outer_template_parms): New.
	(type_dependent_expression_p): Use uses_outer_template_parms.

From-SVN: r237654

The recently added gcc.target/aarch64/advsimd-intrinsics/vrnd*.c tests cause
failures due to accidentally running on non-ARMv8 hardware - the target check
arm_v8_neon_ok is correct for compilation tests but should be arm_v8_neon_hw
for execution tests.  Fix this and also change arm_v8_neon_hw to return
true for AArch64 so these tests are run on AArch64 too.

    gcc/testsuite/
	* gcc.target/aarch64/advsimd-intrinsics/vrnd.c
	(dg-require-effective-target): Use arm_v8_neon_hw.
	* gcc.target/aarch64/advsimd-intrinsics/vrnda.c
	(dg-require-effective-target): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndm.c
	(dg-require-effective-target): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndn.c
	(dg-require-effective-target): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndp.c
	(dg-require-effective-target): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndx.c
	(dg-require-effective-target): Likewise.
	* lib/target-supports.exp (check_runtime arm_v8_neon_hw_available):
	Add AArch64 check.

From-SVN: r237653

GCC dumps the blocks 3 times so update count 3 and the test passes.
 
    gcc/testsuite/
	* gcc.dg/tree-ssa/attr-hotcold-2.c (scan-tree-dump-times):
	Set to 3 so test passes.

From-SVN: r237652

	* predict.c (force_edge_cold): Replace imposisble with
	impossible.

From-SVN: r237651

Due to recent improvements to the vectorizer, the number of vectorized
loops needs to be increased to 21 in gfortran.dg/vect/vect-8.f90.

    gcc/testsuite/

        * gfortran.dg/vect/vect-8.f90 (vectorized loops): Set to 21.

From-SVN: r237650

gcc/
	* config/i386/i386.c (ix86_emit_swsqrtsf): Emit vrsqrt28ps.
	* config/i386/sse.md (define_expand "rsqrtv16sf2"): New.
gcc/testsuite/
	* gcc.target/i386/avx512er-vrsqrt28ps-3.c: New test.
	* gcc.target/i386/avx512er-vrsqrt28ps-4.c: New test.
	* gcc.target/i386/avx512er-vrsqrt28ps-5.c: New test.
	* gcc.target/i386/avx512er-vrsqrt28ps-6.c: New test.

From-SVN: r237649

gcc/
	* config/i386/i386.c (ix86_emit_swdivsf): Emit vrcp28ps.
gcc/testsuite/
	* gcc.target/i386/avx512er-vrcp28ps-3.c: New test.
	* gcc.target/i386/avx512er-vrcp28ps-4.c: New test.

From-SVN: r237648

TImode register referenced in debug insn can be converted to V1TImode
by scalar to vector optimization.  After converting a TImode register
to V1TImode, we need to check all debug insns on its use chain to
convert the V1TImode register to SUBREG TImode.

gcc/

2016-06-21  H.J. Lu  <hongjiu.lu@intel.com>
	    Ilya Enkovich  <ilya.enkovich@intel.com>

	PR target/71549
	* config/i386/i386.c (timode_scalar_chain::fix_debug_reg_uses):
	New member function to convert V1TImode register to SUBREG
	TImode in debug insn.
	(timode_scalar_chain::convert_insn): Call fix_debug_reg_uses
	after changing register mode to V1TImode.

gcc/testsuite/

2016-06-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/71549
	* gcc.target/i386/pr71549.c: New test.

Co-Authored-By: Ilya Enkovich <ilya.enkovich@intel.com>

From-SVN: r237647

gcc/testsuite/ChangeLog:

2016-06-21  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* gcc.target/powerpc/vadsdu-0.c: Replace
	dg-require-effective-target directive to allow test to run on more
	platforms, and add dg-skip-if directive to disable test on aix
	platforms because of known incompatibilities.
	* gcc.target/powerpc/vadsdu-1.c: Likewise.
	* gcc.target/powerpc/vadsdu-2.c: Likewise.
	* gcc.target/powerpc/vadsdu-3.c: Likewise.
	* gcc.target/powerpc/vadsdu-4.c: Likewise.
	* gcc.target/powerpc/vadsdu-5.c: Likewise.
	* gcc.target/powerpc/vadsdub-1.c: Likewise.
	* gcc.target/powerpc/vadsdub-2.c: Replace
	dg-require-effective-target directive to allow test to run on more
	platforms, and add dg-skip-if directive to disable test on aix
	platforms because of known incompatibilities.
	(doAbsoluteDifferenceUnsigned): Replace __builtin_vec_vadub call
	with vec_absdb call to differentiate this test from vadsdub-1.c.
	* gcc.target/powerpc/vadsduh-1.c: Replace
	dg-require-effective-target directive to allow test to run on more
	platforms, and add dg-skip-if directive to disable test on aix
	platforms because of known incompatibilities.
	* gcc.target/powerpc/vadsduh-2.c: Likewise.
	* gcc.target/powerpc/vadsduw-1.c: Likewise.
	* gcc.target/powerpc/vadsduw-2.c: Likewise.

From-SVN: r237646

gcc/ChangeLog

	* config/aarch64/aarch64-cores.def (vulcan): New core.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* doc/invoke.texi: Document vulcan as an available option.

From-SVN: r237645

        * config-list.mk: Remove rs6000-ibm-aix4.3, rs6000-ibm-aix5.1,
        rs6000-ibm-aix5.2.
        Rename rs6000-ibm-aix6.0 as rs6000-ibm-aix6.1.
        Add rs6000-ibm-aix7.1.

From-SVN: r237644

	* cse.c (canon_asm_operands): New function extracted from...
	(canonicalize_insn): ...here.  Call it to canonicalize an ASM_OPERANDS
	either standalone or member of a PARALLEL.

From-SVN: r237642

	PR target/30417
	* config/avr/gen-avr-mmcu-specs.c (print_mcu):
	[*link_data_start]: Wrap -Tdata into %{!Tdata:...}.
	[*link_text_start]: Wrap -Ttext into %{!Ttext:...}.

From-SVN: r237639

	PR target/71103
	* config/avr/avr.md (movqi): Only handle loading subreg:qi of
	constant addresses if can_create_pseudo_p.

From-SVN: r237635

re PR tree-optimization/71588 (ICE on valid code at -O2 and -O3 on x86_64-linux-gnu: in execute_todo, at passes.c:2009)

	PR tree-optimization/71588
	* tree-ssa-strlen.c (valid_builtin_call): New function.
	(adjust_last_stmt, handle_builtin_memset, strlen_optimize_stmt): Use
	it.

	* gcc.dg/pr71558.c: New test.

From-SVN: r237628

	* c-c++-common/pr68657-1.c: Require ptr32plus support.
	* c-c++-common/pr68657-2.c: Likewise.
	* c-c++-common/pr68657-3.c: Likewise.
	* gcc.dg/torture/pr69714.c: Require int32plus support.
	* gcc.dg/torture/pr70025.c: Likewise.
	* gcc.dg/torture/pr70083.c: Likewise.
	* gcc.dg/torture/pr70542.c: Likewise.
	* gcc.dg/torture/pr70935.c: Require ptr32plus support.

From-SVN: r237627

From-SVN: r237626

A conditional expression between DFP and non-DFP floating-point
produces an ICE.  This patch fixes this by making
build_conditional_expr return early when c_common_type produces an
error.

Bootstrapped with no regressions on x86_64-pc-linux-gnu.

	PR c/71601
gcc/c:
	* c-typeck.c (build_conditional_expr): Return error_mark_node if
	c_common_type returns error_mark_node.

gcc/testsuite:
	* gcc.dg/dfp/usual-arith-conv-bad-3.c: New test.

From-SVN: r237622

re PR middle-end/71581 (ICE on valid code on x86_64-linux-gnu with -Wuninitialized (Segmentation fault))

	PR middle-end/71581
	* tree-ssa-uninit.c (warn_uninit): If EXPR and VAR are NULL,
	see if T isn't anonymous SSA_NAME with COMPLEX_EXPR created
	for conversion of scalar user var to complex type and use the
	underlying SSA_NAME_VAR in that case.  If EXPR is still NULL,
	punt.

	* gcc.dg/pr71581.c: New test.

From-SVN: r237621

	PR rtl-optimization/71591
	* toplev.c (toplev::run_self_tests): If no_backend, complain and
	don't run any tests.

	* gcc.dg/cpp/pr71591.c: New test.

From-SVN: r237620

From-SVN: r237618

2016-06-20  François Dumont  <fdumont@gcc.gnu.org>

	PR libstdc++/71181
	* include/tr1/hashtable_policy.h
	(_Prime_rehash_policy::_M_next_bkt): Make past-the-end iterator
	dereferenceable to avoid check on lower_bound result.
	(_Prime_rehash_policy::_M_bkt_for_elements): Call latter.
	(_Prime_rehash_policy::_M_need_rehash): Likewise.
	* src/c++11/hashtable_c++0x.cc (_Prime_rehash_policy::_M_next_bkt):
	Always return a value greater than input value. Set _M_next_resize to
	max value when reaching highest prime number.
	* src/shared/hashtable-aux.cc (__prime_list): Add comment about sentinel
	being now useless.
	* testsuite/23_containers/unordered_set/hash_policy/71181.cc: New.
	* testsuite/23_containers/unordered_set/hash_policy/power2_rehash.cc
	(test02): New.
	* testsuite/23_containers/unordered_set/hash_policy/prime_rehash.cc: New.
	* testsuite/23_containers/unordered_set/hash_policy/rehash.cc:
	Fix indentation.

From-SVN: r237617

	PR target/71571
	* g++.dg/torture/pr71571.C: New test.

From-SVN: r237616

	PR target/71571
	* config/cris/cris.c (cris_asm_output_mi_thunk): Add missing "ba"
	delay-slot "nop" for PIC with CRIS v32.  Also add missing leading
	space for PIC with non-v32 and the common non-PIC "jump".

From-SVN: r237615

re PR target/71559 (ICE in ix86_fp_cmp_code_to_pcmp_immediate, at config/i386/i386.c:23042 (KNL/AVX512))

	PR target/71559
	* config/i386/i386.c (ix86_fp_cmp_code_to_pcmp_immediate): Fix up
	returned values and add UN*/LTGT/*ORDERED cases with values matching
	D operand modifier on vcmp for AVX.

	* gcc.target/i386/sse2-pr71559.c: New test.
	* gcc.target/i386/avx-pr71559.c: New test.
	* gcc.target/i386/avx512f-pr71559.c: New test.

From-SVN: r237614

2016-06-20  Tobias Burnus  <burnus@net-b.de>

        fortran/71194
        * trans-expr.c (gfc_trans_pointer_assignment): Correctly handle
        RHS pointer functions.

2016-06-20  Tobias Burnus  <burnus@net-b.de>

        PR fortran/71194
        * gfortran.dg/pointer_remapping_10.f90: New.

From-SVN: r237612

gcc/cp/ChangeLog:
	* parser.c (cp_parser_string_literal): Convert non-standard
	concatenation error to directly use a rich_location, and
	use that to add the location of the first literal to the
	diagnostic.

gcc/testsuite/ChangeLog:
	* g++.dg/diagnostic/string-literal-concat.C: New test case.

From-SVN: r237608

This patch cleans up the -mpc-relative-loads option processing.  Rename to avoid
the confusing nopcrelative_literal_loads names.  Fix the option processing code
to correctly support -mno-pc-relative-loads rather than ignore it. 

    gcc/
	* config/aarch64/aarch64.opt
	(mpc-relative-literal-loads): Rename internal option name.
	* config/aarch64/aarch64.c
	(aarch64_nopcrelative_literal_loads): Rename to 
	aarch64_pcrelative_literal_loads.
	(aarch64_expand_mov_immediate): Likewise.
	(aarch64_secondary_reload): Likewise.
	(aarch64_can_use_per_function_literal_pools_p): Likewise.
	(aarch64_override_options_after_change_1): Rename and simplify logic.
	(aarch64_classify_symbol): Merge large model checks into switch,
	remove pc-relative load check.

From-SVN: r237607

gcc/testsuite/ChangeLog:
	* gnu89-const-expr-1.c: Avoid diagnosing __alignof__ as not conforming.
	* gnu90-const-expr-1.c: Same.
	* gnu99-const-expr-1.c: Same.
	* gnu99-static-1.c: Same.

From-SVN: r237606

gcc/testsuite/

2016-06-20  Renlin Li  <renlin.li@arm.com>

	* gcc.dg/tree-ssa/attr-hotcold-2.c: Fix syntax errors.

From-SVN: r237605

gcc/

	* config/arm/aarch-cost-tables.h (cortexa53_extra_costs): Make FP
	costs relative to the cost of a register move.

From-SVN: r237604

gcc/ChangeLog

2016-06-20  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/arm_neon.h (vcvt_n_f64_s64): New.
	(vcvt_n_f64_u64): Likewise.
	(vcvt_n_s64_f64): Likewise.
	(vcvt_n_u64_f64): Likewise.
	(vcvt_f64_s64): Likewise.
	(vrecpe_f64): Likewise.
	(vcvt_f64_u64): Likewise.
	(vrecps_f64): Likewise.

gcc/testsuite/ChangeLog

2016-06-20  James Greenhalgh  <james.greenhalgh@arm.com>

	* gcc.target/aarch64/vcvt_f64_1.c: New.
	* gcc.target/aarch64/vcvt_n_f64_1.c: New.
	* gcc.target/aarch64/vrecp_f64_1.c: New.

From-SVN: r237603

gcc/

	* config/aarch64/aarch64.md
	(<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3): Add attributes to
	iterators.
	(<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3): Likewise.  Correct
	attributes.
	* config/aarch64/aarch64-builtins.c
	(aarch64_types_binop_uss_qualifiers): Delete.
	(TYPES_BINOP_USS): Likewise.
	(aarch64_types_binop_sus_qualifiers): Likewise.
	(TYPES_BINOP_SUS): Likewise.
	(aarch64_types_fcvt_from_unsigned_qualifiers): New.
	(TYPES_FCVTIMM_SUS): Likewise.
	* config/aarch64/aarch64-simd-builtins.def (scvtf): Use SHIFTIMM
	rather than BINOP.
	(ucvtf): Use FCVTIMM_SUS rather than BINOP_SUS.
	(fcvtzs): Use SHIFTIMM rather than BINOP.
	(fcvtzu): Use SHIFTIMM_USS rather than BINOP_USS.

From-SVN: r237602

gcc/

	* config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Make FP
	costs relative to the cost of a register move.

From-SVN: r237601

2016-06-20  Hristian Kirtchev  <kirtchev@adacore.com>

	* make.adb, gnatbind.adb, g-socket.adb, sem_ch13.adb: Minor
	reformatting.
	* lib.ads, sem_util.adb: Minor typo in comment.

2016-06-20  Yannick Moy  <moy@adacore.com>

	* sem_prag.adb, sem_prag.ads (Build_Pragma_Check_Equivalent):
	Add parameter Keep_Pragma_Id to optionally keep
	the identifier of the pragma instead of converting
	to pragma Check. Also set type of new function call
	appropriately.	(Collect_Inherited_Class_Wide_Conditions):
	Call Build_Pragma_Check_Equivalent with the new parameter
	Keep_Pragma_Id set to True to keep the identifier of the copied
	pragma.
	* sinfo.ads: Add comment.

2016-06-20  Hristian Kirtchev  <kirtchev@adacore.com>

	* exp_ch7.adb (Build_Invariant_Procedure_Body):
	Always install the scope of the invariant procedure
	in order to produce better error messages. Do not
	insert the body when the context is a generic unit.
	(Build_Invariant_Procedure_Declaration): Perform minimal
	decoration of the invariant procedure and its formal parameter
	in case they are not analyzed.	Do not insert the declaration
	when the context is a generic unit.

From-SVN: r237600

2016-06-20  Ed Schonberg  <schonberg@adacore.com>

	* sem_ch13.adb (Visible_Component): New procedure, subsidiary
	of Replace_Type_References_ Generic, to determine whether an
	identifier in a predicate or invariant expression is a visible
	component of the type to which the predicate or invariant
	applies. Implements the visibility rule stated in RM 13.1.1
	(12/3).

From-SVN: r237599

2016-06-20  Hristian Kirtchev  <kirtchev@adacore.com>

	* s-regpat.adb, sem_prag.adb, pprint.adb, sem_ch13.adb: Minor
	reformatting.

2016-06-20  Tristan Gingold  <gingold@adacore.com>

	* make.adb (Check_Standard_Library): Consider system.ads
	if s-stalib.adb is not available.
	* gnatbind.adb (Add_Artificial_ALI_File): New procedure extracted from
	gnatbind.

2016-06-20  Thomas Quinot  <quinot@adacore.com>

	* g-socket.adb (Is_IP_Address): A string consisting in digits only is
	not a dotted quad.

2016-06-20  Arnaud Charlet  <charlet@adacore.com>

	* exp_ch7.adb (Build_Invariant_Procedure_Body):
	decorate invariant procedure body with typical properties of
	procedure entityes.

2016-06-20  Arnaud Charlet  <charlet@adacore.com>

	* a-exetim-darwin.adb: New file.

From-SVN: r237598

Improve modes_tieable by returning true in more cases: allow scalar access
within vectors without requiring an extra move.  Removing these moves helps
the register allocator in deciding whether to use integer or FP registers on
operations that can be done on both.  This saves about 100 instructions in the
gcc.target/aarch64 tests.

A typical example:

	orr     v1.8b, v0.8b, v1.8b
	fmov    x0, d0
	fmov    x1, d1
	add     x0, x1, x0
	ins     v0.d[0], x0
	orr     v0.8b, v1.8b, v0.8b

after:

	orr     v1.8b, v0.8b, v1.8b
	add     d0, d1, d0
	orr     v0.8b, v1.8b, v0.8b

    gcc/
	* config/aarch64/aarch64.c (aarch64_modes_tieable_p):
	Allow scalar/single vector modes to be tieable.

From-SVN: r237597