The recently added gcc.target/aarch64/advsimd-intrinsics/vrnd*.c tests cause...

The recently added gcc.target/aarch64/advsimd-intrinsics/vrnd*.c tests cause
failures due to accidentally running on non-ARMv8 hardware - the target check
arm_v8_neon_ok is correct for compilation tests but should be arm_v8_neon_hw
for execution tests.  Fix this and also change arm_v8_neon_hw to return
true for AArch64 so these tests are run on AArch64 too.

    gcc/testsuite/
	* gcc.target/aarch64/advsimd-intrinsics/vrnd.c
	(dg-require-effective-target): Use arm_v8_neon_hw.
	* gcc.target/aarch64/advsimd-intrinsics/vrnda.c
	(dg-require-effective-target): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndm.c
	(dg-require-effective-target): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndn.c
	(dg-require-effective-target): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndp.c
	(dg-require-effective-target): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndx.c
	(dg-require-effective-target): Likewise.
	* lib/target-supports.exp (check_runtime arm_v8_neon_hw_available):
	Add AArch64 check.

From-SVN: r237653

gcc/testsuite/ChangeLog

 2016-06-21  Wilco Dijkstra  <wdijkstr@arm.com>
 
+	* gcc.target/aarch64/advsimd-intrinsics/vrnd.c
+	(dg-require-effective-target): Use arm_v8_neon_hw.
+	* gcc.target/aarch64/advsimd-intrinsics/vrnda.c
+	(dg-require-effective-target): Likewise.
+	* gcc.target/aarch64/advsimd-intrinsics/vrndm.c
+	(dg-require-effective-target): Likewise.
+	* gcc.target/aarch64/advsimd-intrinsics/vrndn.c
+	(dg-require-effective-target): Likewise.
+	* gcc.target/aarch64/advsimd-intrinsics/vrndp.c
+	(dg-require-effective-target): Likewise.
+	* gcc.target/aarch64/advsimd-intrinsics/vrndx.c
+	(dg-require-effective-target): Likewise.
+	* lib/target-supports.exp (check_runtime arm_v8_neon_hw_available):
+	Add AArch64 check.
+
+2016-06-21  Wilco Dijkstra  <wdijkstr@arm.com>
+
 	* gcc.dg/tree-ssa/attr-hotcold-2.c (scan-tree-dump-times):
 	Set to 3 so test passes.
 

gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c

-/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-require-effective-target arm_v8_neon_hw } */
 /* { dg-add-options arm_v8_neon } */
 
 #include <arm_neon.h>

gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c

-/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-require-effective-target arm_v8_neon_hw } */
 /* { dg-add-options arm_v8_neon } */
 
 #include <arm_neon.h>

gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c

-/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-require-effective-target arm_v8_neon_hw } */
 /* { dg-add-options arm_v8_neon } */
 
 #include <arm_neon.h>

gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c

-/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-require-effective-target arm_v8_neon_hw } */
 /* { dg-add-options arm_v8_neon } */
 
 #include <arm_neon.h>

gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c

-/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-require-effective-target arm_v8_neon_hw } */
 /* { dg-add-options arm_v8_neon } */
 
 #include <arm_neon.h>

gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c

-/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-require-effective-target arm_v8_neon_hw } */
 /* { dg-add-options arm_v8_neon } */
 
 #include <arm_neon.h>

gcc/testsuite/lib/target-supports.exp

@@ -3417,11 +3417,17 @@ proc check_effective_target_arm_v8_neon_hw { } {
 	int
 	main (void)
 	{
-	  float32x2_t a;
+	  float32x2_t a = { 1.0f, 2.0f };
+	  #ifdef __ARM_ARCH_ISA_A64
+	  asm ("frinta %0.2s, %1.2s"
+	      : "=w" (a)
+	      : "w" (a));
+	  #else
 	  asm ("vrinta.f32 %P0, %P1"
 	       : "=w" (a)
 	       : "0" (a));
-	  return 0;
+	  #endif
+	  return a[0] == 2.0f;
 	}
     } [add_options_for_arm_v8_neon ""]]
 }