2017-12-30  Tom de Vries  <tom@codesourcery.com>

	PR libgomp/83046
	* omp-expand.c (expand_omp_target): If in_lto_p, mark offload_funcs with
	DECL_PRESERVE_P.
	* lto-streamer-out.c (prune_offload_funcs): New function.  Remove
	offload_funcs entries that no longer have a corresponding cgraph_node.
	Mark the remaining ones as DECL_PRESERVE_P.
	(output_lto): Call prune_offload_funcs.

	* testsuite/libgomp.oacc-c-c++-common/pr83046.c: New test.
	* testsuite/libgomp.c-c++-common/pr83046.c: New test.

From-SVN: r256045

	* config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
	vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>,
	vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
	vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
	vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
	vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1, vpdpbusd_<mode>,
	vpdpbusd_<mode>_mask, vpdpbusd_<mode>_maskz, vpdpbusd_<mode>_maskz_1,
	vpdpbusds_<mode>, vpdpbusds_<mode>_mask, vpdpbusds_<mode>_maskz,
	vpdpbusds_<mode>_maskz_1, vpdpwssd_<mode>, vpdpwssd_<mode>_mask,
	vpdpwssd_<mode>_maskz, vpdpwssd_<mode>_maskz_1, vpdpwssds_<mode>,
	vpdpwssds_<mode>_mask, vpdpwssds_<mode>_maskz,
	vpdpwssds_<mode>_maskz_1, vaesdec_<mode>, vaesdeclast_<mode>,
	vaesenc_<mode>, vpclmulqdq_<mode>,
	avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>): Formatting fixes.

From-SVN: r256044

From-SVN: r256043

2017-12-30  Tom de Vries  <tom@codesourcery.com>

	PR testsuite/83612
	* c-c++-common/ubsan/object-size-9.c (t): Add alignment attribute.

From-SVN: r256042

From-SVN: r256039

2017-12-29  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

        PR libgfortran/83613
        * io/unit.c (init_units): Don't forget to unlock the unit locks
        after being inserted.

From-SVN: r256035

re PR fortran/83560 (list-directed formatting of INTEGER is missing plus on output when output open with SIGN='PLUS')

2017-12-29  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

        PR libgfortran/83560
        * io/write.c (write_integer): Modify to use write_decimal.
        For namelist mode, suppress leading blanks and emit them as
        trailing blanks. Change parameter from len to kind for better
        readability. (nml_write_obj): Fix comment style.

From-SVN: r256034

re PR fortran/83567 (Parametrized derived types: Segmentation fault when assigning a function return value)

2017-12-28  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/83567
	* trans-expr.c (gfc_trans_assignment_1): Free parameterized
	components of the lhs if dealloc is set.
	*trans-decl.c (gfc_trans_deferred_vars): Do not free the
	parameterized components of function results on leaving scope.


2017-12-28  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/83567
	* gfortran.dg/pdt_26.f90 : New test.

From-SVN: r256033

	* g++.old-deja/g++.ext/namedret2.C (f): Return a value.

From-SVN: r256032

	* g++.old-deja/g++.ext/namedret1.C (f): Return a value.

From-SVN: r256031

From-SVN: r256030

[gcc]
2017-12-28  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* builtins.def: (_Float<N> and _Float<N>X BUILT_IN_CEIL): Add
	_Float<N> and _Float<N>X variants for rounding built-in
	functions.
	(_Float<N> and _Float<N>X BUILT_IN_FLOOR): Likewise.
	(_Float<N> and _Float<N>X BUILT_IN_NEARBYINT): Likewise.
	(_Float<N> and _Float<N>X BUILT_IN_RINT): Likewise.
	(_Float<N> and _Float<N>X BUILT_IN_ROUND): Likewise.
	(_Float<N> and _Float<N>X BUILT_IN_TRUNC): Likewise.
	* builtins.c (mathfn_built_in_2): Likewise.
	* internal-fn.def (CEIL): Likewise.
	(FLOOR): Likewise.
	(NEARBYINT): Likewise.
	(RINT): Likewise.
	(ROUND): Likewise.
	(TRUNC): Likewise.
	* convert.c (convert_to_integer_1): Likewise.
	* fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
	(integer_valued_real_call_p): Likewise.
	* fold-const-call.c (fold_const_call_ss): Likewise.
	* gencfn-macros.c (print_case_cfn): Change CFN and operator
	printers to take a const char * suffix instead of a bool.
	(print_define_operator_list): Likewise.
	(fltall_suffixes): New list of suffixes, that include the
	traditional suffixes as well as all of the _Float<N> and
	_Float<N>X suffixes.
	(main): For _Float<N> and _Float<N>X functions, emit both
	<name>_FN and <name>_ALL variants.  The <macro>_FN variant only
	has the _Float<N> and _Float<N>X case names or operators.  The
	<name>_ALL variant has both the traditional and the
	_Float<N>/_Float<N>X case names or operators.
	* match.pd (COPYSIGN optimizations): Provide optimizations for
	_Float<N> and _Float<N>X types where possible.
	(MIN/MAX optimizations): Likewise.
	(sqrt optimizations): Likewise.
	(rounding optimizations): Likewise.

[gcc/c]
2017-12-28  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* c-decl.c (header_for_builtin_fn): Add integer rounding _Float<N>
	and _Float<N>X built-in functions.

From-SVN: r256026

Previously we'd generate a non-canonical zero-extended CONST_INT
instead of a sign-extended one, which tripped the assert for
canonical CONST_INTs after a later patch.

2017-12-28  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* config/powerpcspe/powerpcspe.md (ieee_128bit_negative_zero): Use
	gen_int_mode rather than GEN_INT.
	* config/rs6000/rs6000.md (ieee_128bit_negative_zero): Likewise.

From-SVN: r256024

This patch makes the VEC_SERIES code use valid_for_const_vector_p
instead of CONSTANT_P, to match what we already do for VEC_DUPLICATE.
This showed up as a failure in gcc.c-torture/execute/pr28982b.c for -m32
on x86_64-linux-gnu after later patches.

2017-12-28  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* emit-rtl.c (gen_const_vec_series): Use valid_for_const_vector_p
	instead of CONSTANT_P.
	(gen_vec_series): Likewise.
	* simplify-rtx.c (simplify_binary_operation_1): Likewise.

From-SVN: r256023

2017-12-28  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR Fortran/83548
	* match.c (gfc_match_type_spec): Check for LOGICAL conflict in
	type-spec versus LOGICAL intrinsic subprogram.

2017-12-28  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR Fortran/83548
	* gfortran.dg/array_constructor_type_22.f03: New test.

From-SVN: r256022

This patch does not fix PR 83344, but merely fixes an error where we
used to set a constant character length value from a non-constant
expression, and thus set it to some bogus value.

As a result of this, I have commented out part of the associate_22.f90
test which otherwise generates a warning message.

Regtested on x86_64-pc-linux-gnu.

gcc/fortran/ChangeLog:

2017-12-28  Janne Blomqvist  <jb@gcc.gnu.org>

	PR fortran/83344
	* resolve.c (resolve_assoc_var): Don't set the constant value
	unless the target is a constant expression.

gcc/testsuite/ChangeLog:

2017-12-28  Janne Blomqvist  <jb@gcc.gnu.org>

	PR fortran/83344
	* gfortran.dg/associate_22.f90: Comment out part of test.

From-SVN: r256021

* config/m68k/m68k.md (ashrdi3_const1, lshrdi3_const1): Add
CC_STATUS_INIT.

From-SVN: r256020

re PR fortran/83567 (Parametrized derived types: Segmentation fault when assigning a function return value)

2017-12-28  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/83567
	* trans-expr.c (gfc_trans_assignment_1): Free parameterized
	components of the lhs if dealloc is set.
	*trans-decl.c (gfc_trans_deferred_vars): Do not free the
	parameterized components of function results on leaving scope.


2017-12-28  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/83567
	* gfortran.dg/pdt_26.f90 : New test.

From-SVN: r256019

From-SVN: r256017

	PR libstdc++/83600
	* include/bits/regex.h (match_results::end()): Return valid iterator
	when not ready.
	* testsuite/28_regex/match_results/ctors/char/default.cc: Check that
	unready objects are empty and have equal begin and end iterators.
	* testsuite/28_regex/match_results/ctors/wchar_t/default.cc: Likewise.

From-SVN: r256014

	PR libstdc++/83598
	* include/bits/regex.h (basic_regex): Don't modify flags passed to
	constructors.
	* testsuite/28_regex/basic_regex/ctors/83598.cc: New test.

From-SVN: r256013

	PR libstdc++/83538
	* doc/xml/manual/intro.xml: Document LWG 2306 change.
	* include/bits/regex.h (match_results::reference): Change to
	non-const reference.
	* testsuite/28_regex/match_results/typedefs.cc: Check types are
	correct.

From-SVN: r256012

	PR fortran/83092
	* expr.c (gfc_apply_init): Check that typespec has character type
	before using character length field.

2017_12_27  Louis Krupp  <louis.krupp@zoho.com>

	PR fortran/83092
	* gfortran.dg/init_char_with_nonchar_ctr.f90: New test.

From-SVN: r256011

gcc/ChangeLog:

2017-12-27  Kugan Vivekanandarajah  <kuganv@linaro.org>

	* config/aarch64/aarch64-simd.md (aarch64_ld1x2<VQ:mode>): New.
	(aarch64_ld1x2<VDC:mode>): Likewise.
	(aarch64_simd_ld1<mode>_x2): Likewise.
	(aarch64_simd_ld1<mode>_x2): Likewise.
	* config/aarch64/arm_neon.h (vld1_u8_x2): New.
	(vld1_s8_x2): Likewise.
	(vld1_u16_x2): Likewise.
	(vld1_s16_x2): Likewise.
	(vld1_u32_x2): Likewise.
	(vld1_s32_x2): Likewise.
	(vld1_u64_x2): Likewise.
	(vld1_s64_x2): Likewise.
	(vld1_f16_x2): Likewise.
	(vld1_f32_x2): Likewise.
	(vld1_f64_x2): Likewise.
	(vld1_p8_x2): Likewise.
	(vld1_p16_x2): Likewise.
	(vld1_p64_x2): Likewise.
	(vld1q_u8_x2): Likewise.
	(vld1q_s8_x2): Likewise.
	(vld1q_u16_x2): Likewise.
	(vld1q_s16_x2): Likewise.
	(vld1q_u32_x2): Likewise.
	(vld1q_s32_x2): Likewise.
	(vld1q_u64_x2): Likewise.
	(vld1q_s64_x2): Likewise.
	(vld1q_f16_x2): Likewise.
	(vld1q_f32_x2): Likewise.
	(vld1q_f64_x2): Likewise.
	(vld1q_p8_x2): Likewise.
	(vld1q_p16_x2): Likewise.
	(vld1q_p64_x2): Likewise.

gcc/testsuite/ChangeLog:

2017-12-27  Kugan Vivekanandarajah  <kuganv@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vld1x2.c: New test.

From-SVN: r256010

2017-12-27  Martin Liska  <mliska@suse.cz>

	PR tree-optimization/83552
	* tree-ssa-strlen.c (fold_strstr_to_strncmp): Assign result
	of get_string_lenth to a SSA_NAME if not a GIMPLE value.
2017-12-27  Martin Liska  <mliska@suse.cz>

	PR tree-optimization/83552
	* gcc.dg/pr83552.c: New test.

From-SVN: r256009

2017-12-27  Tom de Vries  <tom@codesourcery.com>

	PR c++/83046
	* testsuite/libgomp.oacc-c-c++-common/gang-static-2.c (test_static)
	(test_nonstatic): Fix return type to workaround PR83046.

From-SVN: r256008

2017-12-27  Tom de Vries  <tom@codesourcery.com>

	* config/nvptx/nvptx.c (nvptx_option_override): Disable
	-gstatement-frontiers.

From-SVN: r256007

From-SVN: r256006

2017-12-26  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/83540
	* frontend-passes.c (create_var): If an array to be created
	has unknown size and -fno-realloc-lhs is in effect,
	return NULL.

2017-12-26  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/83540
	* gfortran.dg/inline_matmul_20.f90: New test.

From-SVN: r256003

2017-12-26  Tom de Vries  <tom@codesourcery.com>

	* c-c++-common/unroll-5.c: Use relative line number.

From-SVN: r256002

	PR rtl-optimization/83513
	* sel-sched.c (sel_rank_for_schedule): Order by non-zero usefulness
	before priority comparison.

From-SVN: r256001

From-SVN: r256000

	PR target/83488
	* config/i386/i386.opt (-mavx512vpopcntdq, -mmavx512bitalg): Move from
	ix86_isa_flags2 to ix86_isa_flags.
	* config/i386/i386-c.c (ix86_target_macros_internal): Test
	OPTION_MASK_ISA_AVX512BITALG and OPTION_MASK_ISA_AVX512VPOPCNTDQ in
	isa_flags rather than isa_flags2.
	* config/i386/i386.c (ix86_target_string): Move -mavx512vpopcntdq
	and -mavx512bitalg from isa2_opts to isa_opts.
	(ix86_option_override_internal): Test OPTION_MASK_ISA_AVX512VPOPCNTDQ
	in x_ix86_isa_flags_explicit rather than x_ix86_isa_flags2_explicit
	and set it in x_ix86_isa_flags rather than x_ix86_isa_flags2.
	Formatting fixes.
	(def_builtin): Treat OPTION_MASK_ISA_AVX512BW or
	OPTION_MASK_ISA_AVX512F ored with another option similarly to
	OPTION_MASK_ISA_AVX512VL.  Even for OPTION_MASK_ISA_AVX512VL don't
	clear it if mask is just OPTION_MASK_ISA_AVX512VL itself.
	(ix86_expand_builtin): Don't handle OPTION_MASK_ISA_GFNI and
	OPTION_MASK_ISA_VPCLMULQDQ specially, instead handle
	OPTION_MASK_ISA_AVX512BW and OPTION_MASK_ISA_AVX512F that way.
	* config/i386/i386-builtin.def: Move AVX512VPOPCNTDQ and AVX512BITALG
	builtins from bdesc_args2 to bdesc_args section.
	(__builtin_ia32_compressstoreuqi512_mask,
	__builtin_ia32_compressstoreuhi512_mask,
	__builtin_ia32_compressstoreuqi256_mask,
	__builtin_ia32_expandloadqi512_mask,
	__builtin_ia32_expandloadqi512_maskz,
	__builtin_ia32_expandloadhi512_mask,
	__builtin_ia32_expandloadhi512_maskz,
	__builtin_ia32_compressqi512_mask, __builtin_ia32_compresshi512_mask,
	__builtin_ia32_compressqi256_mask, __builtin_ia32_expandqi512_mask,
	__builtin_ia32_expandqi512_maskz, __builtin_ia32_expandhi512_mask,
	__builtin_ia32_expandhi512_maskz, __builtin_ia32_expandqi256_mask,
	__builtin_ia32_expandqi256_maskz, __builtin_ia32_vpshrd_v32hi_mask,
	__builtin_ia32_vpshld_v32hi_mask, __builtin_ia32_vpshrdv_v32hi_mask,
	__builtin_ia32_vpshrdv_v32hi_maskz, __builtin_ia32_vpshldv_v32hi_mask,
	__builtin_ia32_vpshldv_v32hi_maskz,
	__builtin_ia32_vpopcountb_v64qi_mask,
	__builtin_ia32_vpopcountw_v32hi_mask,
	__builtin_ia32_vpshufbitqmb512_mask,
	__builtin_ia32_vpshufbitqmb256_mask): Add
	" | OPTION_MASK_ISA_AVX512BW".
	(__builtin_ia32_expandloadqi256_mask,
	__builtin_ia32_expandloadqi256_maskz,
	__builtin_ia32_vpopcountb_v32qi_mask): Add
	" | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW".
	(__builtin_ia32_expandloadhi256_mask,
	__builtin_ia32_expandloadhi256_maskz,
	__builtin_ia32_expandloadqi128_mask,
	__builtin_ia32_expandloadqi128_maskz,
	__builtin_ia32_expandloadhi128_mask,
	__builtin_ia32_expandloadhi128_maskz,
	__builtin_ia32_vpshrd_v16hi, __builtin_ia32_vpshrd_v16hi_mask,
	__builtin_ia32_vpshrd_v8hi, __builtin_ia32_vpshrd_v8hi_mask,
	__builtin_ia32_vpshrd_v8si, __builtin_ia32_vpshrd_v8si_mask,
	__builtin_ia32_vpshrd_v4si, __builtin_ia32_vpshrd_v4si_mask,
	__builtin_ia32_vpshrd_v4di, __builtin_ia32_vpshrd_v4di_mask,
	__builtin_ia32_vpshrd_v2di, __builtin_ia32_vpshrd_v2di_mask,
	__builtin_ia32_vpshld_v16hi, __builtin_ia32_vpshld_v16hi_mask,
	__builtin_ia32_vpshld_v8hi, __builtin_ia32_vpshld_v8hi_mask,
	__builtin_ia32_vpshld_v8si, __builtin_ia32_vpshld_v8si_mask,
	__builtin_ia32_vpshld_v4si, __builtin_ia32_vpshld_v4si_mask,
	__builtin_ia32_vpshld_v4di, __builtin_ia32_vpshld_v4di_mask,
	__builtin_ia32_vpshld_v2di, __builtin_ia32_vpshld_v2di_mask,
	__builtin_ia32_vpshrdv_v16hi, __builtin_ia32_vpshrdv_v16hi_mask,
	__builtin_ia32_vpshrdv_v16hi_maskz, __builtin_ia32_vpshrdv_v8hi,
	__builtin_ia32_vpshrdv_v8hi_mask, __builtin_ia32_vpshrdv_v8hi_maskz,
	__builtin_ia32_vpshrdv_v8si, __builtin_ia32_vpshrdv_v8si_mask,
	__builtin_ia32_vpshrdv_v8si_maskz, __builtin_ia32_vpshrdv_v4si,
	__builtin_ia32_vpshrdv_v4si_mask, __builtin_ia32_vpshrdv_v4si_maskz,
	__builtin_ia32_vpshrdv_v4di, __builtin_ia32_vpshrdv_v4di_mask,
	__builtin_ia32_vpshrdv_v4di_maskz, __builtin_ia32_vpshrdv_v2di,
	__builtin_ia32_vpshrdv_v2di_mask, __builtin_ia32_vpshrdv_v2di_maskz,
	__builtin_ia32_vpshldv_v16hi, __builtin_ia32_vpshldv_v16hi_mask,
	__builtin_ia32_vpshldv_v16hi_maskz, __builtin_ia32_vpshldv_v8hi,
	__builtin_ia32_vpshldv_v8hi_mask, __builtin_ia32_vpshldv_v8hi_maskz,
	__builtin_ia32_vpshldv_v8si, __builtin_ia32_vpshldv_v8si_mask,
	__builtin_ia32_vpshldv_v8si_maskz, __builtin_ia32_vpshldv_v4si,
	__builtin_ia32_vpshldv_v4si_mask, __builtin_ia32_vpshldv_v4si_maskz,
	__builtin_ia32_vpshldv_v4di, __builtin_ia32_vpshldv_v4di_mask,
	__builtin_ia32_vpshldv_v4di_maskz, __builtin_ia32_vpshldv_v2di,
	__builtin_ia32_vpshldv_v2di_mask, __builtin_ia32_vpshldv_v2di_maskz,
	__builtin_ia32_vpopcountb_v32qi, __builtin_ia32_vpopcountb_v16qi,
	__builtin_ia32_vpopcountb_v16qi_mask, __builtin_ia32_vpopcountw_v16hi,
	__builtin_ia32_vpopcountw_v16hi_mask, __builtin_ia32_vpopcountw_v8hi,
	__builtin_ia32_vpopcountw_v8hi_mask): Add
	" | OPTION_MASK_ISA_AVX512VL".
	* config/i386/avx512vbmi2intrin.h (_mm512_shrdi_epi16,
	_mm512_shrdi_epi32, _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
	_mm512_shrdi_epi64, _mm512_mask_shrdi_epi64, _mm512_maskz_shrdi_epi64,
	_mm512_shldi_epi16, _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
	_mm512_maskz_shldi_epi32, _mm512_shldi_epi64, _mm512_mask_shldi_epi64,
	_mm512_maskz_shldi_epi64, _mm512_shrdv_epi16, _mm512_shrdv_epi32,
	_mm512_mask_shrdv_epi32, _mm512_maskz_shrdv_epi32, _mm512_shrdv_epi64,
	_mm512_mask_shrdv_epi64, _mm512_maskz_shrdv_epi64, _mm512_shldv_epi16,
	_mm512_shldv_epi32, _mm512_mask_shldv_epi32, _mm512_maskz_shldv_epi32,
	_mm512_shldv_epi64, _mm512_mask_shldv_epi64,
	_mm512_maskz_shldv_epi64): Don't require avx512bw for these intrinsics.
	* config/i386/avx512bitalgintrin.h (_mm_bitshuffle_epi64_mask,
	_mm_mask_bitshuffle_epi64_mask): Likewise.
	* common/config/i386/i386-common.c
	(OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET,
	OPTION_MASK_ISA_AVX512BITALG_SET): Or in OPTION_MASK_ISA_AVX512F_SET.
	(OPTION_MASK_ISA_AVX512F_UNSET): Or in
	OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET and
	OPTION_MASK_ISA_AVX512BITALG_UNSET.
	(OPTION_MASK_ISA2_AVX512F_UNSET,
	OPTION_MASK_ISA2_GENERAL_REGS_ONLY_UNSET): Define.
	(ix86_handle_option): For -mno-general-regs-only, clear from
	ix86_isa_flags2 OPTION_MASK_ISA2_GENERAL_REGS_ONLY_UNSET rather than
	just OPTION_MASK_ISA_MPX.  For -mno-sse{,2,3,4,4.1,4.2,avx,avx2} and
	-mno-ssse3 clear OPTION_MASK_ISA2_AVX512F_UNSET bits from
	ix86_isa_flags2.  For -mno-avx512f likewise, instead of masking
	individually listed ISAs.  For -m{,no-}avx512{vpopcntdq,bitalg} adjust
	for moving from ix86_isa_flags2 to ix86_isa_flags.

From-SVN: r255997

From-SVN: r255996

2017-12-24  Michele Pezzutti <mpezz@tiscali.it>

	PR libstdc++/83237
	* include/bits/random.tcc (poisson_distribution<>::operator()):
	Fix __x = 1 case - see updated Errata of Devroye's treatise.
	* testsuite/26_numerics/random/poisson_distribution/operators/
	values.cc: Add test.
	* testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error
	line number.

From-SVN: r255993

	PR libstdc++/83450
	* testsuite/21_strings/basic_string/pthread18185.cc: Add return
	statement.

From-SVN: r255992

From-SVN: r255991

	PR c++/83553
	* fold-const.c (struct contains_label_data): New type.
	(contains_label_1): Return non-NULL even for CASE_LABEL_EXPR, unless
	inside of a SWITCH_BODY seen during the walk.
	(contains_label_p): Use walk_tree instead of
	walk_tree_without_duplicates, prepare data for contains_label_1 and
	provide own pset.

	* c-c++-common/torture/pr83553.c: New test.

From-SVN: r255987

From-SVN: r255986

	PR debug/83550
	* c-decl.c (finish_struct): Set DECL_SOURCE_LOCATION on
	TYPE_STUB_DECL and call rest_of_type_compilation before processing
	incomplete vars rather than after it.

	* c-c++-common/dwarf2/pr83550.c: New test.

From-SVN: r255981