1. 09 Dec, 2018 11 commits
  2. 08 Dec, 2018 7 commits
  3. 07 Dec, 2018 16 commits
    • decl2.c (grokbitfield): Use DECL_SOURCE_LOCATION in error messages about… · fee11e77
      decl2.c (grokbitfield): Use DECL_SOURCE_LOCATION in error messages about bit-fields with function type...
      
      /cp
      2018-12-07  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	* decl2.c (grokbitfield): Use DECL_SOURCE_LOCATION in error messages
      	about bit-fields with function type, warn_if_not_aligned type, and
      	static bit-fields; avoid DECL_NAME for unnamed declarations.
      
      /testsuite
      2018-12-07  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	* g++.dg/other/bitfield7.C: New.
      	* g++.dg/parse/bitfield8.C: Likewise.
      	* g++.dg/parse/bitfield9.C: Likewise.
      	* g++.dg/pr53037-4.C: Test the locations too.
      
      From-SVN: r266900
      Paolo Carlini committed
    • re PR target/87496 (ICE in aggregate_value_p at gcc/function.c:2046) · 96e14fda
      gcc/
      	PR target/87496
      	* config/rs6000/rs6000.c (rs6000_option_override_internal): Disallow
      	-mabi=ieeelongdouble and -mabi=ibmlongdouble without -mlong-double-128.
      	Do not error for -mabi=ibmlongdouble and no ISA 2.06 support.
      	* doc/invoke.texi: Document -mabi=ibmlongdouble and -mabi=ieeelongdouble
      	require -mlong-double-128.
      
      gcc/testsuite/
      	PR target/87496
      	* gcc.target/powerpc/pr87496.c: Rename from this...
      	* gcc.target/powerpc/pr87496-1.c: ...to this.  Update comment.
      	* gcc.target/powerpc/pr87496-2.c: New test.
      	* gcc.target/powerpc/pr87496-3.c: New test.
      
      From-SVN: r266899
      Peter Bergner committed
    • [AArch64][2/2] Add sve_width -moverride tunable · 886f092f
      On top of the previous patch that implements TARGET_ESTIMATED_POLY_VALUE
      and adds an sve_width tuning field to the CPU structs, this patch implements
      an -moverride knob to adjust this sve_width field to allow for experimentation.
      Again, reminder that this only has an effect when compiling for VLA-SVE that is,
      without msve-vector-bits=<foo>. This just adjusts tuning heuristics in the compiler,,
      like profitability thresholds for vectorised versioned loops, and others.
      
      It can be used, for example like -moverride=sve_width=256 to set the sve_width
      tuning field to 256. Widths outside of the accepted SVE widths [128 - 2048] are rejected
      as you'd expect.
      
          * config/aarch64/aarch64.c (aarch64_tuning_override_functions): Add
          sve_width entry.
          (aarch64_parse_sve_width_string): Define.
      
      
          * gcc.target/aarch64/sve/override_sve_width_1.c: New test.
      
      From-SVN: r266898
      Kyrylo Tkachov committed
    • gimple-ssa-evrp-analyze.h (class evrp_range_analyzer): Add m_update_global_ranges member. · c844c402
      	* gimple-ssa-evrp-analyze.h (class evrp_range_analyzer): Add
      	m_update_global_ranges member.  Add corresponding argument to ctor.
      	* gimple-ssa-evrp-analyze.c
      	(evrp_range_analyzer::evrp_range_analyzer): Add new argument and
      	initialize m_update_global_ranges.
      	(evrp_range_analyzer::set_ssa_range_info): Assert that we are
      	updating global ranges.
      	(evrp_range_analyzer::record_ranges_from_incoming_edge): Only
      	update global ranges if explicitly requested.
      	(evrp_range_analyzer::record_ranges_from_phis): Similarly.
      	(evrp_range_analyzer::record_ranges_from_stmt): Similarly.
      	* gimple-ssa-evrp.c (evrp_dom_walker): Pass new argument to
      	evrp_range_analyzer ctor.
      	* gimple-ssa-sprintf.c (sprintf_dom_walker): Similarly.
      	* tree-ssa-dom.c (dom_opt_dom_walker): Similarly.
      
      	* gcc.c-torture/builtins/strnlen.x: New file to filter -Og from
      	options to test.
      
      From-SVN: r266897
      Jeff Law committed
    • [AArch64][1/2] Implement TARGET_ESTIMATED_POLY_VALUE · 2d56d6ba
      The hook TARGET_ESTIMATED_POLY_VALUE allows a target to give an estimate for a poly_int run-time value.
      It is used exclusively in tuning decisions, things like estimated loop iterations, probabilities etc.
      It is not relied on for correctness.
      
      If we know the SVE width implemented in hardware we can make more more
      informed decisions in the implementation of TARGET_ESTIMATED_POLY_VALUE,
      even when compiling for VLA vectorisation.
      
      This patch adds an sve_width field to our tuning structs and sets it for
      the current CPU tunings.
      
      A new value is introduced to the aarch64_sve_vector_bits_enum enum that indicates
      that SVE is not available: SVE_NOT_IMPLEMENTED. I set it to the same value as SVE_SCALABLE
      so that parts of the aarch64 backend that follow the pattern:
      if (vector_width == SVE_SCALABLE)
        do_vla_friendly_action ()
      else
        assume_specific_width_for_correctness ()
      
      continue to work without change, but the CPU tuning structs can use a more
      appropriate moniker for indicating the absence of SVE.
      
      This sets sve_width to SVE_NOT_IMPLEMENTED for all cores.
      I aim to add an -moverride switch in the next patch that allows a power user to experiment
      with different values of it for investigations.
      
      	* config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum):
      	Add SVE_NOT_IMPLEMENTED value.
      	* config/aarch64/aarch64-protos.h (struct tune_params): Add sve_width
      	field.
      	* config/aarch64/aarch64.c (generic_tunings,cortexa35_tunings,
      	cortexa53_tunings, cortexa57_tunings, cortexa72_tunings,
      	cortexa73_tunings, exynosm1_tunings, thunderx_tunings,
      	thunderx_tunings, tsv110_tunings, xgene1_tunings, qdf24xx_tunings,
      	saphira_tunings, thunderx2t99_tunings, emag_tunings):
      	Specify sve_width.
      	(aarch64_estimated_poly_value): Define.
      	(TARGET_ESTIMATED_POLY_VALUE): Define.
      
      From-SVN: r266896
      Kyrylo Tkachov committed
    • [rs6000] mmintrin.h: fix use of "vector" · 11f1ae2a
      A recent patch inadvertently added the use of "vector" to mmintrin.h
      when all such uses should be "__vector".
      
      [gcc]
      
      2018-12-07  Paul A. Clarke  <pc@us.ibm.com>
      
      	PR target/88408
      	* config/rs6000/mmintrin.h (_mm_packs_pu16): Correctly use "__vector".
      
      From-SVN: r266895
      Paul A. Clarke committed
    • re PR rtl-optimization/88349 ([MIPS] Redundant store instructions generated start with r266385) · 66a0970a
      2018-12-07  Vladimir Makarov  <vmakarov@redhat.com>
      
      	PR rtl-optimization/88349
      	* ira-costs.c (record_operand_costs): Check bigger reg class on
      	NO_REGS.
      
      2018-12-07  Vladimir Makarov  <vmakarov@redhat.com>
      
      	PR rtl-optimization/88349
      	* gcc.target/mips/pr88349.c: New.
      
      From-SVN: r266894
      Vladimir Makarov committed
    • re PR c++/86669 (Complete object constructor clone omits length for a c++11 braced initialiser) · 29f0d7d4
      	PR c++/86669
      	* call.c (make_temporary_var_for_ref_to_temp): Call pushdecl even for
      	automatic vars.
      
      	* g++.dg/cpp0x/initlist105.C: New test.
      	* g++.dg/cpp0x/initlist106.C: New test.
      	* g++.dg/other/pr86669.C: New test.
      
      From-SVN: r266893
      Jakub Jelinek committed
    • [AArch64][SVE] Remove unnecessary PTRUEs from integer arithmetic · 26004f51
      When using the unpredicated immediate forms of MUL, LSL, LSR and ASR,
      the rtl patterns would still have the predicate operand we created for
      the other forms.  This patch splits the patterns after reload in order
      to get rid of the predicate, like we already do for WHILE.
      
      2018-12-07  Richard Sandiford  <richard.sandiford@arm.com>
      
      gcc/
      	* config/aarch64/aarch64-sve.md (*mul<mode>3, *v<optab><mode>3):
      	Split the patterns after reload if we don't need the predicate
      	operand.
      	(*post_ra_mul<mode>3, *post_ra_v<optab><mode>3): New patterns.
      
      gcc/testsuite/
      	* gcc.target/aarch64/sve/pred_elim_2.c: New test.
      
      From-SVN: r266892
      Richard Sandiford committed
    • [AArch64][SVE] Remove unnecessary PTRUEs from FP arithmetic · 740c1ed7
      When using the unpredicated all-register forms of FADD, FSUB and FMUL,
      the rtl patterns would still have the predicate operand we created for
      the other forms.  This patch splits the patterns after reload in order
      to get rid of the predicate, like we already do for WHILE.
      
      2018-12-07  Richard Sandiford  <richard.sandiford@arm.com>
      
      gcc/
      	* config/aarch64/iterators.md (SVE_UNPRED_FP_BINARY): New code
      	iterator.
      	(sve_fp_op): Handle minus and mult.
      	* config/aarch64/aarch64-sve.md (*add<mode>3, *sub<mode>3)
      	(*mul<mode>3): Split the patterns after reload if we don't
      	need the predicate operand.
      	(*post_ra_<sve_fp_op><mode>3): New pattern.
      
      gcc/testsuite/
      	* gcc.target/aarch64/sve/pred_elim_1.c: New test.
      
      From-SVN: r266891
      Richard Sandiford committed
    • runtime: add missing return for non-GNU/Linux version of tgkill · 5a58929b
          
          Path from Rainer Orth.
          
          Reviewed-on: https://go-review.googlesource.com/c/153118
      
      From-SVN: r266890
      Ian Lance Taylor committed
    • Add forgotten PR marker. · e914864f
      From-SVN: r266889
      Rainer Orth committed
    • Build gcc.target/i386/ipa-stack-alignment-2.c with -fomit-frame-pointer · 64b82dfa
      	* gcc.target/i386/ipa-stack-alignment-2.c: Add
      	-fomit-frame-pointer to dg-options.
      
      From-SVN: r266888
      Rainer Orth committed
    • Add a recursion limit to libiberty's demangling code. The limit is enabled by… · e96d1d8c
      Add a recursion limit to libiberty's demangling code.  The limit is enabled by default, but can be disabled via a new demangling option.
      
      include	* demangle.h (DMGL_NO_RECURSE_LIMIT): Define.
              (DEMANGLE_RECURSION_LIMIT): Define
      
      	PR 87681
      	PR 87675
      	PR 87636
      	PR 87350
      	PR 87335
      libiberty * cp-demangle.h (struct d_info): Add recursion_level field.
      	* cp-demangle.c (d_function_type): Add recursion counter.
      	If the recursion limit is reached and the check is not disabled,
      	then return with a failure result.
      	(cplus_demangle_init_info): Initialise the recursion_level field.
              (d_demangle_callback): If the recursion limit is enabled, check
      	for a mangled string that is so long that there is not enough
      	stack space for the local arrays.
              * cplus-dem.c (struct work): Add recursion_level field.
      	(squangle_mop_up): Set the numb and numk fields to zero.
      	(work_stuff_copy_to_from): Handle the case where a btypevec or 
      	ktypevec field is NULL.
      	(demangle_nested_args): Add recursion counter.  If
      	the recursion limit is not disabled and reached, return with a
      	failure result.
      
      From-SVN: r266886
      Nick Clifton committed
    • profile-count.h (profile_count::oeprator>=): Fix typo by inverting return… · 0876cb1c
      profile-count.h (profile_count::oeprator>=): Fix typo by inverting return condition when *this is precise zero.
      
      	* profile-count.h (profile_count::oeprator>=): Fix typo by inverting
      	return condition when *this is precise zero.
      
      From-SVN: r266885
      Bin Cheng committed
    • Daily bump. · 09fb2e2c
      From-SVN: r266884
      GCC Administrator committed
  4. 06 Dec, 2018 6 commits