When using the unpredicated all-register forms of FADD, FSUB and FMUL,
the rtl patterns would still have the predicate operand we created for
the other forms. This patch splits the patterns after reload in order
to get rid of the predicate, like we already do for WHILE.
2018-12-07 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/iterators.md (SVE_UNPRED_FP_BINARY): New code
iterator.
(sve_fp_op): Handle minus and mult.
* config/aarch64/aarch64-sve.md (*add<mode>3, *sub<mode>3)
(*mul<mode>3): Split the patterns after reload if we don't
need the predicate operand.
(*post_ra_<sve_fp_op><mode>3): New pattern.
gcc/testsuite/
* gcc.target/aarch64/sve/pred_elim_1.c: New test.
From-SVN: r266891
