2008-12-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/38402
	* gcc/doc/md.texi: Remove Y and document Yz, Y2, Yi and Ym
	constraints for x86.

From-SVN: r142710

From-SVN: r142611

2008-12-09  Vladimir Makarov  <vmakarov@redhat.com>

	* doc/tm.texi (TARGET_IRA_COVER_CLASSES): Modify description.

	* doc/invoke.texi (-fira-region): Describe new option.
	(-fira-algorithm): Change the values.

	* ira-conflicts.c (build_conflict_bit_table,
	build_allocno_conflicts): Use ira_reg_classes_intersect_p.
	(ira_build_conflicts): Use flag flag_ira_region instead of
	flag_ira_algorithm.  Prohibit usage of callee-saved likely spilled
	base registers for allocnos crossing calls.

	* flags.h (enum ira_algorithm): Redefine.
	(enum ira_region): New.
	(flag_ira_region): New.

	* cfgloopanal.c (estimate_reg_pressure_cost): Use flag_ira_region
	instead of flag_ira_algorithm.

	* toplev.c (flag_ira_algorithm): Change the initial value.
	(flag_ira_region): New.

	* ira-int.h (ira_reg_classes_intersect_p,
	ira_reg_class_super_classes): New.

	* ira-color.c (update_copy_costs): Use
	ira_reg_classes_intersect_p.  Use right class to find hard reg
	index.
	(update_conflict_hard_regno_costs): Ditto.  Add a new parameter.
	(assign_hard_reg): Ditto.  Pass additional argument to
	update_conflict_hard_regno_costs.  Do not uncoalesce for priority
	coloring.
	(allocno_priorities, setup_allocno_priorities,
	allocno_priority_compare_func): Move before color_allocnos.
	(color_allocnos): Add priority coloring.  Use flag flag_ira_region
	instead of flag_ira_algorithm.
	(move_spill_restore): Check classes of the same reg allocno from
	different regions.
	(update_curr_costs): Use ira_reg_classes_intersect_p.
	(ira_reassign_conflict_allocnos): Ditto.

	* opts.c (decode_options): Always set up flag_ira.  Set up
	flag_ira_algorithm.  Warn CB can not be used for architecture.
	(common_handle_option): Modify code for -fira-algorithm.  Add code
	to process -fira-region.

	* ira-lives.c (update_allocno_pressure_excess_length): Process
	superclasses too.
	(set_allocno_live, clear_allocno_live, mark_reg_live,
	mark_reg_dead, process_bb_node_lives): Ditto.

	* ira-emit.c (ira_emit): Fix insn codes.
	
	* ira-build.c (propagate_allocno_info): Use flag flag_ira_region
	instead of flag_ira_algorithm.
	(allocno_range_compare_func): Ignore classes for priority
	coloring.
	(setup_min_max_conflict_allocno_ids): Ditto.
	(ira_flattening): Use ira_reg_classes_intersect_p.

	* genpreds.c (write_enum_constraint_num): Output
	CONSTRAINT__LIMIT.
	
	* common.opt (fira-algorithm): Modify.
	(fira-region): New.

	* ira.c (setup_class_hard_regs): Initialize.
	(setup_cover_and_important_classes): Modify code setting class
	related info for priority coloring.
	(setup_class_translate): Ditto.
	(ira_reg_classes_intersect_p, ira_reg_class_super_classes): New.
	(setup_reg_class_intersect_union): Rename to
	setup_reg_class_relations.  Add code for setting up new variables.
	(find_reg_class_closure): Do not check targetm.ira_cover_classes.
	(ira): Use flag flag_ira_region instead of flag_ira_algorithm.

	* ira-costs.c (common_classes): New.
	(print_costs): Use flag flag_ira_region instead of
	flag_ira_algorithm.
	(find_allocno_class_costs): Ditto.  Use common_classes.  Translate
	alt_class.
	(ira_costs): Allocate/deallocate common_classes.
	
	* config/m32c/m32.h (REG_ALLOC_ORDER): Add reg 19.
	(REG_CLASS_CONTENTS, reg_class, REG_CLASS_NAMES): New entries for
	R02A_REGS.

	* reload1.c (choose_reload_regs): Use MODE_INT for partial ints in
	smallest_mode_for_size.

From-SVN: r142610

	* config/bfin/bfin.opt (micplb): New option.
	* config/bfin/linux.h (SUBTARGET_DRIVER_SELF_SPECS): Set it.
	* config/bfin/bfin-protos.h (WA_INDIRECT_CALLS,
	ENABLE_WA_INDIRECT_CALLS): New macros.
	* config/bfin/bfin.c (bfin_cpus): Add WA_INDIRECT_CALLS to
	all 54x CPUs.
	(indirect_call_p): New function.
	(workaround_speculation): Handle anomaly 05-00-0426 when
	ENABLE_WA_INDIRECT_CALLS is true.
	* config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define
	__WORKAROUND_INDIRECT_CALLS if ENABLE_WA_INDIRECT_CALLS.
	* doc/invoke.texi (Blackfin Options): Document -micplb.

From-SVN: r142240

gcc/
	PR testsuite/28870
	* doc/sourcebuild.texi (Test Directives): Add dg-timeout and
	dg-timeout-factor.

gcc/testsuite/
	PR testsuite/28870
	* lib/timeout.exp: New.
	* lib/timeout-dg.exp: New.
	* lib/gcc-dg.exp: Include new timeout library files.
	(dg-test): Unset timeout variables.
	* lib/gcc.exp (gcc_target_compile): Set timeout value from new proc.
	* lib/g++.exp (g++_target_compile): Ditto.
	* lib/gfortran.exp (gfortran_target_compile): Ditto.
	* lib/objc.exp (objc_target_compile): Ditto.
	* lib/obj-c++.exp (obj-c++_target_compile): Ditto.
	* lib/obj-c++.exp (obj-c++_target_compile): Ditto.
	* lib/gnat.exp (gnat_target_compile): Ditto.

libstdc++-v3/
	PR testsuite/28870
	* testsuite/lib/libstdc++.exp: Include new timeout library files.
	(libstdc++_init): Define tool_timeout.
	(dg-test): Override DejaGnu proc.
	(v3_target_compile): Set timeout value from new proc.
	(v3_target_compile_as_c): Ditto.

libmudflap/
	PR testsuite/28870
	* testsuite/lib/mfdg.exp (dg-test): Use new timeout support.
	(dg-timeout): Remove.
	(standard-wait): Remove.
	* testsuite/lib/libmudflap.exp: Include new timeout library files.
	(libmudflap_target_compile): Set timeout value from new proc.

libgomp/
	PR testsuite/28870
	* testsuite/lib/libgomp.exp: Include new timeout library files.
	(libgomp_target_compile): Set timeout value from new proc.

From-SVN: r142225

2008-11-26  Kai Tietz  <kai.tietz@onevision.com>

        PR/38227
        * calls.c (expand_call): Pass to REG_PARM_STACK_SPACE
        the type of the function, when there is no FUNCTION_DECL available.
        OUTGOING_REG_PARM_STACK_SPACE pass fntype, when no fndecl is available.
        (compute_argument_block_size): Add fntype argument.
        OUTGOING_REG_PARM_STACK_SPACE pass fntype, when no fndecl is available.
        (emit_library_call_value_1): Likewise.
        OUTGOING_REG_PARM_STACK_SPACE pass fntype, when no fndecl is available.
        * config/i386/i386.c (ix86_reg_parm_stack_space): Handle function types.
        * doc/tm.texi (REG_PARM_STACK_SPACE): Adjust documentation.

From-SVN: r142215

2008-11-25  Vladimir Makarov  <vmakarov@redhat.com>

	* doc/invoke.texi (ira-max-loops-num): Change semantics.

	* ira-int.h (struct ira_loop_tree_node): New member to_remove_p.

	* ira-color.c (allocno_spill_priority): New function.
	(remove_allocno_from_bucket_and_push, push_allocno_to_spill):
	Print more info about the spilled allocno.
	(push_allocnos_to_stack): Use allocno_spill_priority.  Add more
	checks on bad spill.

	* ira-build.c (loop_node_to_be_removed_p): Remove.
	(loop_compare_func, mark_loops_for_removal): New functions.
	(remove_uneccesary_loop_nodes_from_loop_t): Use member
	to_remove_p.
	(remove_unnecessary_allocnos): Call mark_loops_for_removal.

	* ira.c (ira): Don't change flag_ira_algorithm.

	* params.def (ira-max-loops-num): Change the value.

From-SVN: r142207

	PR target/37880
	* doc/invoke.texi: Adjust wording of -mcmodel=medium description.

From-SVN: r142112

2008-11-21  Paolo Carlini  <paolo.carlini@oracle.com>

	PR other/38214
	* doc/invoke.texi (Optimization Options): Fix typo.

From-SVN: r142092

re PR middle-end/37908 (atomic NAND op generate wrong code; __sync_nand_and_fetch, __sync_fetch_and_nand)

	PR middle-end/37908
	* optabs.c (expand_sync_operation): Properly handle NAND case
	by calculating ~(t1 & val) instead of (~t1 & val).
	* builtins.c (expand_builtin_sync_operation): Warn for changed
	semantics in NAND builtins.
	* c.opt (Wsync-nand): New warning option.  Describe -Wsync-nand.
	
	* doc/invoke.texi (Warning options): Add Wsync-nand.
	* doc/extend.texi (Atomic Builtins) [__sync_fetch_and_nand]: Correct
	__sync_fetch_and_nand builtin operation in the example.  Add a note
	about changed semantics in GCC 4.4.
	[__sync_nand_and_fetch]: Correct __sync_nand_and_fetch builtin
	operation in the example.  Add a note about changed semantics in
	GCC 4.4.

testsuite/ChangeLog:

	PR middle-end/37908
	* gcc.dg/pr37908.c: New test.
	* gcc.dg/ia64-sync-1.c: Correct __sync_fetch_and_nand and
	__sync_nand_and_fetch results.  Add dg-message to look for the warning
	about changed semantics of NAND builtin.
	(init_si, init_di): Change init value for __sync_fetch_and_nand to -1.
	(test_si, test_di): Change expected result of
	__sync_nand_and_fetch to ~7.
	* gcc.dg/ia64-sync-2.c: Correct __sync_fetch_and_nand and
	__sync_nand_and_fetch results.  Add dg-message to look for the warning
	about changed semantics of NAND builtin.
	(init_noret_si, init_noret_di): Change init value for
	__sync_fetch_and_nand to -1.
	(init_noret_si, init_noret_di): Change expected result of
	__sync_nand_and_fetch to ~7.
	* gcc.dg/sync-2.c: Correct __sync_fetch_and_nand and
	__sync_nand_and_fetch results.  Add dg-message to look for the warning
	about changed semantics of NAND builtin.
	(init_qi, init_qi): Change init value for __sync_fetch_and_nand to -1.
	(init_hi, init_hi): Change expected result of
	__sync_nand_and_fetch to ~7.
	* gcc.dg/sync-3.c: Copy from sync-2.c instead of including
	the c source file.
	* gcc.c-torture/compile/sync-1.c: Add dg-message to look for the
	warning about changed semantics of NAND builtin.
	* gcc.c-torture/compile/sync-2.c: Ditto.
	* gcc.c-torture/compile/sync-3.c: Ditto.

From-SVN: r141942

gcc/
2008-11-15  Joshua Kinard  <kumba@gentoo.org>

	* doc/invoke.texi (-mfix-r10000): Document.
	* config/mips/mips.opt (mfix-r10000): New option.
	* config/mips/mips-protos.h (mips_output_sync_loop): Declare.
	* config/mips/mips.h (MIPS_COMPARE_AND_SWAP): Use %?.
	(MIPS_COMPARE_AND_SWAP_12): Likewise.
	(MIPS_SYNC_OP): Likewise.
	(MIPS_SYNC_OP_12): Likewise.
	(MIPS_SYNC_OLD_OP_12): Likewise.
	(MIPS_SYNC_NEW_OP_12): Likewise.
	(MIPS_SYNC_OLD_OP): Likewise.
	(MIPS_SYNC_NAND): Likewise.
	(MIPS_SYNC_OLD_NAND): Likewise.
	(MIPS_SYNC_EXCHANGE): Likewise.
	(MIPS_SYNC_EXCHANGE_12): Likewise.
	(MIPS_SYNC_NEW_OP): Likewise, using %~ to fill branch-likely
	delay slots.
	(MIPS_SYNC_NEW_NAND): Likewise.
	* config/mips/mips.c (mips_print_operand_punctuation): Handle '~'.
	(mips_init_print_operand_punct): Treat '~' as a punctuation character.
	(mips_output_sync_loop): New function.
	(mips_override_options): Make -march=r10000 imply -mfix-r10000.
	Make -mfix-r10000 require branch-likely instructions.
	* config/mips/sync.md (sync_compare_and_swap<mode>): Use
	mips_output_sync_loop.
	(compare_and_swap_12): Likewise.
	(sync_add<mode>): Likewise.
	(sync_<optab>_12): Likewise.
	(sync_old_<optab>_12): Likewise.
	(sync_new_<optab>_12): Likewise.
	(sync_nand_12): Likewise.
	(sync_old_nand_12): Likewise.
	(sync_new_nand_12): Likewise.
	(sync_sub<mode>): Likewise.
	(sync_old_add<mode>): Likewise.
	(sync_old_sub<mode>): Likewise.
	(sync_new_add<mode>): Likewise.
	(sync_new_sub<mode>): Likewise.
	(sync_<optab><mode>): Likewise.
	(sync_old_<optab><mode>): Likewise.
	(sync_new_<optab><mode>): Likewise.
	(sync_nand<mode>): Likewise.
	(sync_old_nand<mode>): Likewise.
	(sync_new_nand<mode>): Likewise.
	(sync_lock_test_and_set<mode>): Likewise.
	(test_and_set_12): Likewise.

gcc/testsuite/
2008-11-15  Joshua Kinard  <kumba@gentoo.org>
	    Richard Sandiford  <rdsandiford@goolemail.com>

	* gcc.target/mips/fix-r10000-1.c: New test.
	* gcc.target/mips/fix-r10000-2.c: Likewise.
	* gcc.target/mips/fix-r10000-3.c: Likewise.
	* gcc.target/mips/fix-r10000-4.c: Likewise.
	* gcc.target/mips/fix-r10000-5.c: Likewise.
	* gcc.target/mips/fix-r10000-6.c: Likewise.
	* gcc.target/mips/fix-r10000-7.c: Likewise.
	* gcc.target/mips/fix-r10000-8.c: Likewise.
	* gcc.target/mips/fix-r10000-9.c: Likewise.
	* gcc.target/mips/fix-r10000-10.c: Likewise.
	* gcc.target/mips/fix-r10000-11.c: Likewise.
	* gcc.target/mips/fix-r10000-12.c: Likewise.
	* gcc.target/mips/fix-r10000-13.c: Likewise.
	* gcc.target/mips/fix-r10000-14.c: Likewise.
	* gcc.target/mips/fix-r10000-15.c: Likewise.

Co-Authored-By: Richard Sandiford <rdsandiford@googlemail.com>

From-SVN: r141886

2008-11-13  Paul Brook  <paul@codesourcery.com>

	gcc/
	* doc/invoke.texi: Document --fix-cortex-m3.
	* config/arm/arm.c (arm_override_options): Set fix_cm3_ldrd if
	Cortex-M3 cpu is selected.
	(output_move_double): Avoid overlapping base register and first
	destination register when fix_cm3_ldrd.
	* config/arm/arm.opt: Add mfix-cortex-m3-ldrd.

From-SVN: r141822

	PR c++/36478
	Revert:
	2007-05-07  Mike Stump  <mrs@apple.com>
	* doc/invoke.texi (Warning Options): Document that -Wempty-body
	also checks for and while statements in C++.

	Revert:
	2007-05-07  Mike Stump  <mrs@apple.com>
	* parser.c (check_empty_body): Add.
	(cp_parser_iteration_statement): Add call to check_empty_body.

	* g++.old-deja/g++.mike/empty.C: Remove.

From-SVN: r141810

From-SVN: r141745

From-SVN: r141744

	PR target/35574
	* config/sparc/constraints.md (D): New.
	* config/sparc/predicates.md (const_double_or_vector_operand):
	New.
	* config/sparc/sparc.c (sparc_extra_constraint_check): Handle the
	'D' constraint.
	* config/sparc/sparc.md (*movdf_insn_sp32_v9, *movdf_insn_sp64):
	Use the 'D' constraint in addition to 'F' in some alternatives.
	(DF splitter): Generalize for V64mode.
	* doc/md.texi (SPARC): Document the 'D' constraint.

From-SVN: r141644

gcc/
	* doc/sourcebuild.texi (Torture Tests): Add ADDITIONAL_TORTURE_OPTIONS.
gcc/testsuite/
	* lib/c-torture.exp: Use ADDITIONAL_TORTURE_OPTIONS if defined.
	* lib/gcc-dg.exp: Ditto.
	* lib/fortran-torture.exp: Ditto.
	* lib/objc-torture.exp: Ditto.

From-SVN: r141630

        * config/mips.c (mips_conditional_register_usage):  Handle the
        DSP control register.
        * doc/extend.texi: Document the DSP control register.

From-SVN: r141568

2008-10-26  Matthias Klose  <doko@ubuntu.com>

       * doc/install.texi: Document requirements on antlr.

From-SVN: r141373

From-SVN: r141356

	From Mike Frysinger  <michael.frysinger@analog.com>
	* config/bfin/bfin-protos.h (bfin_cpu_type): Add BFIN_CPU_BF512,
	BFIN_CPU_BF514, BFIN_CPU_BF516, and BFIN_CPU_BF518.
	* config/bfin/bfin.c (bfin_cpus[]): Add 0.0 for bf512, bf514, bf516,
	and bf518.  Add 0.2 for bf522, bf523, bf524, bf526, and bf527.
	Add 0.6 for bf533, bf532, and bf531.  Add 0.5 for bf538 and bf539.
	Add 0.2 for bf542, bf544, bf547, bf548, and bf549.
	* config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define __ADSPBF512__
	for BFIN_CPU_BF512, __ADSPBF514__ for BFIN_CPU_BF514, __ADSPBF516__
	for BFIN_CPU_BF516, and __ADSPBF518__ for BFIN_CPU_BF518.  Define
	__ADSPBF51x__ for all of them.
	* config/bfin/elf.h (LIB_SPEC): Select proper linker scripts for
	-mcpu bf512, bf514, bf516, and bf518.
	* config/bfin/t-bfin-elf (MULTILIB_MATCHES): Select bf532-none for
	bf512-none, bf514-none, bf516-none, and bf518-none.
	* config/bfin/t-bfin-linux (MULTILIB_MATCHES): Likewise.
	* config/bfin/t-bfin-uclinux (MULTILIB_MATCHES): Likewise.
	* doc/invoke.texi (Blackfin Options): Document that
	-mcpu now accepts bf512, bf514, bf516, and bf518.

gcc/testsuite/:
	From Mike Frysinger  <michael.frysinger@analog.com>
	* gcc.target/bfin/mcpu-bf522.c: Check SILICON_REVISION is 0x0002.  Invert
	check for __WORKAROUND_RETS when SILICON_REVISION is 0x0002+.
	* gcc.target/bfin/mcpu-bf523.c: Likewise.
	* gcc.target/bfin/mcpu-bf524.c: Likewise.
	* gcc.target/bfin/mcpu-bf525.c: Likewise.
	* gcc.target/bfin/mcpu-bf526.c: Likewise.
	* gcc.target/bfin/mcpu-bf527.c: Likewise.
	* gcc.target/bfin/mcpu-bf531.c: Check SILICON_REVISION is 0x0006.  Invert
	check for __WORKAROUND_RETS when SILICON_REVISION is 0x0006+.
	* gcc.target/bfin/mcpu-bf532.c: Likewise.
	* gcc.target/bfin/mcpu-bf533.c: Likewise.
	* gcc.target/bfin/mcpu-bf538.c: Check SILICON_REVISION is 0x0005.  Invert
	check for __WORKAROUND_RETS when SILICON_REVISION is 0x0005+.
	* gcc.target/bfin/mcpu-bf539.c: Likewise.
	* gcc.target/bfin/mcpu-bf542.c: Check SILICON_REVISION is 0x0002.  Invert
	check for __WORKAROUND_RETS when SILICON_REVISION is 0x0002+.
	* gcc.target/bfin/mcpu-bf544.c: Likewise.
	* gcc.target/bfin/mcpu-bf547.c: Likewise.
	* gcc.target/bfin/mcpu-bf548.c: Likewise.
	* gcc.target/bfin/mcpu-bf549.c: Likewise.
	* gcc.target/bfin/mcpu-bf512.c: New file.
	* gcc.target/bfin/mcpu-bf514.c: Likewise.
	* gcc.target/bfin/mcpu-bf516.c: Likewise.
	* gcc.target/bfin/mcpu-bf518.c: Likewise.

From-SVN: r141305

	PR target/37880
	* doc/invoke.texi: Fix spelling of -mlarge-data-threshold option.
	Adjust -mcmodel=medium description for 2005-07-31 changes.

From-SVN: r141281

	PR middle-end/35853
	* doc/invoke.texi: Remove references to obsoleted -d dumps.

Co-Authored-By: Jakub Jelinek <jakub@redhat.com>

From-SVN: r141280

2008-10-21  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/

	* config.gcc (powerpc-*): Make t-ppcgas imply usegas.h.
	* config/svr4.h (SVR4_ASM_SPEC): New.
	(ASM_SPEC): Inherit from SVR4_ASM_SPEC.
	* config/rs6000/sysv4.h (ASM_SPEC): Inherit from SVR4_ASM_SPEC.

	* doc/invoke.texi (Option Summary): Add -T to linker options.
	(Link Options): Document -T.

From-SVN: r141267

From-SVN: r141240

From-SVN: r141232

2008-10-15  Vladimir Makarov  <vmakarov@redhat.com>

	PR middle-end/37535
	* ira-lives.c (mark_early_clobbers): Remove.
	(make_pseudo_conflict, check_and_make_def_use_conflicts,
	check_and_make_def_conflicts,
	make_early_clobber_and_input_conflicts,
	mark_hard_reg_early_clobbers): New functions.
	(process_bb_node_lives): Call
	make_early_clobber_and_input_conflicts and
	mark_hard_reg_early_clobbers.  Make hard register inputs live
	again.

	* doc/rtl.texi (clobber): Change descriotion of RA behaviour for
	early clobbers of pseudo-registers.

From-SVN: r141160

gcc/
	* doc/rtl.texi (const_double): Remove the "addr" operand.
	Describe CONST_DOUBLE_* macros under const_double rather
	than const_vector.
	(const_fixed): Fix the operand description.
	(const): Add an @findex directive.
	(CONST0_RTX, CONST1_RTX, CONST2_RTX): Move description
	after the constant rtl table.
	(fix): Combine floating-point and fixed-point descriptions.
	Fix hyphenation.
	* sched-deps.c (sched_analyze_2): Remove reference to
	CONST_DOUBLE_CHAIN.

From-SVN: r141149

2008-10-14  Andrey Belevantsev  <abel@ispras.ru>
	    Dmitry Melnik  <dm@ispras.ru>
	    Dmitry Zhurikhin  <zhur@ispras.ru>
	    Alexander Monakov  <amonakov@ispras.ru>
	    Maxim Kuvyrkov  <maxim@codesourcery.com>

	* target.h (struct gcc_target): Update prototypes of needs_block_p
	and gen_spec_check.
	* haifa-sched.c (create_check_block_twin): Update calls to the above.
	* sel-sched.c (create_speculation_check): Likewise.
	* doc/tm.texi: Provide documentation for new target hooks.
		
	* config/ia64/ia64.c: Include sel-sched.h.  Rewrite speculation hooks.
	(ia64_gen_spec_insn): Removed.
	(get_spec_check_gen_function, insn_can_be_in_speculative_p,
	ia64_gen_spec_check): New static functions.
	(ia64_alloc_sched_context, ia64_init_sched_context, 
	ia64_set_sched_context, ia64_clear_sched_context, 
	ia64_free_sched_context, ia64_get_insn_spec_ds, 
	ia64_get_insn_checked_ds, ia64_skip_rtx_p): Declare functions.
	(ia64_needs_block_p): Change prototype.
	(ia64_gen_check): Rename to ia64_gen_spec_check.
	(ia64_adjust_cost): Rename to ia64_adjust_cost_2.  Add new parameter 
	into declaration, add special memory dependencies handling.
	(TARGET_SCHED_ALLOC_SCHED_CONTEXT, TARGET_SCHED_INIT_SCHED_CONTEXT,
	TARGET_SCHED_SET_SCHED_CONTEXT, TARGET_SCHED_CLEAR_SCHED_CONTEXT,
	TARGET_SCHED_FREE_SCHED_CONTEXT, TARGET_SCHED_GET_INSN_SPEC_DS,
	TARGET_SCHED_GET_INSN_CHECKED_DS, TARGET_SCHED_SKIP_RTX_P): 
	Define new target hooks.
	(TARGET_SCHED_GEN_CHECK): Rename to TARGET_SCHED_GEN_SPEC_CHECK.
	(ia64_optimization_options): Turn on selective scheduling with -O3, 
	disable -fauto-inc-dec. Set mflag_sched_control_spec to true by default
	with selective scheduling.
	(ia64_override_options): Initialize align_loops and align_functions 
	to 32 and 64, respectively.  Set global selective scheduling flags 
	according to target-dependent flags.
	(rtx_needs_barrier): Support UNSPEC_LDS_A.
	(group_barrier_needed): Use new mstop-bit-before-check flag. 
	Add heuristic.
	(dfa_state_size): Make global.
	(spec_check_no, max_uid): Remove.
        (mem_ops_in_group, current_cycle): New variables.
	(ia64_sched_init): Disable checks for !SCHED_GROUP_P after reload.
        Initialize new variables.
        (is_load_p, record_memory_reference): New functions.
        (ia64_dfa_sched_reorder): Lower priority of loads when limit is
        reached.
	(ia64_variable_issue): Change use of current_sched_info to 
	sched_deps_info.  Update comment.  Note if a load or a store is issued.
        (ia64_first_cycle_multipass_dfa_lookahead_guard_spec): Require a cycle
        advance if maximal number of loads or stores was issued on current 
        cycle.
	(scheduled_good_insn): New static helper function.
        (ia64_dfa_new_cycle): Assert that last_scheduled_insn is set when 
        a group barrier is needed.  Fix vertical spacing.  Guard the code
        doing state transition with last_scheduled_insn check.                
        Mark that a stop bit should be before current insn if there was a 
        cycle advance.  Update current_cycle and mem_ops_in_group.
	(ia64_h_i_d_extended): Change use of current_sched_info to
        sched_deps_info. Reallocate stops_p by larger chunks.
	(struct _ia64_sched_context): New structure.
	(ia64_sched_context_t): New typedef.
	(ia64_alloc_sched_context, ia64_init_sched_context, 
	ia64_set_sched_context, ia64_clear_sched_context,
	ia64_free_sched_context): New static functions.
	(gen_func_t): New typedef.
	(get_spec_load_gen_function): New function.
	(SPEC_GEN_EXTEND_OFFSET): Declare.	
	(ia64_set_sched_flags): Check common_sched_info instead of *flags.
	(get_mode_no_for_insn): Change the condition that prevents use of 
	special hardware registers so it can now handle pseudos.
	(get_spec_unspec_code): New function.
	(ia64_skip_rtx_p, get_insn_spec_code, ia64_get_insn_spec_ds,
	ia64_get_insn_checked_ds, ia64_gen_spec_load): New static functions.
	(ia64_speculate_insn, ia64_needs_block_p): Support branchy checks
	during selective scheduling.
	(ia64_speculate_insn): Use ds_get_speculation_types when 
	determining whether we need to change the pattern.
	(SPEC_GEN_LD_MAP, SPEC_GEN_CHECK_OFFSET): Declare.
	(ia64_spec_check_src_p): Support new speculation/check codes.
	(struct bundle_state): New field.
	(issue_nops_and_insn): Initialize it.
	(insert_bundle_state): Minimize mid-bundle stop bits.
	(important_for_bundling_p): New function.
	(get_next_important_insn): Use important_for_bundling_p.
	(bundling): When shifting TImode from unimportant insns, ignore 
	also group barriers.  Assert that best state is found before 
	the backward bundling pass.  Print number of mid-bundle stop bits.  
	Minimize mid-bundle stop bits.  Check correct calculation of 
	mid-bundle stop bits.
	(ia64_sched_finish, final_emit_insn_group_barriers): Fix formatting.
	(final_emit_insn_group_barriers): Emit stop bits before insns starting
	a new cycle.
	(sel2_run): New variable.
	(ia64_reorg): When flag_selective_scheduling2 is set, run the selective 
	scheduling pass instead of schedule_ebbs.  
	
	* config/ia64/ia64.md (speculable1, speculable2): New attributes.
	(UNSPEC_LDS_A): New UNSPEC.
	(movqi_internal, movhi_internal, movsi_internal, movdi_internal, 
	movti_internal, movsf_internal, movdf_internal, 
	movxf_internal): Make visible.  Add speculable* attributes.
	(output_c_nc): New mode attribute.
	(mov<mode>_speculative_a, zero_extend<mode>di2_speculative_a,
	mov<mode>_nc, zero_extend<mode>di2_nc, 
	advanced_load_check_nc_<mode>): New insns.
	(zero_extend*): Add speculable* attributes.

	* config/ia64/ia64.opt (msched_fp_mem_deps_zero_cost): New option.
	(msched-stop-bits-after-every-cycle): Likewise.
	(msched-max-memory-insns,
        msched-max-memory-insns-hard-limit): Likewise.
	(msched-spec-verbose): Remove.
	(msched-prefer-non-data-spec-insns,
        msched-prefer-non-control-spec-insns, msched-count-spec-in-critical-path,
	msel-sched-dont-check-control-spec): Use Target 
        Report Var instead of Common Report Var.

	* config/ia64/itanium2.md: Remove incorrect bypass.
	
	* config/ia64/t-ia64 (ia64.o): Add dependency on sel-sched.h.

Co-Authored-By: Alexander Monakov <amonakov@ispras.ru>
Co-Authored-By: Dmitry Melnik <dm@ispras.ru>
Co-Authored-By: Dmitry Zhurikhin <zhur@ispras.ru>
Co-Authored-By: Maxim Kuvyrkov <maxim@codesourcery.com>

From-SVN: r141108

2008-10-13  Andrew Pinski  <andrew_pinski@playstation.sony.com>
            Kaushal Kantawala <Kaushal_Kantawala@playstation.sony.com>
            Trevor Smigiel  <Trevor_Smigiel@playstation.sony.com>
            Grace Cao  <grace_cao@playstation.sony.com>

        * doc/invoke.texi (-mgen-cell-microcode): Document.
        (-mwarn-cell-microcode): Document.
        * cfglayout.c (locator_location): Export.
        * rtl.h (locator_location): Define prototype.
        * config/rs6000/predicates.md (cc_reg_not_micro_cr0_operand): New predicate.
        * rs6000/rs6000-protos.h (rs6000_final_prescan_insn): Define prototype.
        * config/rs6000/rs6000.opt (mgen-cell-microcode): New option.
        (mwarn-cell-microcode): New option.
        * rs6000/rs6000.c (rs6000_cell_dont_microcode): Delete unused variable.
        (rs6000_override_options): Set rs6000_gen_cell_microcode if tuning for
        cell and not already set.
        Turn off string instructions if not generating cell microcode.
        (rs6000_final_prescan_insn): New function that warns about microcoded
        instructions.
        * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Define.
        * config/rs6000/rs6000.md
        Replace cc_reg_not_cr0_operand with cc_reg_not_micro_cr0_operand if
        the instruction would have been microcoded on the Cell.
        Set cell_micro to always on unnamed patterns for the string instructions.
        (cell_micro): Update definition, remove load/store conditional microcoded.
        (sign_extend:DI): Define new pattern for non microcoded version.
        (sign_extend:SI): Likewise.
        (compare (div:P)): Set cell_micro to not.
        (andsi3): Define as an expand.
        (andsi3_mc): New pattern.
        (andsi3_nomc): New pattern.
        (andsi3_internal0_nomc): New pattern.
        (andsi3_internal2): Rename to ...
        (andsi3_internal2_mc): this and enable iff generating microcode.
        (andsi3_internal3): Rename to ...
        (andsi3_internal3_mc): this and enable iff generating microcode.
        (andsi3_internal4): Enable iif generating microcode.
        (andsi3_internal5): Rename to ..
        (andsi3_internal5_mc): this and enable iff generating microcode.
        (andsi3_internal5_nomc): New pattern.
        (extzvdi_internal1): Enable iff generating microcode.
        (extzvdi_internal2): Likewise.
        (rotlsi3_internal7): Set cell_micro to always if non immediate form.
        (anddi3): Change to expand.
        (anddi3_mc): Rename from anddi3.
        (anddi3_no_mc): New pattern.
        (anddi3_internal2): Rename to ..
        (anddi3_internal2_mc): this and enable iff generating microcode.
        (anddi3_internal2_nomc): New pattern.
        (anddi3_internal3): Rename to ..
        (anddi3_internal3_mc): this and enable iff generating microcode.
        (anddi3_internal3_nomc): New pattern.
        (movti_string): Set cell_micro to always if TARGET_STRING.
        (stmsi8): Set cell_micro to always.
        (stmsi7): Likewise.
        (stmsi6): Likewise.
        (stmsi5): Likewise.
        (stmsi4): Likewise.
        (stmsi3): Likewise.
        (stmsi8_power): Likewise.
        (stmsi7_power): Likewise.
        (stmsi6_power): Likewise.
        (stmsi5_power): Likewise.
        (stmsi4_power): Likewise.
        (stmsi3_power): Likewise.
        (movsi_update2): Enable iff generating microcode.
        (movhi_update3): Likewise.
        (lmw): Set cell_micro to always.



Co-Authored-By: Grace Cao <grace_cao@playstation.sony.com>
Co-Authored-By: Kaushal Kantawala <Kaushal_Kantawala@playstation.sony.com>
Co-Authored-By: Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>

From-SVN: r141094

	* doc/install.texi (powerpc-*-*): Require binutils 2.15.
	(powerpc*-*-linux-gnu*): Describe.
	* config/rs6000/ppc-asm.h (HIDDEN_FUNC): New macro.
	* config/rs6000/crtresfpr.asm, config/rs6000/crtresgpr.asm,
	config/rs6000/crtresxfpr.asm, config/rs6000/crtresxgpr.asm,
	config/rs6000/crtsavfpr.asm, config/rs6000/crtsavgpr.asm,
	config/rs6000/e500crtres32gpr.asm,
	config/rs6000/e500crtres64gpr.asm,
	config/rs6000/e500crtres64gprctr.asm,
	config/rs6000/e500crtrest32gpr.asm,
	config/rs6000/e500crtrest64gpr.asm,
	config/rs6000/e500crtresx32gpr.asm,
	config/rs6000/e500crtresx64gpr.asm,
	config/rs6000/e500crtsav32gpr.asm,
	config/rs6000/e500crtsav64gpr.asm,
	config/rs6000/e500crtsav64gprctr.asm,
	config/rs6000/e500crtsavg32gpr.asm,
	config/rs6000/e500crtsavg64gpr.asm,
	config/rs6000/e500crtsavg64gprctr.asm: Use it.
	* config/rs6000/crtsavres.asm: Really remove.

From-SVN: r141090

2008-10-13  Kai Tietz  <kai.tietz@onevision.com>

	Fix PR/25502
	* c-format.c (convert_format_name_to_system_name): Use
	TARGET_OVERRIDES_FORMAT_INIT.
	* config.gcc (extra_options): Add for mingw targets mingw.opt.
	* config/i386/mingw.opt: New.
	* config/i386/mingw32.h (TARGET_OVERRIDES_FORMAT_INIT): New.
	* config/i386/msformat-c.c (TARGET_OVERRIDES_FORMAT_INIT): New.
	(ms_printf_length_specs): Removed const specifier.
	* doc/tm.texi (TARGET_OVERRIDES_FORMAT_INIT): New.
	* doc/invoke.texi (Wno-pedantic-ms-format): New.
	* testsuite/gcc.dg/format/ms-format1.c: New.

From-SVN: r141087

	* configure.ac (MPFR check): Bump minimum version to 2.3.0 and
	recommended version to 2.3.2.

	* configure: Regenerate.

gcc:
	* builtins.c: Remove MPFR_VERSION_NUM(2,3,0) conditionals.
	* doc/install.texi: Bump recommended MPFR to 2.3.2.
	
fortran:
	* simplify.c: Remove MPFR_VERSION_NUM(2,3,0) conditionals.

From-SVN: r141085

2008-10-11  Michael J. Eager  <eager@eagercon.com>

        * config/rs6000/rs6000.c (rs6000_parse_fpu_option): Interpret
        -mfpu options.
        (rs6000_handle_option): Process -mfpu options.
        * config/rs6000/rs6000.h: (TARGET_XILINX_FPU): New.
        (enum fpu_type_t): New.
        * config/rs6000/rs6000.md (attr fp_type): New.
        Include xfpu.md.
        (addsf3, subsf3, mulsf3, adddf3, subdf3, muldf3, trunctfdf2): Set
        fp_type.
        (floatsisf2): Remove TARGET_SINGLE_FPU condition.
        (floatdidf2): Add TARGET_SINGLE_FPU condition.
        * config/rs6000/rs6000.opt (-mfpu): New.
        (-mxilinx-fpu): New.
        * config/rs6000/sysv4.h: (DRIVER_SELF_SPECS): New.
        * config/rs6000/xfpu.h: New. Define TARGET_XILINX_FPU.
        * config/rs6000/xfpu.md: New. Define Xilinx pipeline.
        * gcc/config.gcc: powerpc-xilinx-eabi target: New.
        * gcc/doc/invoke.texi (RS/6000 and PowerPC Options): Add -mfpu option.

From-SVN: r141059

2008-10-10  Stepan Kasal  <skasal@redhat.com>

	* gcc/doc/invoke.texi (Optimize Options): Fix typo in examples
	for loop strip mining and loop blocking.

From-SVN: r141042

gcc/
2008-10-06  Joshua Kinard  <kumba@gentoo.org>

	* doc/invoke.texi: List r1x000 family under the -march MIPS option.
	* config/mips/mips.h (PROCESSOR_R10000): New processor_type.
	* config/mips/mips.c (mips_cpu_info_table): Add r10000, r12000,
	r14000 and r16000.
	(mips_rtx_cost_data): Add a PROCESSOR_R10000 entry.
	(mips_issue_rate): Handle PROCESSOR_R10000.
	* config/mips/mips.md (cpu): Add r10000.
	Include r10000.md.
	* config/mips/10000.md: New file.

From-SVN: r140913

2008-10-06  Vladimir Makarov  <vmakarov@redhat.com>

	PR middle-end/37535

	* ira-lives.c (mark_reg_live, mark_reg_dead): New functions.
	(mark_ref_live, mark_ref_dead): Use them.
	(def_conflicts_with_inputs_p): Remove.
	(mark_early_clobbers): New function.
	(process_bb_node_lives): Call preprocess_constraints and
	mark_early_clobbers.

	* doc/rtx.texi (clobber): Change how RA deals with clobbers.

From-SVN: r140906

gcc/
	* doc/gimple.texi: Fix some typos, wrap some long lines,
	fix some broken wraps with continuations.
	* tree-ssa-reassoc.c: Fix comment typos.

From-SVN: r140887

2008-09-29  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/i386.opt: Add msse2avx.

	* config/i386/linux.h (ASM_SPEC): New.  Support -msse2avx.
	* config/i386/linux64.h (ASM_SPEC): Likewise.

	* doc/invoke.texi: Document -msse2avx.

From-SVN: r140774

        * config/rs6000/predicates.md (easy_fp_constant): Single FP consts
        are easy.
        * config/rs6000/rs6000.c (rs6000_override_options): Move
        rs6000_init_hard_regno_mode_ok after all options changed.
        Set rs6000_single_float, rs6000_double_float if TARGET_HARD_FLOAT.
        (rs6000_handle_option): Process -msingle-float, -mdouble-float,
        -msimple-fpu flags.  Add warning messages if single FP not configured.
        (rs6000_file_start): Output gnu_attribute for single-float.
        (legitimate_lo_sum_address_p): Condition on TARGET_DOUBLE_FLOAT.
        (rs6000_legitimize_address): Likewise.
        (rs6000_legitimize_reload_address): Likewise.
        (rs6000_emit_move): Condition on TARGET_DOUBLE_FLOAT,
        TARGET_SINGLE_FLOAT.
        (function_arg_advance): Likewise (partial conversion).
        (setup_incoming_varargs): Condition on TARGET_DOUBLE_FLOAT.
        (rs6000_gimplify_va_arg): Condition on TARGET_DOUBLE_FLOAT,
        TARGET_SINGLE_FLOAT.
        (rs6000_split_multireg_move): Condition on TARGET_DOUBLE_FLOAT.
        (rs6000_emit_prologue): Likewise.
        (rs6000_function_value): Condition on TARGET_DOUBLE_FLOAT,
        TARGET_SINGLE_FLOAT.
        (rs6000_libcall_value): Likewise.
        * config/rs6000/rs6000.h (TARGET_SINGLE_FLOAT): New default to 1.
        (TARGET_DOUBLE_FLOAT): New default to 1
        (TARGET_SIMPLE_FPU): New default to 0
        (TARGET_SINGLE_FPU): New default to 0
        (TARGET_SINGLE_FLOAT_MODE): New.
        (TARGET_DOUBLE_FLOAT_MODE): New.
        * config/rs6000/singlefp.h: New; redefine TARGET_SINGLE_FLOAT,
        TARGET_DOUBLE_FLOAT, TARGET_SIMPLE_FPU, TARGET_SINGLE_FPU,
        UNITS_PER_FP_WORD
        * config/rs6000/rs6000.md (define_mode_iterator): Condition on
        TARGET_DOUBLE_FLOAT, TARGET_SINGLE_FLOAT.
        (extendsfdf2, extendsfdf2_fpr, truncdfsf2, truncdfsf2_fpr,
        copysigndf3,fseldfsf4, negdf2, negdf2_fpr, absdf2, absdf2_fpr,
        nabsdf2_fpr, adddf3, adddf3_fpr, subdf3, subdf3_fpr, muldf3,
        muldf3_fpr, divdf3, divdf3_fpr, sqrtdf2, smaxdf3, smindf3,
        movdfcc, *fseldfdf4, floatsidf2, *floatsidf2_internal,
        floatunssidf2, *floatunssidf2_internal, fix_truncdfsi2,
        *fix_truncdfsi2_internal, fix_truncdfsi2_internal_gfxopt,
        fix_truncdfsi2_mfpgpr, fctiwz, btruncdf2, ceildf2, floordf2,
        rounddf2, floatdidf2, floatsidf_ppc64_mfpgpr, floatsidf_ppc64,
        floatunssidf_ppc64, fix_truncdfdi2, movdf_hardfloat32,
        movdf_hardfloat64_mfpgpr, movdf_hardfloat64, extenddftf2_fprs,
        extenddftf2_internal, trunctfdf2_internal2, fix_trunc_helper,
        abstf2_internal, movdf_update1, movdf_update2, cmpdf_internal1,
        cmptf_internal1, *cmptf_internal2): Condition on
        TARGET_DOUBLE_FLOAT.
        (aux_truncdfsf2, negsf2, *negsf2, abssf2, *abssf2, addsf3, subsf3,
        mulsf3, divsf3, sqrtsf2, copysignsf3, smaxsf3, sminsf3, movsfcc,
        *fselsfsf4, fixuns_truncsfsi2, fix_truncsfsi2, floatunssisf2,
        btruncsf2, ceilsf2, floorsf2, roundsf2, floatdisf2_internal1,
        floatdisf2_internal2, *movsf_hardfloat, trunctfsf2_fprs,
        *movsf_update1, *movsf_update2, *cmpsf_internal1): Condition on
        TARGET_SINGLE_FLOAT.
        (divsf3, sqrtsf2, divdf3, divdf3_fpr): Condition on TARGET_SIMPLE_FPU.
        * config/rs6000/rs6000.opt (-msingle-float): New.
        (-mdouble-float): New.
        (-msimple-fpu): New.
        * doc/invoke.texi (RS/6000 and PowerPC Options): Add
        -msingle-float, -mdouble-float, -msimple-fpu options.
        * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Set
        _SOFT_DOUBLE for -msingle-float.
        * config.gcc: New config for target=powerpc-xilinx-eabi.

From-SVN: r140757