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riscv-gcc-1
Commit 696e45ba by Michael J. Eager Committed by David Edelsohn
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predicates.md (easy_fp_constant): Single FP consts are easy. 

        * config/rs6000/predicates.md (easy_fp_constant): Single FP consts
        are easy.
        * config/rs6000/rs6000.c (rs6000_override_options): Move
        rs6000_init_hard_regno_mode_ok after all options changed.
        Set rs6000_single_float, rs6000_double_float if TARGET_HARD_FLOAT.
        (rs6000_handle_option): Process -msingle-float, -mdouble-float,
        -msimple-fpu flags.  Add warning messages if single FP not configured.
        (rs6000_file_start): Output gnu_attribute for single-float.
        (legitimate_lo_sum_address_p): Condition on TARGET_DOUBLE_FLOAT.
        (rs6000_legitimize_address): Likewise.
        (rs6000_legitimize_reload_address): Likewise.
        (rs6000_emit_move): Condition on TARGET_DOUBLE_FLOAT,
        TARGET_SINGLE_FLOAT.
        (function_arg_advance): Likewise (partial conversion).
        (setup_incoming_varargs): Condition on TARGET_DOUBLE_FLOAT.
        (rs6000_gimplify_va_arg): Condition on TARGET_DOUBLE_FLOAT,
        TARGET_SINGLE_FLOAT.
        (rs6000_split_multireg_move): Condition on TARGET_DOUBLE_FLOAT.
        (rs6000_emit_prologue): Likewise.
        (rs6000_function_value): Condition on TARGET_DOUBLE_FLOAT,
        TARGET_SINGLE_FLOAT.
        (rs6000_libcall_value): Likewise.
        * config/rs6000/rs6000.h (TARGET_SINGLE_FLOAT): New default to 1.
        (TARGET_DOUBLE_FLOAT): New default to 1
        (TARGET_SIMPLE_FPU): New default to 0
        (TARGET_SINGLE_FPU): New default to 0
        (TARGET_SINGLE_FLOAT_MODE): New.
        (TARGET_DOUBLE_FLOAT_MODE): New.
        * config/rs6000/singlefp.h: New; redefine TARGET_SINGLE_FLOAT,
        TARGET_DOUBLE_FLOAT, TARGET_SIMPLE_FPU, TARGET_SINGLE_FPU,
        UNITS_PER_FP_WORD
        * config/rs6000/rs6000.md (define_mode_iterator): Condition on
        TARGET_DOUBLE_FLOAT, TARGET_SINGLE_FLOAT.
        (extendsfdf2, extendsfdf2_fpr, truncdfsf2, truncdfsf2_fpr,
        copysigndf3,fseldfsf4, negdf2, negdf2_fpr, absdf2, absdf2_fpr,
        nabsdf2_fpr, adddf3, adddf3_fpr, subdf3, subdf3_fpr, muldf3,
        muldf3_fpr, divdf3, divdf3_fpr, sqrtdf2, smaxdf3, smindf3,
        movdfcc, *fseldfdf4, floatsidf2, *floatsidf2_internal,
        floatunssidf2, *floatunssidf2_internal, fix_truncdfsi2,
        *fix_truncdfsi2_internal, fix_truncdfsi2_internal_gfxopt,
        fix_truncdfsi2_mfpgpr, fctiwz, btruncdf2, ceildf2, floordf2,
        rounddf2, floatdidf2, floatsidf_ppc64_mfpgpr, floatsidf_ppc64,
        floatunssidf_ppc64, fix_truncdfdi2, movdf_hardfloat32,
        movdf_hardfloat64_mfpgpr, movdf_hardfloat64, extenddftf2_fprs,
        extenddftf2_internal, trunctfdf2_internal2, fix_trunc_helper,
        abstf2_internal, movdf_update1, movdf_update2, cmpdf_internal1,
        cmptf_internal1, *cmptf_internal2): Condition on
        TARGET_DOUBLE_FLOAT.
        (aux_truncdfsf2, negsf2, *negsf2, abssf2, *abssf2, addsf3, subsf3,
        mulsf3, divsf3, sqrtsf2, copysignsf3, smaxsf3, sminsf3, movsfcc,
        *fselsfsf4, fixuns_truncsfsi2, fix_truncsfsi2, floatunssisf2,
        btruncsf2, ceilsf2, floorsf2, roundsf2, floatdisf2_internal1,
        floatdisf2_internal2, *movsf_hardfloat, trunctfsf2_fprs,
        *movsf_update1, *movsf_update2, *cmpsf_internal1): Condition on
        TARGET_SINGLE_FLOAT.
        (divsf3, sqrtsf2, divdf3, divdf3_fpr): Condition on TARGET_SIMPLE_FPU.
        * config/rs6000/rs6000.opt (-msingle-float): New.
        (-mdouble-float): New.
        (-msimple-fpu): New.
        * doc/invoke.texi (RS/6000 and PowerPC Options): Add
        -msingle-float, -mdouble-float, -msimple-fpu options.
        * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Set
        _SOFT_DOUBLE for -msingle-float.
        * config.gcc: New config for target=powerpc-xilinx-eabi.

From-SVN: r140757
parent ccad7589
Showing with 110 additions and 3 deletions
gcc/ChangeLog
2008-09-29 Michael J. Eager <eager@eagercon.com>
* config/rs6000/predicates.md (easy_fp_constant): Single FP consts
are easy.
* config/rs6000/rs6000.c (rs6000_override_options): Move
rs6000_init_hard_regno_mode_ok after all options changed.
Set rs6000_single_float, rs6000_double_float if TARGET_HARD_FLOAT.
(rs6000_handle_option): Process -msingle-float, -mdouble-float,
-msimple-fpu flags. Add warning messages if single FP not configured.
(rs6000_file_start): Output gnu_attribute for single-float.
(legitimate_lo_sum_address_p): Condition on TARGET_DOUBLE_FLOAT.
(rs6000_legitimize_address): Likewise.
(rs6000_legitimize_reload_address): Likewise.
(rs6000_emit_move): Condition on TARGET_DOUBLE_FLOAT,
TARGET_SINGLE_FLOAT.
(function_arg_advance): Likewise (partial conversion).
(setup_incoming_varargs): Condition on TARGET_DOUBLE_FLOAT.
(rs6000_gimplify_va_arg): Condition on TARGET_DOUBLE_FLOAT,
TARGET_SINGLE_FLOAT.
(rs6000_split_multireg_move): Condition on TARGET_DOUBLE_FLOAT.
(rs6000_emit_prologue): Likewise.
(rs6000_function_value): Condition on TARGET_DOUBLE_FLOAT,
TARGET_SINGLE_FLOAT.
(rs6000_libcall_value): Likewise.
* config/rs6000/rs6000.h (TARGET_SINGLE_FLOAT): New default to 1.
(TARGET_DOUBLE_FLOAT): New default to 1
(TARGET_SIMPLE_FPU): New default to 0
(TARGET_SINGLE_FPU): New default to 0
(TARGET_SINGLE_FLOAT_MODE): New.
(TARGET_DOUBLE_FLOAT_MODE): New.
* config/rs6000/singlefp.h: New; redefine TARGET_SINGLE_FLOAT,
TARGET_DOUBLE_FLOAT, TARGET_SIMPLE_FPU, TARGET_SINGLE_FPU,
UNITS_PER_FP_WORD
* config/rs6000/rs6000.md (define_mode_iterator): Condition on
TARGET_DOUBLE_FLOAT, TARGET_SINGLE_FLOAT.
(extendsfdf2, extendsfdf2_fpr, truncdfsf2, truncdfsf2_fpr,
copysigndf3,fseldfsf4, negdf2, negdf2_fpr, absdf2, absdf2_fpr,
nabsdf2_fpr, adddf3, adddf3_fpr, subdf3, subdf3_fpr, muldf3,
muldf3_fpr, divdf3, divdf3_fpr, sqrtdf2, smaxdf3, smindf3,
movdfcc, *fseldfdf4, floatsidf2, *floatsidf2_internal,
floatunssidf2, *floatunssidf2_internal, fix_truncdfsi2,
*fix_truncdfsi2_internal, fix_truncdfsi2_internal_gfxopt,
fix_truncdfsi2_mfpgpr, fctiwz, btruncdf2, ceildf2, floordf2,
rounddf2, floatdidf2, floatsidf_ppc64_mfpgpr, floatsidf_ppc64,
floatunssidf_ppc64, fix_truncdfdi2, movdf_hardfloat32,
movdf_hardfloat64_mfpgpr, movdf_hardfloat64, extenddftf2_fprs,
extenddftf2_internal, trunctfdf2_internal2, fix_trunc_helper,
abstf2_internal, movdf_update1, movdf_update2, cmpdf_internal1,
cmptf_internal1, *cmptf_internal2): Condition on
TARGET_DOUBLE_FLOAT.
(aux_truncdfsf2, negsf2, *negsf2, abssf2, *abssf2, addsf3, subsf3,
mulsf3, divsf3, sqrtsf2, copysignsf3, smaxsf3, sminsf3, movsfcc,
*fselsfsf4, fixuns_truncsfsi2, fix_truncsfsi2, floatunssisf2,
btruncsf2, ceilsf2, floorsf2, roundsf2, floatdisf2_internal1,
floatdisf2_internal2, *movsf_hardfloat, trunctfsf2_fprs,
*movsf_update1, *movsf_update2, *cmpsf_internal1): Condition on
TARGET_SINGLE_FLOAT.
(divsf3, sqrtsf2, divdf3, divdf3_fpr): Condition on TARGET_SIMPLE_FPU.
* config/rs6000/rs6000.opt (-msingle-float): New.
(-mdouble-float): New.
(-msimple-fpu): New.
* doc/invoke.texi (RS/6000 and PowerPC Options): Add
-msingle-float, -mdouble-float, -msimple-fpu options.
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Set
_SOFT_DOUBLE for -msingle-float.
* config.gcc: New config for target=powerpc-xilinx-eabi.
2008-09-29 Tobias Grosser <grosser@fim.uni-passau.de>
* graphite.c (dot_all_scops_1): Remove unused checks. SCoPs always have
......
gcc/config.gcc
......@@ -1791,6 +1791,11 @@ powerpc-*-eabialtivec*)
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcendian rs6000/t-ppccomm"
;;
powerpc-xilinx-eabi*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/eabi.h rs6000/singlefp.h"
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcgas rs6000/t-ppccomm"
;;
powerpc-*-eabi*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h"
extra_options="${extra_options} rs6000/sysv4.opt"
......
gcc/config/rs6000/predicates.md
......@@ -192,7 +192,8 @@
return 0;
/* Consider all constants with -msoft-float to be easy. */
if ((TARGET_SOFT_FLOAT || TARGET_E500_SINGLE)
if ((TARGET_SOFT_FLOAT || TARGET_E500_SINGLE
|| (TARGET_HARD_FLOAT && (TARGET_SINGLE_FLOAT && ! TARGET_DOUBLE_FLOAT)))
&& mode != DImode)
return 1;
......
gcc/config/rs6000/rs6000-c.c
......@@ -297,7 +297,8 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile)
builtin_define ("__PAIRED__");
if (TARGET_SOFT_FLOAT)
builtin_define ("_SOFT_FLOAT");
if (!(TARGET_HARD_FLOAT && (TARGET_FPRS || TARGET_E500_DOUBLE)))
if ((!(TARGET_HARD_FLOAT && (TARGET_FPRS || TARGET_E500_DOUBLE)))
||(TARGET_HARD_FLOAT && TARGET_FPRS && !TARGET_DOUBLE_FLOAT))
builtin_define ("_SOFT_DOUBLE");
/* Used by lwarx/stwcx. errata work-around. */
if (rs6000_cpu == PROCESSOR_PPC405)
......
gcc/config/rs6000/rs6000.h
......@@ -298,6 +298,14 @@ enum processor_type
PROCESSOR_CELL
};
/* FPU operations supported.
Each use of TARGET_SINGLE_FLOAT or TARGET_DOUBLE_FLOAT must
also test TARGET_HARD_FLOAT. */
#define TARGET_SINGLE_FLOAT 1
#define TARGET_DOUBLE_FLOAT 1
#define TARGET_SINGLE_FPU 0
#define TARGET_SIMPLE_FPU 0
extern enum processor_type rs6000_cpu;
/* Recast the processor type to the cpu attribute. */
......
gcc/config/rs6000/rs6000.opt
......@@ -260,3 +260,15 @@ Specify alignment of structure fields default/natural
mprioritize-restricted-insns=
Target RejectNegative Joined UInteger Var(rs6000_sched_restricted_insns_priority)
Specify scheduling priority for dispatch slot restricted insns
msingle-float
Target RejectNegative Var(rs6000_single_float)
Single-precision floating point unit
mdouble-float
Target RejectNegative Var(rs6000_double_float)
Double-precision floating point unit
msimple-fpu
Target RejectNegative Var(rs6000_simple_fpu)
Floating point unit does not support divide & sqrt
gcc/doc/invoke.texi
......@@ -715,6 +715,7 @@ See RS/6000 and PowerPC Options.
-m64 -m32 -mxl-compat -mno-xl-compat -mpe @gol
-malign-power -malign-natural @gol
-msoft-float -mhard-float -mmultiple -mno-multiple @gol
-msingle-float -mdouble-float -msimple-fpu @gol
-mstring -mno-string -mupdate -mno-update @gol
-mfused-madd -mno-fused-madd -mbit-align -mno-bit-align @gol
-mstrict-align -mno-strict-align -mrelocatable @gol
......@@ -13419,7 +13420,8 @@ following options:
@gccoptlist{-maltivec -mfprnd -mhard-float -mmfcrf -mmultiple @gol
-mnew-mnemonics -mpopcntb -mpower -mpower2 -mpowerpc64 @gol
-mpowerpc-gpopt -mpowerpc-gfxopt -mstring -mmulhw -mdlmzb -mmfpgpr}
-mpowerpc-gpopt -mpowerpc-gfxopt -msingle-float -mdouble-float @gol
-msimple-fpu -mstring -mmulhw -mdlmzb -mmfpgpr}
The particular options set for any particular CPU will vary between
compiler versions, depending on what setting seems to produce optimal
......@@ -13636,6 +13638,17 @@ Generate code that does not use (uses) the floating-point register set.
Software floating point emulation is provided if you use the
@option{-msoft-float} option, and pass the option to GCC when linking.
@item -msingle-float
@itemx -mdouble-float
@opindex msingle-float
@opindex mdouble-float
Generate code for single or double-precision floating point operations.
@option{-mdouble-float} implies @option{-msingle-float}.
@item -msimple-fpu
@opindex msimple-fpu
Do not generate sqrt and div instructions for hardware floating point unit.
@item -mmultiple
@itemx -mno-multiple
@opindex mmultiple
......
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