This patch has no functional change.  The code used for parsing -mcpu,
-mtune and -march options is simply moved from arm.c arm-common.c.
The list of FPU options is also moved.  Subsequent patches will make
use of this within the driver.

Some small adjustments are needed as a consequence of moving the
definitions of the data objects to another object file, in that we
no-longer have direct access to the size of the object.

	* common/config/arm/arm-common.c (arm_initialize_isa): Moved here from
	config/arm/arm.c.
	(arm_print_hint_for_cpu_option): Likewise.
	(arm_print_hint_for_arch_option): Likewise.
	(arm_parse_cpu_option_name): Likewise.
	(arm_parse_arch_option_name): Likewise.
	* config/arm/arm.c (arm_identify_fpu_from_isa): Use the computed number
	of entries in the all_fpus list.
	* config/arm/arm-protos.h (all_architectures, all_cores): Declare.
	(arm_parse_cpu_option_name): Declare.
	(arm_parse_arch_option_name): Declare.
	(arm_parse_option_features): Declare.
	(arm_intialize_isa): Declare.
	* config/arm/parsecpu.awk (gen_data): Move CPU and architecture
	data tables to ...
	(gen_comm_data): ... here.  Make definitions non-static.
	* config/arm/arm-cpu-data.h: Regenerated.
	* config/arm/arm-cpu-cdata.h: Regenerated.

From-SVN: r249287

The driver really needs to handle some canonicalization of the new
-mcpu and -march options in order to make multilib selection
tractable.  This will require moving much of the logic to parse the
new options into the common code file.  However, the tuning data
definitely does not want to be there as it is very specific to the
compiler passes.  To facilitate this we need to split up the generated
configuration data into architectural and tuning related tables.

This patch starts that process, but does not yet move any code out of
the compiler backend.  Since I'm reworking all that code I took the
opportunity to also separate out the CPU data tables from the
architecture data tables.  Although they are related, there is a lot
of redundancy in the CPU options that is best handled by simply
indirecting to the architecture entry.

	* config/arm/arm-protos.h (arm_build_target): Remove arch_core.
	(cpu_arch_extension): New structure.
	(cpu_arch_option, arch_option, cpu_option): New structures.
	* config/arm/parsecpu.awk (gen_headers): Build an enumeration of
	architecture types.
	(gen_data): Generate new format data tables.
	* config/arm/arm.c (cpu_tune): New structure.
	(cpu_option, processors): Delete.
	(arm_print_hint_for_core_or_arch): Delete.  Replace with ...
	(arm_print_hint_for_cpu_option): ... this and ...
	(arm_print_hint_for_arch_option): ... this.
	(arm_parse_arch_cpu_name): Delete.  Replace with ...
	(arm_parse_cpu_option_name): ... this and ...
	(arm_parse_arch_option_name): ... this.
	(arm_unrecognized_feature): Change type of target parameter to
	cpu_arch_option.
	(arm_parse_arch_cpu_features): Delete.  Replace with ...
	(arm_parse_option_features): ... this.
	(arm_configure_build_target): Rework to use new configuration data
	tables.
	(arm_print_tune_info): Rework for new configuration data tables.
	* config/arm/arm-cpu-data.h: Regenerated.
	* config/arm/arm-cpu.h: Regenerated.

From-SVN: r249286

The ARM option parsing code uses sbitmap data structures to manage
features and upcoming patches will shortly need to use these bitmaps
within the driver.  This patch moves sbitmap.o from OBJS to
OBJS-libcommon to facilitate this.

The patch has no impact on targets that don't need this functionality,
since the object is part of an archive and will only be extracted if
needed.

	* Makefile.in (OBJS): Move sbitmap.o from here ...
	(OBJS-libcommon): ... to here.

From-SVN: r249285

This patch adds the default CPUs for each cpu and provides options for
changing the FPU variant when appropriate.

It turns out to be easier to describe removal options using general
mask operations that disable a concept rather than specific bits.
Sometimes the helper definitions for enabling a feature are not excat
duals when it comes to disabling them - for example, +simd forcibly
turns on double-precision capabilities in the FPU, but disabling just
simd (+nosimd) should not forcibly disable that.

	* config/arm/arm-isa.h (ISA_ALL_FPU_INTERNAL): Renamed from ISA_ALL_FPU.
	(ISA_ALL_CRYPTO): New macro.
	(ISA_ALL_SIMD): New macro
	(ISA_ALL_FP): New macro.
	* config/arm/arm.c (fpu_bitlist): Update initializer.
	* config/arm/arm-cpus.in: Use new ISA_ALL macros to disable crypto,
	simd or fp.
	(arm9e): Add fpu.  Add option for nofp
	(arm946e-s, arm966e-s, arm968e-s, arm10e, arm1020e, arm1022e): Likewise.
	(arm926ej-s, arm1026ej-s): Likewise.
	(generic-armv7-a): Add fpu.  Add options for simd, vfpv3, vfpv3-d16,
	vfpv3-fp16, vfpv3-d16-fp16, vfpv4, vfpv4-d16, neon, neon-vfp3,
	neon-fp16, neon-vfpv4, nofp and nosimd.
	(cortex-a5, cortex-a7): Add fpu.  Add options for nosimd and nofp.
	(cortex-a8): Add fpu.  Add option for nofp.
	(cortex-a9): Add fpu.  Add options for nosimd and nofp.
	(cortex-a12, cortex-a15, cortex-a17): Add fpu.  Add option for nofp.
	(cortex-r4f): Add fpu.
	(cortex-r5): Add fpu.  Add options for nofp.dp and nofp.
	(cortex-r7): Use idiv option from architecture.  Add fpu.  Add option
	for nofp.
	(cortex-r8): Likewise.
	(cortex-m4): Add fpu.  Add option for nofp.
	(cortex-a15.cortex-a7): Add fpu.  Add option for nofp.
	(cortex-a17.cortex-a7): Likewise.
	(cortex-a32): Add fpu.  Add options for crypto and nofp.
	(cortex-a35, cortex-a53): Likewise.
	(cortex-a57): Add fpu.  Add option for crypto.
	(cortex-a72, cortex-a73): Likewise.
	(exynos-m1): Likewise.
	(cortex-a57.cortex-a53, cortex-a72.cortex-a53): Likewise.
	(cortex-a73.cortex-a35, cortex-a73.cortex-a53): Likewise.
	(cortex-m33): Add fpu.  Add option for nofp.
	* config/arm/arm-cpu-cdata.h: Regenerated
	* config/arm/arm-cpu-data.h: Regenerated.

From-SVN: r249284

This patch adds the currently supported architecture options to the
individual architectures.  For floating point and SIMD we only permit
variants that the relevant versions of the architecture permit.  We also
add short-hand versions (+fp, +simd, etc) that allows the user to
describe using floating point without having to know the precise version
of the floating point sub-architecture that that architecture requires.

In a small number of cases we need to provide more precise versions of the
floating point architecture.  In those cases we permit traditional -mfpu
style names in the architecture description.

	* arm-cpus.in (armv5e): Add options fp, vfpv2 and nofp.
	(armv5te, armv5tej): Likewise.
	(armv6, armv6j, armv6k, armv6z, armv6kz, armv6zk, armv6t2): Likewise.
	(armv7): Add options fp and vfpv3-d16.
	(armv7-a): Add options fp, simd, vfpv3, vfpv3-d16, vfpv3-d16-fp16,
	vfpv3-fp16, vfpv4, vfpv4-d16, neon, neon-vfpv3, neon-fp16, neon-vfpv4,
	nofp and nosimd.
	(armv7ve): Likewise.
	(armv7-r): Add options fp, fp.sp, idiv, nofp and noidiv.
	(armv7e-m): Add options fp, fpv5, fp.dp and nofp.
	(armv8-a): Add nocrypto option.
	(armv8.1-a, armv8.2-a): Likewise.
	(armv8-m.main): add options fp, fp.dp and nofp.

From-SVN: r249283

This is the main patch to provide the infrastructure for adding
feature extensions to CPU and architecture specifications.  It does not,
however, add all the extensions that we intend to support (just a small
number to permit some basic testing).  Now, instead of having specific
entries in the architecture table for variants such as armv8-a+crc, the
crc extension is specified as an optional component of the armv8-a
architecture entry.  Similar control can be added to CPU option names.
In both cases the list of permitted options is controlled by the main
architecture or CPU name to prevent arbitrary cross-products of options.

	* config/arm/arm-cpus.in (armv8-a): Add options crc, simd crypto and
	nofp.
	(armv8-a+crc): Delete.
	(armv8.1-a): Add options simd, crypto and nofp.
	(armv8.2-a): Add options fp16, simd, crypto and nofp.
	(armv8.2-a+fp16): Delete.
	(armv8-m.main): Add option dsp.
	(armv8-m.main+dsp): Delete.
	(cortex-a8): Add fpu.  Add nofp option.
	(cortex-a9): Add fpu.  Add nofp and nosimd options.
	* config/arm/parsecpu.awk (gen_data): Generate option tables and
	link to main cpu and architecture data structures.
	(gen_comm_data): Only put isa attributes from the main architecture
	in common tables.
	(option): New statement for architecture and CPU entries.
	* arm.c (struct cpu_option): New structure.
	(struct processors): Add entry for options.
	(arm_unrecognized_feature): New function.
	(arm_parse_arch_cpu_name): Ignore any characters after the first
	'+' character.
	(arm_parse_arch_cpu_feature): New function.
	(arm_configure_build_target): Separate out any CPU and architecture
	features and parse separately.  Don't error out if -mfpu=auto is
	used with only an architecture string.
	(arm_print_asm_arch_directives): New function.
	(arm_file_start): Call it.
	* config/arm/arm-cpu-cdata.h: Regenerated.
	* config/arm/arm-cpu-data.h: Likewise.
	* config/arm/arm-tables.opt: Likewise.

From-SVN: r249282

The assembler doesn't understand -mfpu=auto.  The easiest way to handle this
is to surpress this value from being passed through, while still passing
through legacy values.

	* config/arm/elf.h (ASM_SPEC): Only pass -mfpu through to the
	assembler when it is not -mfpu=auto.

From-SVN: r249281

The assembler does not understand all the '+' options accepted by the
compiler.  The best solution to this is to simply strip the extensions
and just pass the raw architecture or cpu name through to the
assembler.  We will use .arch and .arch_extension directives anyway to
turn on or off individual features.  We already do something similar
for big.little combinations and this just extends this principle a bit
further.  This patch also fixes a possible bug by ensuring that the
limited string copy is correctly NUL-terminated.

While messing with this code I've also taken the opportunity to clean up
the duplicate definitions of EXTRA_SPEC_FUNCTIONS by moving it outside of
the ifdef wrapper.

	* config/arm/arm.h (BIG_LITTLE_SPEC): Delete macro.
	(ASM_REWRITE_SPEC_FUNCTIONS): New macro.
	(BIG_LITTLE_CPU_SPEC_FUNCTIONS): Delete macro.
	(ASM_CPU_SPEC): Rewrite.
	(MCPU_MTUNE_NATIVE_FUNCTIONS): New macro.
	(EXTRA_SPEC_FUNCTIONS): Move outside of ifdef.  Use
	MCPU_MTUNE_NATIVE_FUNCTIONS and ASM_REWRITE_SPEC_FUNCTIONS.  Remove
	reference to BIG_LITTLE_CPU_SPEC_FUNCTIONS.
	* common/config/arm/arm-common.c (arm_rewrite_selected_cpu): Ensure
	copied string is NUL-terminated.  Also strip any characters prefixed
	by '+'.
	(arm_rewrite_selected_arch): New function.
	(arm_rewrite_march): New function.

From-SVN: r249280

In order to support more complex specifications for cpus and architectures
we need to move away from using enumerations to represent the set of
permitted options.  This basic change just moves the option parsing
infrastructure over to that, but changes nothing more beyond generating
a hint when the specified option does not match a known target (previously
the help option was able to print out all the permitted values, but we
can no-longer do that.

	* config/arm/arm.opt (x_arm_arch_string): New TargetSave option.
	(x_arm_cpu_string, x_arm_tune_string): Likewise.
	(march, mcpu, mtune): Convert to string-based options.
	* config/arm/arm.c (arm_print_hint_for_core_or_arch): New function.
	(arm_parse_arch_cpu_name): New function.
	(arm_configure_build_target): Use arm_parse_arch_cpu_name to
	identify selected architecture or CPU.
	(arm_option_save): New function.
	(TARGET_OPTION_SAVE): Redefine.
	(arm_option_restore): Restore string options.
	(arm_option_print): Print string options.

From-SVN: r249279

PR tree-optimization/80934 - bzero should be assumed not to escape pointer argument
PR tree-optimization/80933 - redundant bzero/bcopy calls not eliminated

gcc/ChangeLog:

	PR tree-optimization/80933
	PR tree-optimization/80934
	* builtins.c (fold_builtin_3): Do not handle bcmp here.
	* gimple-fold.c (gimple_fold_builtin_bcmp): New function.
	(gimple_fold_builtin_bcopy, gimple_fold_builtin_bzero): Likewise.
	(gimple_fold_builtin): Call them.

gcc/testsuite/ChangeLog:

	PR tree-optimization/80933
	PR tree-optimization/80934
	* gcc.dg/fold-bcopy.c: New test.
	* gcc.dg/tree-ssa/ssa-dse-30.c: Likewise..
	* gcc.dg/tree-ssa/alias-36.c: Likewise.
	* gcc/testsuite/gcc.dg/pr79214.c: Adjust.
	* gcc.dg/tree-prof/val-prof-7.c: Likewise.
	* gcc.dg/Wsizeof-pointer-memaccess1.c: Likewise.
	* gcc.dg/builtins-nonnull.c: Likewise.

From-SVN: r249278

	* gimple-ssa-isolate-paths.c (isolate_path): Set edge leading to path
	as unlikely; update profile.

From-SVN: r249277

	* predict.c (force_edge_cold): Handle declaring edges impossible
	more aggresively.

From-SVN: r249276

	* tree-ssa-loop-ivcanon.c (remove_exits_and_undefined_stmts): Update
	profile.
	(try_unroll_loop_completely): Fix reporting.

From-SVN: r249275

From-SVN: r249274

From-SVN: r249273

gcc/

	PR target/71778
	* config/arm/arm-builtins.c (arm_expand_builtin_args): Return TARGET
	if given a non-constant argument for an intrinsic which requires a
	constant.

gcc/testsuite/

	PR target/71778
	* gcc.target/arm/pr71778.c: New.

From-SVN: r249272

From-SVN: r249271

	* profile.c (compare_freqs): New function.
	(branch_prob): Sort edge list.
	(find_spanning_tree): Assume that the list is priority sorted.

From-SVN: r249270

	gcc/cp/
	* cp-tree.h (build_this_parm, cp_build_parm_decl)
	build_artificial_parm): Add FN parm.
	* decl.c (start_cleanup_fn): Adjust.
	(build_this_parm): Add FN parm, pass it through.
	(grokfndecl): Adjust parm building.
	* decl2.c (cp_build_parm_decl): Add FN parm, set context.
	(build_artificial_parm): Add FN parm, pass through.
	(maybe_retrofit_in_chrg): Adjust parm building.
	(start_static_storage_duration_function): Likwise.
	* lambda.c (maybe_aadd_lambda_conv_op): Likewise.
	* method.c (implicitly_declare_fn): Likewise.
	* parser.c (inject_this_parameter): Likewise.

	libcc1/
	* libcp1plugin.cc (plugin_build_decl): Adjust parm building.
(--This line, and those below, will be ignored--

M    gcc/cp/parser.c
M    gcc/cp/ChangeLog
M    gcc/cp/decl.c
M    gcc/cp/lambda.c
M    gcc/cp/cp-tree.h
M    gcc/cp/method.c
M    gcc/cp/decl2.c
M    libcc1/libcp1plugin.cc
M    libcc1/ChangeLog

From-SVN: r249268

	* include/bits/shared_ptr.h (get_deleter): Add overload matching
	standard signature.
	* include/bits/shared_ptr_base.h (__shared_ptr): Declare new
	get_deleter overload as a friend.
	* testsuite/20_util/shared_ptr/misc/get_deleter.cc: New.

From-SVN: r249267

	* cp-tree.h (default_hash_traits <lang_identifier *>): Don't
	derive from pointer_hash.  Make undeletable.

From-SVN: r249266

	* class.c (resort_type_method_vec): Avoid potential unsigned
	overflow.

From-SVN: r249265

	* cp-tree.h (unevaluated_noexcept_spec): Don't declare.
	* decl.c (cxx_init_decl_processing): Initialize
	noexcept_deferred_spec.
	* except.c (unevaluated_noexcept_spec): Delete.
	* class.c (deduce_noexcept_on_destructor): Use
	noexcept_deferred_spec directly.
	* method.c (implicitly_declare_fn): Likewise.

From-SVN: r249264

	* cp-tree.h (CPTI_KEYED_CLASSES, keyed_classes): Delete.
	(keyed_classes): Declare as vector.
	* decl.c (keyed_classes): Define.
	(cxx_init_decl_processing): Allocate it.
	(record_key_method_defined): Use vec_safe_push.
	* class.c (finish_struct_1): Likewise.
	* pt.c (instantiate_class_template_1): Likewise.
	* decl2.c (c_parse_final_cleanups): Reverse iterate keyed_classes.

From-SVN: r249263

From-SVN: r249262

	PR libstdc++/81092
	* config/abi/post/i486-linux-gnu/baseline_symbols.txt: Update.
	* config/abi/post/powerpc-linux-gnu/baseline_symbols.txt: Update.
	* config/abi/post/powerpc64-linux-gnu/32/baseline_symbols.txt: Update.

From-SVN: r249260

	Make rtti lazier
	* rtti.c (enum tinfo_kind): Add TK_DERIVED_TYPES,
	TK_VMI_CLASS_TYPES, TK_MAX.  Delete TK_FIXED.
	(tinfo_names): New.
	(typeid_ok_p): Add quotes to error messages.  Use get_tinfo_desc.
	(get_tinfo_decl): Use get_tinfo_desc.
	(get_pseudo_ti_init): Likewise. Adjust VMI construction.
	(create_pseudo_type_info): Delete.
	(get_pseudo_ti_index): Just determine the index.
	(get_tinfo_desc): New.  Create all types lazily.
	(create_tinfo_types): Just allocate the descriptor array.
	(emit_support_tinfos): Use non-inserting type lookup.  Set builtin
	location.

From-SVN: r249258

	* include/bits/locale_conv.h (wbuffer_convert::sync): Fix condition.
	* testsuite/22_locale/conversions/buffer/2.cc: New.

From-SVN: r249255

2017-06-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/81090
	* passes.def (pass_record_bounds): Remove.
	* tree-pass.h (make_pass_record_bounds): Likewise.
	* tree-ssa-loop.c (pass_data_record_bounds, pass_record_bounds,
	make_pass_record_bounds): Likewise.
	* tree-ssa-loop-ivcanon.c (canonicalize_induction_variables): Do
	not free niter estimates at the beginning but at the end.
	* tree-scalar-evolution.c (scev_finalize): Free niter estimates.

	* gcc.dg/graphite/pr81090.c: New testcase.

From-SVN: r249249

	PR libstdc++/81092
	* acinclude.m4: Bump libtool_VERSION.
	* config/abi/post/i386-linux-gnu/baseline_symbols.txt: Update.
	* config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt: Update.
	* config/abi/pre/gnu.ver: Add wstring constructor symbols to
	GLIBCXX_3.4.24 version and move random_device::_M_get_entropy() symbol
	to new GLIBCXX_3.4.25 version.
	* doc/xml/manual/abi.xml: Document new versions.
	* doc/html/*: Regenerate.
	* testsuite/21_strings/basic_string/cons/char/8.cc: Use base object
	constructors to ensure required symbols are exported.
	* testsuite/21_strings/basic_string/cons/wchar_t/8.cc: Likewise.
	* testsuite/util/testsuite_abi.cc: Add new version.

From-SVN: r249246

tree-switch-conversion.c (emit_case_bit_tests): Adjust initializer to workaround ICE in host GCC 4.8.

2017-06-16  Richard Biener  <rguenther@suse.de>

	* tree-switch-conversion.c (emit_case_bit_tests): Adjust
	initializer to workaround ICE in host GCC 4.8.

From-SVN: r249245

	* ipa-inline-transform.c (update_noncloned_frequencies): Update also
	counts.
	(clone_inlined_nodes): Update.

From-SVN: r249244

re PR fortran/80983 ([F03] memory leak when calling procedure-pointer component with allocatable result)

2017-06-16  Janus Weil  <janus@gcc.gnu.org>

	PR fortran/80983
	* gfortran.dg/proc_ptr_comp_51.f90: Repair test case.

From-SVN: r249243

	* config/aarch64/aarch64.c (qdf24xx_prefetch_tune): Update
	prefetch settings, and enable prefetching by default at -O3.

Change-Id: I2f0da54a8c262f6fbd0dcfde4584141bb09f1013

From-SVN: r249242

	* config/aarch64/aarch64.c (aarch64_override_options_internal):
	Set flag_prefetch_loop_arrays according to tuning data.

Change-Id: Id41411e671e0a55dc7268e0ad0a4e8ff1421c90a

From-SVN: r249241

	* config/aarch64/aarch64-protos.h (struct cpu_prefetch_tune):
	New tune structure.
	(struct tune_params): Use cpu_prefetch_tune instead of cache_line_size.
	[Unrelated to main purpose of the patch] Place the pointer field last
	to enable type checking errors when tune structure are wrongly merged.
	* config/aarch64/aarch64.c (generic_prefetch_tune,)
	(exynosm1_prefetch_tune, qdf24xx_prefetch_tune,)
	(thunderx2t99_prefetch_tune): New tune constants.
	(tune_params *_tunings): Update all tunings (no functional change).
	(aarch64_override_options_internal): Set PARAM_SIMULTANEOUS_PREFETCHES,
	PARAM_L1_CACHE_SIZE, PARAM_L1_CACHE_LINE_SIZE, and PARAM_L2_CACHE_SIZE
	from tunings structures.

Change-Id: I1ddbac1863dcf078a2e5b14dd904debc76a7da94

From-SVN: r249240

	PR sanitizer/81094
	* ubsan.c (instrument_null): Add T argument, use it instead
	of computing it based on IS_LHS.
	(instrument_object_size): Likewise.
	(pass_ubsan::execute): Adjust instrument_null and
	instrument_object_size callers to pass gimple_get_lhs or
	gimple_assign_rhs1 result to it.  Use instrument_null instead of
	calling get_base_address and instrument_mem_ref.  Handle
	aggregate call arguments for object-size sanitization.

	* c-c++-common/ubsan/object-size-11.c: New test.

From-SVN: r249239

	* include/bits/locale_conv.h (wbuffer_convert::_M_put): Add missing
	return statement.
	* testsuite/21_strings/basic_string_view/operations/copy/char/1.cc:
	Return void.
	* testsuite/21_strings/basic_string_view/operations/copy/wchar_t/1.cc:
	Likewise.
	* testsuite/23_containers/map/modifiers/insert_or_assign/1.cc: Add
	missing return statements.
	* testsuite/23_containers/unordered_map/modifiers/insert_or_assign.cc:
	Likewise.
	* testsuite/27_io/basic_istream/extractors_arithmetic/char/12.cc:
	Return void.
	* testsuite/special_functions/14_expint/pr68397.cc: Likewise.

From-SVN: r249238

re PR tree-optimization/81089 (ICE: tree check: expected ssa_name, have integer_cst in register_edge_assert_for_2, at tree-vrp.c:5023)

2017-06-16  Yury Gribov  <tetra2005@gmail.com>

	PR tree-optimization/81089
	* tree-vrp.c (is_masked_range_test): Validate operands of
	subexpression.

From-SVN: r249237

	* Makefile.am (check-go-tool): Don't use >& for I/O redirection.
	* Makefile.in: Regenerate.

From-SVN: r249236