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  1. 11 Nov, 2015 20 commits
    • simplify-rtx: Simplify trunc of and of shiftrt · 3b1da8bb 
      If we have

	(truncate:M1 (and:M2 (lshiftrt:M2 (x:M2) C) C2))

we can write it instead as

	(and:M1 (lshiftrt:M1 (truncate:M1 (x:M2)) C) C2)

(if that is valid, of course), which has smaller modes for the
binary ops, and the truncate can often simplify further (if "x"
is a register, for example).


	* gcc/simplify-rtx.c (simplify_truncation): Simplify TRUNCATE
	of AND of [LA]SHIFTRT.

From-SVN: r230164
      Segher Boessenkool committed
    • re PR rtl-optimization/68287 (conditional jump or move depends on uninitialized… · 7ad291c0 
      re PR rtl-optimization/68287 (conditional jump or move depends on uninitialized value in lra-lives.c:1048)

Fix PR rtl-optimization/68287

	PR rtl-optimization/68287
	* lra-lives.c (lra_create_live_ranges_1): Reserve the right
	number of elements.

Co-Authored-By: Richard Biener <rguenther@suse.de>

From-SVN: r230163
      Martin Liska committed
    • Undo delay slot filling and use compact branches in selected cases. · dcfe3c8f 
      gcc/
	* config/mips/mips.c (mips_breakable_sequence_p): New function.
	(mips_break_sequence): New function. 
	(mips_reorg_process_insns) Use them. Use compact branches in selected
          situations.
    
gcc/testsuite/
        * gcc.target/mips/split-ds-sequence.c: New test.

From-SVN: r230160
      Simon Dardis committed
    • Fix whitespace+typo from "Share code from fold_array_ctor_reference with fold." · c08de514 
      	* fold-const.c (get_array_ctor_element_at_index): Fix whitespace, typo.

From-SVN: r230159
      Alan Lawrence committed
    • [ARM] PR67305, tighten neon_vector_mem_operand on eliminable registers · 03f39145 
      2015-11-11  Jiong Wang  <jiong.wang@arm.com>
	    Jim Wilson  <wilson@gcc.gnu.org>

	PR target/67305
	* config/arm/arm.md (neon_vector_mem_operand): Return FALSE if strict
	be true and eliminable registers mentioned.


Co-Authored-By: Jim Wilson <wilson@gcc.gnu.org>

From-SVN: r230158
      Jiong Wang committed
    • arc-common.c (arc_handle_option): Handle ARCv2 options. · f50bb868 
      2015-11-11  Claudiu Zissulescu  <claziss@synopsys.com>

	* common/config/arc/arc-common.c (arc_handle_option): Handle ARCv2
	options.
	* config/arc/arc-opts.h: Add ARCv2 CPUs.
	* config/arc/arc-protos.h (arc_secondary_reload_conv): Prototype.
	* config/arc/arc.c (arc_secondary_reload): Handle subreg (reg)
	situation, and store instructions with large offsets.
	(arc_secondary_reload_conv): New function.
	(arc_init): Add ARCv2 options.
	(arc_conditional_register_usage): Select the proper register usage
	for ARCv2 processors.
	(arc_handle_interrupt_attribute): ILINK2 is only valid for ARCv1
	architecture.
	(arc_compute_function_type): Likewise.
	(arc_print_operand): Handle new ARCv2 punctuation characters.
	(arc_return_in_memory): ARCv2 ABI returns in registers up to 16
	bytes.
	(workaround_arc_anomaly, arc_asm_insn_p, arc_loop_hazard): New
	function.
	(arc_reorg, arc_hazard): Use it.
	* config/arc/arc.h (TARGET_CPU_CPP_BUILTINS): Define __HS__ and
	__EM__.
	(ASM_SPEC): Add ARCv2 options.
	(TARGET_NORM): ARC HS has norm instructions by default.
	(TARGET_OPTFPE): Use optimized floating point emulation for ARC
	HS.
	(TARGET_AT_DBR_CONDEXEC): Only for ARC600 family.
	(TARGET_EM, TARGET_HS, TARGET_V2, TARGET_MPYW, TARGET_MULTI):
	Define.
	(SIGNED_INT16, TARGET_MPY, TARGET_ARC700_MPY, TARGET_ANY_MPY):
	Likewise.
	(TARGET_ARC600_FAMILY, TARGET_ARCOMPACT_FAMILY): Likewise.
	(TARGET_LP_WR_INTERLOCK): Likewise.
	* config/arc/arc.md
	(commutative_binary_mult_comparison_result_used, movsicc_insn)
	(mulsi3, mulsi3_600_lib, mulsidi3, mulsidi3_700, mulsi3_highpart)
	(umulsi3_highpart_i, umulsi3_highpart_int, umulsi3_highpart)
	(umulsidi3, umulsidi3_700, cstoresi4, simple_return, p_return_i):
	Use it for ARCv2.
	(mulhisi3, mulhisi3_imm, mulhisi3_reg, umulhisi3, umulhisi3_imm)
	(umulhisi3_reg, umulhisi3_reg, mulsi3_v2, nopv, bswapsi2)
	(prefetch, divsi3, udivsi3 modsi3, umodsi3, arcset, arcsetltu)
	(arcsetgeu, arcsethi, arcsetls, reload_*_load, reload_*_store)
	(extzvsi): New pattern.
	* config/arc/arc.opt: New ARCv2 options.
	* config/arc/arcEM.md: New file.
	* config/arc/arcHS.md: Likewise.
	* config/arc/constraints.md (C3p): New constraint, accepts 1 and 2
	values.
	(Cm2): A signed 9-bit integer constant constraint.
	(C62): An unsigned 6-bit integer constant constraint.
	(C16): A signed 16-bit integer constant constraint.
	* config/arc/predicates.md (mult_operator): Add ARCv2 processort.
	(short_const_int_operand): New predicate.
	* config/arc/t-arc-newlib: Add ARCv2 multilib options.
	* doc/invoke.texi: Add documentation for -mcpu=<archs/arcem>
	-mcode-density and -mdiv-rem.

From-SVN: r230156
      Claudiu Zissulescu committed
    • Fix typo. · 9e0c852b 
      gcc/
	* config/i386/i386.c (m_SKYLAKE_AVX512): Fix typo.

From-SVN: r230155
      Julia Koval committed
    • Fix target arch attribute for Skylake. · 28746a50 
      gcc/
	* config/i386/i386.c: Handle "skylake" and
	"skylake-avx512".

gcc/testsuite/
	* g++.dg/ext/mv16.C: New functions.

From-SVN: r230153
      Julia Koval committed
    • Fix various memory leaks · c8189787 
      	* gimple-ssa-strength-reduction.c (create_phi_basis):
	Use auto_vec.
	* passes.c (release_dump_file_name): New function.
	(pass_init_dump_file): Used from this function.
	(pass_fini_dump_file): Likewise.
	* tree-sra.c (convert_callers_for_node): Use xstrdup_for_dump.
	* var-tracking.c (vt_initialize): Use pool_allocator.

From-SVN: r230152
      Martin Liska committed
    • dp-hack.h: Add support for ARCHS. · c0ab1970 
      2015-11-11  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/dp-hack.h: Add support for ARCHS.
	* config/arc/ieee-754/divdf3.S: Likewise.
	* config/arc/ieee-754/divsf3-stdmul.S: Likewise.
	* config/arc/ieee-754/muldf3.S: Likewise.
	* config/arc/ieee-754/mulsf3.S: Likewise
	* config/arc/lib1funcs.S: Likewise
	* config/arc/gmon/dcache_linesz.S: Don't read the build register
	for ARCv2 cores.
	* config/arc/gmon/profil.S (__profil, __profil_irq): Don't profile
	for ARCv2 cores.
	* config/arc/ieee-754/arc-ieee-754.h (MPYHU, MPYH): Define.
	* config/arc/t-arc700-uClibc: Remove hard selection for ARC 700
	cores.

From-SVN: r230151
      Claudiu Zissulescu committed
    • [Patch] PR tree-optimization/68234 Improve range info for loop Phi node · 35e2b6e1 
      2015-11-11  Richard Biener  <rguenth@gcc.gnu.org>
	    Jiong Wang      <jiong.wang@arm.com>
gcc/
  PR tree-optimization/68234
  * tree-vrp.c (vrp_visit_phi_node): Extend SCEV check to those loop PHI
  node which estimiated to be VR_VARYING initially.

gcc/testsuite/
  * gcc.dg/tree-ssa/pr68234.c: New testcase. 


Co-Authored-By: Jiong Wang <jiong.wang@arm.com>

From-SVN: r230150
      Richard Biener committed
    • Tighten up checks when tying chains. · 394b24ea 
      gcc/
	* regname.c (scan_rtx_reg): Check the matching number of consecutive
	registers when tying chains.
	(build_def_use): Move terminated_this_insn earlier in the function.

From-SVN: r230149
      Robert Suchanek committed
    • re PR fortran/67826 (gcc/fortran/openmp.c:1808: bad test ?) · 6eef39f1 
      2015-11-11  Dominique d'Humieres <dominiq@lps.ens.fr>

	PR fortran/67826
	* openmp.c (gfc_omp_udr_find): Fix typo.

From-SVN: r230148
      Dominique d'Humieres committed
    • re PR libstdc++/64651 (std::rethrow_exception not found by ADL) · 832ca6ac 
      	PR libstdc++/64651
	* libsupc++/exception_ptr.h (rethrow_exception): Add using-declaration
	to __exception_ptr namespace.
	* testsuite/18_support/exception_ptr/rethrow_exception.cc: Test ADL.
	Remove unnecessary test variables.

From-SVN: r230147
      Jonathan Wakely committed
    • gcc: configure: fix test == bashisms · 9a557138 
      From-SVN: r230146
      Mike Frysinger committed
    • aix.h (TARGET_OS_AIX_CPP_BUILTINS): Add cpu and machine asserts. · f83cab84 
      * config/rs6000/aix.h (TARGET_OS_AIX_CPP_BUILTINS): Add cpu and
machine asserts.  Update defines for 64 bit.

From-SVN: r230145
      David Edelsohn committed
    • [ARM] PR63870 Remove error for invalid lane numbers · e68ffe57 
      2015-11-11  Charles Baylis  <charles.baylis@linaro.org>

	PR target/63870
	* config/arm/neon.md (neon_vld1_lane<mode>): Remove error for invalid
	lane number.
	(neon_vst1_lane<mode>): Likewise.
	(neon_vld2_lane<mode>): Likewise.
	(neon_vst2_lane<mode>): Likewise.
	(neon_vld3_lane<mode>): Likewise.
	(neon_vst3_lane<mode>): Likewise.
	(neon_vld4_lane<mode>): Likewise.
	(neon_vst4_lane<mode>): Likewise.

From-SVN: r230144
      Charles Baylis committed
    • [ARM] PR63870 Mark lane indices of vldN/vstN with appropriate qualifier · 22f9db64 
      2015-11-11  Charles Baylis  <charles.baylis@linaro.org>

	PR target/63870
	* config/arm/arm-builtins.c: (arm_load1_qualifiers) Use
	qualifier_struct_load_store_lane_index.
	(arm_storestruct_lane_qualifiers) Likewise.
	* config/arm/neon.md: (neon_vld1_lane<mode>) Reverse lane numbers for
	big-endian.
	(neon_vst1_lane<mode>) Likewise.
	(neon_vld2_lane<mode>) Likewise.
	(neon_vst2_lane<mode>) Likewise.
	(neon_vld3_lane<mode>) Likewise.
	(neon_vst3_lane<mode>) Likewise.
	(neon_vld4_lane<mode>) Likewise.
	(neon_vst4_lane<mode>) Likewise.

From-SVN: r230143
      Charles Baylis committed
    • [ARM] PR63870 Add qualifiers for NEON builtins · 2f7d18dd 
      2015-11-11  Charles Baylis  <charles.baylis@linaro.org>

	PR target/63870
	* config/arm/arm-builtins.c (enum arm_type_qualifiers): New enumerator
	qualifier_struct_load_store_lane_index.
	(builtin_arg): New enumerator NEON_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
	(arm_expand_neon_args): New parameter. Remove ellipsis. Handle NEON
	argument qualifiers.
	(arm_expand_neon_builtin): Handle new NEON argument qualifier.
	* config/arm/arm.h (NEON_ENDIAN_LANE_N): New macro.

From-SVN: r230142
      Charles Baylis committed
    • Daily bump. · 493b929a 
      From-SVN: r230141
      GCC Administrator committed
  3. 10 Nov, 2015 20 commits