[AArch64] Move iterators from atomics.md to iterators.md

	* config/aarch64/atomics.md (unspecv): Move to iterators.md.
	(ATOMIC_LDOP): Likewise.
	(atomic_ldop): Likewise.
	* config/aarch64/iterators.md (unspecv): Moved from atomics.md.
	(ATOMIC_LDOP): Likewise.
	(atomic_ldop): Likewise.

From-SVN: r230114

gcc/ChangeLog

+2015-11-10  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* config/aarch64/atomics.md (unspecv): Move to iterators.md.
+	(ATOMIC_LDOP): Likewise.
+	(atomic_ldop): Likewise.
+	* config/aarch64/iterators.md (unspecv): Moved from atomics.md.
+	(ATOMIC_LDOP): Likewise.
+	(atomic_ldop): Likewise.
+
 2015-11-10  Martin Liska  <mliska@suse.cz>
 
 	* alloc-pool.h (allocate_raw): New function.

gcc/config/aarch64/atomics.md

@@ -18,34 +18,6 @@
 ;; along with GCC; see the file COPYING3.  If not see
 ;; <http://www.gnu.org/licenses/>.
 
-(define_c_enum "unspecv"
- [
-    UNSPECV_LX				; Represent a load-exclusive.
-    UNSPECV_SX				; Represent a store-exclusive.
-    UNSPECV_LDA				; Represent an atomic load or load-acquire.
-    UNSPECV_STL				; Represent an atomic store or store-release.
-    UNSPECV_ATOMIC_CMPSW		; Represent an atomic compare swap.
-    UNSPECV_ATOMIC_EXCHG		; Represent an atomic exchange.
-    UNSPECV_ATOMIC_CAS			; Represent an atomic CAS.
-    UNSPECV_ATOMIC_SWP			; Represent an atomic SWP.
-    UNSPECV_ATOMIC_OP			; Represent an atomic operation.
-    UNSPECV_ATOMIC_LDOP			; Represent an atomic load-operation
-    UNSPECV_ATOMIC_LDOP_OR		; Represent an atomic load-or
-    UNSPECV_ATOMIC_LDOP_BIC		; Represent an atomic load-bic
-    UNSPECV_ATOMIC_LDOP_XOR		; Represent an atomic load-xor
-    UNSPECV_ATOMIC_LDOP_PLUS		; Represent an atomic load-add
-])
-
-;; Iterators for load-operate instructions.
-
-(define_int_iterator ATOMIC_LDOP
- [UNSPECV_ATOMIC_LDOP_OR UNSPECV_ATOMIC_LDOP_BIC
-  UNSPECV_ATOMIC_LDOP_XOR UNSPECV_ATOMIC_LDOP_PLUS])
-
-(define_int_attr atomic_ldop
- [(UNSPECV_ATOMIC_LDOP_OR "set") (UNSPECV_ATOMIC_LDOP_BIC "clr")
-  (UNSPECV_ATOMIC_LDOP_XOR "eor") (UNSPECV_ATOMIC_LDOP_PLUS "add")])
-
 ;; Instruction patterns.
 
 (define_expand "atomic_compare_and_swap<mode>"

gcc/config/aarch64/iterators.md

@@ -306,6 +306,29 @@
     UNSPEC_VEC_SHR      ; Used in aarch64-simd.md.
 ])
 
+;; ------------------------------------------------------------------
+;; Unspec enumerations for Atomics.  They are here so that they can be
+;; used in the int_iterators for atomic operations.
+;; ------------------------------------------------------------------
+
+(define_c_enum "unspecv"
+ [
+    UNSPECV_LX			; Represent a load-exclusive.
+    UNSPECV_SX			; Represent a store-exclusive.
+    UNSPECV_LDA			; Represent an atomic load or load-acquire.
+    UNSPECV_STL			; Represent an atomic store or store-release.
+    UNSPECV_ATOMIC_CMPSW	; Represent an atomic compare swap.
+    UNSPECV_ATOMIC_EXCHG	; Represent an atomic exchange.
+    UNSPECV_ATOMIC_CAS		; Represent an atomic CAS.
+    UNSPECV_ATOMIC_SWP		; Represent an atomic SWP.
+    UNSPECV_ATOMIC_OP		; Represent an atomic operation.
+    UNSPECV_ATOMIC_LDOP		; Represent an atomic load-operation
+    UNSPECV_ATOMIC_LDOP_OR	; Represent an atomic load-or
+    UNSPECV_ATOMIC_LDOP_BIC	; Represent an atomic load-bic
+    UNSPECV_ATOMIC_LDOP_XOR	; Represent an atomic load-xor
+    UNSPECV_ATOMIC_LDOP_PLUS	; Represent an atomic load-add
+])
+
 ;; -------------------------------------------------------------------
 ;; Mode attributes
 ;; -------------------------------------------------------------------
@@ -965,6 +988,16 @@
 
 (define_int_iterator CRYPTO_SHA256 [UNSPEC_SHA256H UNSPEC_SHA256H2])
 
+;; Iterators for atomic operations.
+
+(define_int_iterator ATOMIC_LDOP
+ [UNSPECV_ATOMIC_LDOP_OR UNSPECV_ATOMIC_LDOP_BIC
+  UNSPECV_ATOMIC_LDOP_XOR UNSPECV_ATOMIC_LDOP_PLUS])
+
+(define_int_attr atomic_ldop
+ [(UNSPECV_ATOMIC_LDOP_OR "set") (UNSPECV_ATOMIC_LDOP_BIC "clr")
+  (UNSPECV_ATOMIC_LDOP_XOR "eor") (UNSPECV_ATOMIC_LDOP_PLUS "add")])
+
 ;; -------------------------------------------------------------------
 ;; Int Iterators Attributes.
 ;; -------------------------------------------------------------------