2016-06-09  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/71462
	* tree-ssa-loop-manip.c (find_uses_to_rename): Guard against
	removed blocks.

	* gcc.dg/torture/pr71462.c: New testcase.

From-SVN: r237254

	* predict.c (filter_predictions): New function.
	(remove_predictions_associated_with_edge): Use the filter
	function.
	(equal_edge_p): New function.

From-SVN: r237253

	PR c/65471
	* gcc.dg/c11-generic-3.c: New test.

From-SVN: r237252

2016-06-09  Stefan Bruens  <stefan.bruens@rwth-aachen.de>

	* doc/invoke.texi (ARM Options): Use lexicographical ordering.
	Correct usage of @samp vs @option, add @samp where appropriate.
	Add -march={armv6k,armv6z,arm6zk}, remove -march=ep9312.
	Add armv6s-m and document it, as it is no official ARM name.

From-SVN: r237251

	* ifcvt.c (struct noce_if_info): Add transform_name field.
	(noce_try_move): Set if_info->transform_name to the function name.
	(noce_try_ifelse_collapse): Likewise.
	(noce_try_store_flag): Likewise.
	(noce_try_inverse_constants): Likewise.
	(noce_try_store_flag_constants): Likewise.
	(noce_try_addcc): Likewise.
	(noce_try_store_flag_mask): Likewise.
	(noce_try_cmove): Likewise.
	(noce_try_cmove_arith): Likewise.
	(noce_try_minmax): Likewise.
	(noce_try_abs): Likewise.
	(noce_try_sign_mask): Likewise.
	(noce_try_bitop): Likewise.
	(noce_convert_multiple_sets): Likewise.
	(noce_process_if_block): Print if_info->transform_name to
	dump_file if transformation succeeded.

From-SVN: r237250

	* config/arm/cortex-a57.md (cortex_a57_alu):
	Handle csel type.

From-SVN: r237249

From-SVN: r237248

/cp
2016-06-08  Paolo Carlini  <paolo.carlini@oracle.com>

	* decl.c (maybe_deduce_size_from_array_init): Use
	DECL_SOURCE_LOCATION in error_at.
	(layout_var_decl): Likewise.
	(check_array_initializer): Likewise.
	(check_initializer): Likewise.
	(duplicate_decls, check_elaborated_type_specifier): Tidy.

/testsuite
2016-06-08  Paolo Carlini  <paolo.carlini@oracle.com>

	* g++.dg/init/array42.C: New.
	* g++.dg/init/array43.C: Likewise.
	* g++.dg/init/array44.C: Likewise.
	* g++.dg/init/array45.C: Likewise.
	* g++.dg/cpp0x/constexpr-ice10.C: Test column number too.
	* g++.dg/cpp0x/constexpr-incomplete1.C: Likewise.
	* g++.dg/cpp1y/auto-fn27.C: Likewise.
	* g++.dg/gomp/pr35751.C: Likewise.
	* g++.dg/init/array23.C: Likewise.
	* g++.dg/init/brace2.C: Likewise.
	* g++.dg/init/brace6.C: Likewise.

From-SVN: r237240

	PR c++/70507
	PR c/68120
	* builtins.def (BUILT_IN_ADD_OVERFLOW_P, BUILT_IN_SUB_OVERFLOW_P,
	BUILT_IN_MUL_OVERFLOW_P): New builtins.
	* builtins.c: Include gimple-fold.h.
	(fold_builtin_arith_overflow): Handle
	BUILT_IN_{ADD,SUB,MUL}_OVERFLOW_P.
	(fold_builtin_3): Likewise.
	* doc/extend.texi (Integer Overflow Builtins): Document
	__builtin_{add,sub,mul}_overflow_p.
gcc/c/
	* c-typeck.c (convert_arguments): Don't promote last argument
	of BUILT_IN_{ADD,SUB,MUL}_OVERFLOW_P.
gcc/cp/
	* constexpr.c: Include gimple-fold.h.
	(cxx_eval_internal_function): New function.
	(cxx_eval_call_expression): Call it.
	(potential_constant_expression_1): Handle integer arithmetic
	overflow built-ins.
	* tree.c (builtin_valid_in_constant_expr_p): Handle
	BUILT_IN_{ADD,SUB,MUL}_OVERFLOW_P.
gcc/c-family/
	* c-common.c (check_builtin_function_arguments): Handle
	BUILT_IN_{ADD,SUB,MUL}_OVERFLOW_P.
gcc/testsuite/
	* c-c++-common/builtin-arith-overflow-1.c: Add test cases.
	* c-c++-common/builtin-arith-overflow-2.c: New test.
	* g++.dg/ext/builtin-arith-overflow-1.C: New test.
	* g++.dg/cpp0x/constexpr-arith-overflow.C: New test.
	* g++.dg/cpp1y/constexpr-arith-overflow.C: New test.

Co-Authored-By: Jakub Jelinek <jakub@redhat.com>

From-SVN: r237238

driver-sparc.c (cpu_names): Fix the entry for the SPARC-M7 and add an entry for SPARC-S7 cpus (Sonoma).

2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/sparc/driver-sparc.c (cpu_names): Fix the entry for the
	SPARC-M7 and add an entry for SPARC-S7 cpus (Sonoma).

From-SVN: r237237

pt.c (tsubst, [...]): Don't delay checking the return value of	tsubst_aggr_type for error_mark_node.

2016-06-08  Paolo Carlini  <paolo.carlini@oracle.com>

	* pt.c (tsubst, case TYPENAME_TYPE): Don't delay checking the
	return value of	tsubst_aggr_type for error_mark_node.

From-SVN: r237236

	PR c++/71442
	* pt.c (tsubst_copy): Only set TREE_USED on DECLs.

	* g++.dg/cpp0x/Wunused-variable-1.C: New test.

From-SVN: r237232

gcc/testsuite/

	* gcc.target/aarch64/aapcs64/aapcs64.exp: Also execute rec_*.c
	* gcc.target/aarch64/aapcs64/rec_align-5.c: New.
	* gcc.target/aarch64/aapcs64/rec_align-6.c: New.
	* gcc.target/aarch64/aapcs64/rec_align-7.c: New.
	* gcc.target/aarch64/aapcs64/rec_align-8.c: New.
	* gcc.target/aarch64/aapcs64/rec_align-9.c: New.
	* gcc.target/aarch64/aapcs64/test_align-5.c: New.
	* gcc.target/aarch64/aapcs64/test_align-6.c: New.
	* gcc.target/aarch64/aapcs64/test_align-7.c: New.
	* gcc.target/aarch64/aapcs64/test_align-8.c: New.
	* gcc.target/aarch64/aapcs64/test_align-9.c: New.
	* gcc.target/aarch64/aapcs64/rec_vaarg-1.c: New.
	* gcc.target/aarch64/aapcs64/rec_vaarg-2.c: New.

From-SVN: r237225

gcc/ChangeLog:

	* config/aarch64/aarch64.c (aarch64_function_arg_alignment):
	Rewrite, looking one level down for records and arrays.

From-SVN: r237224

gcc/ChangeLog:
	* pretty-print.c: Include "selftest.h".
	(pp_format): Fix comment.
	(identifier_to_locale): Likewise.
	(selftest::test_basic_printing): New function.
	(selftest::assert_pp_format): New function.
	(selftest::test_pp_format): New function.
	(selftest::pretty_print_c_tests): New function.
	* selftest-run-tests.c (selftest::run_tests): Call
	selftest::pretty_print_c_tests.
	* selftest.h (pretty_print_c_tests): New declaration.

From-SVN: r237221

	* invoke.texi (max-loop-headers-insns): Document.
	* params.def (PARAM_MAX_LOOP_HEADER_INSNS): New.
	* tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Update comment.
	(ch_base::copy_headers): Use PARAM_MAX_LOOP_HEADER_INSNS.

From-SVN: r237219

2016-06-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/68558
	* gcc.dg/vect/slp-44.c: New testcase.

From-SVN: r237216

tree-vect-stmts.c (vectorizable_load): Remove restrictions on strided SLP loads and fall back to scalar loads in case...

2016-06-08  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.c (vectorizable_load): Remove restrictions
	on strided SLP loads and fall back to scalar loads in case
	we can't chunk them.

	* gcc.dg/vect/slp-43.c: New testcase.

From-SVN: r237215

2016-06-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/71452
	* tree-ssa.c (non_rewritable_lvalue_p): Make sure that the
	type used for the SSA rewrite has enough precision to cover
	the dynamic type of the location.

	* gcc.dg/torture/pr71452.c: New testcase.

From-SVN: r237214

	PR c++/71448
	* fold-const.c (fold_comparison): Handle CONSTANT_CLASS_P (base0)
	the same as DECL_P (base0) for indirect_base0.  Use equality_code
	in one further place.

	* g++.dg/torture/pr71448.C: New test.

Co-Authored-By: Richard Biener <rguenther@suse.de>

From-SVN: r237212

This patch is effectively reverting a change from 1994.  The reason
I think it's a hack is that store_bit_field_1 is creating a subreg
reference to one word of a field even though it has already proven that
the field spills into the following word.  We then rely on the special
SUBREG handling in store_split_bit_field to ignore the extent of op0 and
look inside the SUBREG_REG regardless.  I don't see any reason why we can't
pass the original op0 to store_split_bit_field instead.

Tested on aarch64-linux-gnu and x86_64-linux-gnu.

gcc/
	* expmed.c (store_bit_field_1): Do not restrict a multiword op0
	to one word if the field is known to overlap other words.
	(extract_bit_field_1): Likewise.
	(store_split_bit_field): Remove compensating code.
	(extract_split_bit_field): Likewise.

From-SVN: r237211

2016-06-03  Chung-Lin Tang  <cltang@codesourcery.com>

	libgomp/
	* testsuite/libgomp.oacc-fortran/reduction-8.f90: New testcase.
	* testsuite/libgomp.oacc-c-c++-common/reduction-8.c: New testcase.

From-SVN: r237209

	PR debug/71432
	PR ada/71413
	* tree-ssa-strlen.c (handle_builtin_memcmp): Ignore debug insns.

	* g++.dg/debug/pr71432.C: New test.

From-SVN: r237208

2016-06-08  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

	* gcc.dg/vect/section-anchors-vect-70.c: Rename to aligned-section-anchors-vect-71.c.
	* gcc.dg/vect/section-anchors-vect-71.c: Rename to aligned-section-anchors-vect-72.c.
	* gcc.dg/vect/section-anchors-vect-72.c: Rename to aligned-section-anchors-vect-72.c.

From-SVN: r237207

2016-06-08  Richard Biener  <rguenther@suse.de>

	* c-common.c (parse_optimize_options): Improve diagnostic messages.

From-SVN: r237206

	* config/aarch64/aarch64-builtins.def (faddp): New builtins for modes in
	VDQF.
	* config/aarch64/aarch64-simd.md (aarch64_faddp<mode>): New.
	(arch64_addpv4sf): Delete.
	(reduc_plus_scal_v4sf): Use "gen_aarch64_faddpv4sf" instead of
	"gen_aarch64_addpv4sf".
	* config/aarch64/arm_neon.h (vpadd_f32): Remove inline assembly.  Use
	builtin.
	(vpadds_f32): Likewise.
	(vpaddq_f32): Likewise.
	(vpaddq_f64): Likewise.

From-SVN: r237205

	* config/aarch64/aarch64-builtins.def (fabd): New builtins for modes
	VALLF.
	* config/aarch64/aarch64-simd.md (fabd<mode>_3): Extend modes from VDQF
	to VALLF.  Rename to "fabd<mode>3".
	"*fabd_scalar<mode>3): Delete.
	* config/aarch64/arm_neon.h (vabds_f32): Remove inline assembly.
	Use builtin.
	(vabdd_f64): Likewise.
	(vabd_f32): Likewise.
	(vabd_f64): Likewise.
	(vabdq_f32): Likewise.
	(vabdq_f64): Likewise.

From-SVN: r237204

	* config/aarch64/aarch64-builtins.def (rsqrts): New builtins for modes
	VALLF.
	* config/aarch64/aarch64-simd.md (aarch64_rsqrts_<mode>3): Rename to
	"aarch64_rsqrts<mode>".
	* config/aarch64/aarch64.c (get_rsqrts_type): Update gen* name.
	* config/aarch64/arm_neon.h (vrsqrtss_f32): Remove inline assembly.  Use
	builtin.
	(vrsqrtsd_f64): Likewise.
	(vrsqrts_f32): Likewise.
	(vrsqrts_f64): Likewise.
	(vrsqrtsq_f32): Likewise.
	(vrsqrtsq_f64): Likewise.

From-SVN: r237203

	* config/aarch64/aarch64-builtins.def (rsqrte): New builtins for modes
	VALLF.
	* config/aarch64/aarch64-simd.md (aarch64_rsqrte_<mode>2): Rename to
	"aarch64_rsqrte<mode>".
	* config/aarch64/aarch64.c (get_rsqrte_type): Update gen* name.
	* config/aarch64/arm_neon.h (vrsqrts_f32): Remove inline assembly.  Use
	builtin.
	(vrsqrted_f64): Likewise.
	(vrsqrte_f32): Likewise.
	(vrsqrte_f64): Likewise.
	(vrsqrteq_f32): Likewise.
	(vrsqrteq_f64): Likewise.

From-SVN: r237202

	* config/aarch64/aarch64-builtins.def (scvtf): Register vector modes.
	(ucvtf): Likewise.
	(fcvtzs): Likewise.
	(fcvtzu): Likewise.
	* config/aarch64/aarch64-simd.md
	(<FCVT_F2FIXED:fcvt_fixed_insn><VDQF:mode>3): New.
	(<FCVT_FIXED2F:fcvt_fixed_insn><VDQ_SDI:mode>3): Likewise.
	* config/aarch64/arm_neon.h (vcvt_n_f32_s32): Remove inline assembly.
	Use builtin.
	(vcvt_n_f32_u32): Likewise.
	(vcvt_n_s32_f32): Likewise.
	(vcvt_n_u32_f32): Likewise.
	(vcvtq_n_f32_s32): Likewise.
	(vcvtq_n_f32_u32): Likewise.
	(vcvtq_n_f64_s64): Likewise.
	(vcvtq_n_f64_u64): Likewise.
	(vcvtq_n_s32_f32): Likewise.
	(vcvtq_n_s64_f64): Likewise.
	(vcvtq_n_u32_f32): Likewise.
	(vcvtq_n_u64_f64): Likewise.
	* config/aarch64/iterators.md (VDQ_SDI): New mode iterator.
	(VSDQ_SDI): Likewise.
	(fcvt_target): Support V4DI, V4SI and V2SI.
	(FCVT_TARGET): Likewise.

From-SVN: r237201

        * config/aarch64/aarch64-builtins.c (TYPES_BINOP_USS): New
        (TYPES_BINOP_SUS): Likewise.
        (aarch64_simd_builtin_data): Update include file name.
        (aarch64_builtins): Likewise.
        * config/aarch64/aarch64-simd-builtins.def (scvtf): New entries
        for conversion between scalar float-point and fixed-point.
        (ucvtf): Likewise.
        (fcvtzs): Likewise.
        (fcvtzu): Likewise.
        * config/aarch64/aarch64.md
        (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3: New
        pattern for conversion between scalar float to fixed-pointer.
        (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>: Likewise.
        (UNSPEC_FCVTZS): New UNSPEC enumeration.
        (UNSPEC_FCVTZU): Likewise.
        (UNSPEC_SCVTF): Likewise.
        (UNSPEC_UCVTF): Likewise.
        * config/aarch64/arm_neon.h (vcvtd_n_f64_s64): Remove inline assembly.
	Use builtin.
        (vcvtd_n_f64_u64): Likewise.
        (vcvtd_n_s64_f64): Likewise.
        (vcvtd_n_u64_f64): Likewise.
        (vcvtd_n_f32_s32): Likewise.
        (vcvts_n_f32_u32): Likewise.
        (vcvtd_n_s32_f32): Likewise.
        (vcvts_n_u32_f32): Likewise.
        * config/aarch64/iterators.md (fcvt_target): Support integer to float
	mapping.
        (FCVT_TARGET): Likewise.
        (FCVT_FIXED2F): New iterator.
        (FCVT_F2FIXED): Likewise.
        (fcvt_fixed_insn): New define_int_attr.

From-SVN: r237200

	* predict.c (pass_strip_predict_hints::execute): Cleanup CFG if
	some statements was removed.

From-SVN: r237199

2016-06-08  Alan Hayward  <alan.hayward@arm.com>

gcc/
	* tree-vect-data-refs.c (vect_analyze_data_refs): Remove debug newline.
	* tree-vect-loop-manip.c (slpeel_make_loop_iterate_ntimes): likewise.
	(vect_can_advance_ivs_p): likewise.
	(vect_update_ivs_after_vectorizer): likewise.
	* tree-vect-loop.c (vect_determine_vectorization_factor): likewise.
	(vect_analyze_scalar_cycles_1): likewise.
	(vect_analyze_loop_operations): likewise.
	(report_vect_op): likewise.
	(vect_is_slp_reduction): likewise.
	(vect_is_simple_reduction): likewise.
	(get_initial_def_for_induction): likewise.
	(vect_transform_loop): likewise.
	* tree-vect-patterns.c (vect_recog_dot_prod_pattern): likewise.
	(vect_recog_sad_pattern): likewise.
	(vect_recog_widen_sum_pattern): likewise.
	(vect_recog_widening_pattern): likewise.
	(vect_recog_divmod_pattern): likewise.
	* tree-vect-slp.c (vect-build-slp_tree_1): likewise.
	(vect_analyze_slp_instance): likewise.
	(vect_transform_slp_perm_load): likewise.
	(vect_schedule_slp_instance): likewise.

From-SVN: r237198

2016-06-08  Alan Hayward  <alan.hayward@arm.com>

gcc/testsuite/
	* gcc.dg/vect/vect-live-2.c: Update effective target.
	* gcc.dg/vect/vect-live-slp-3.c: Likewise.
	* lib/target-supports.exp: Add aarch64 to vect_long.

From-SVN: r237197

	PR c/71426
	* c-decl.c (get_parm_info): Don't crash on an assert on invalid
	code.

	* gcc.dg/noncompile/pr71426.c: New test.

From-SVN: r237196

	PR c/71418
	* c-decl.c (grokdeclarator): Check TYPE_P.

	* gcc.dg/noncompile/pr71418.c: New test.

From-SVN: r237195

From-SVN: r237194

	* predict.c (predict_iv_comparison): Mention that heuristics is broken.
	(return_prediction): PRED_CONST_RETURN predict return as not taken.
	* predict.def (PRED_CONTINUE): Change hitrate 50->67
	(PRED_LOOP_BRANCH): Document predictor as broken.
	(PRED_LOOP_EXIT): Change hitrate 91->92.
	(PRED_LOOP_EXTRA_EXIT): Change hitrate 91->83.
	(PRED_POINTER, PRED_TREE_POINTER): Change hitrate 85->70.
	(PRED_OPCODE_POSITIVE): Change hitrate 79->64.
	(PRED_OPCODE_NONEQUAL): Change hitrate 91->66.
	(PRED_TREE_OPCODE_POSITIVE): Change hitrate 73->64
	(PRED_TREE_OPCODE_NONEQUAL): Chnage hitrate 72->66
	(PRED_CALL): Chane hitrate 71->67.
	(PRED_TREE_EARLY_RETURN): Document issues, change hitrate 61->54.
	(PRED_GOTO): Document as unused right now.
	(PRED_CONST_RETURN): Change hitrate 67->69
	(PRED_NEGATIVE_RETURN): Change hitrate 96->98
	(PRED_NULL_RETURN): Change hitrate 91->90.
	(PRED_LOOP_IV_COMPARE_GUESS): Change hitrate to 98.
	(PRED_FORTRAN_FAIL_ALLOC): Change hitrate to 62; document issues.
	(PRED_FORTRAN_SIZE_ZERO): Change hitrate to 99.
	* gcc.dg/ipa/inlinehint-4.c: Disable partial inlining.
	* gcc.dg/predict-1.c: Update template for new predictor hitrates.
	* gcc.dg/predict-3.c: Update template.
	* gcc.dg/predict-5.c: Update template.
	* gcc.dg/predict-6.c: Update template.
	* gcc.dg/predict-9.c: Update template.
	* gcc.dg/predict-9.c: Update template.
	* gcc.dg/tree-ssa/attr-hotcold-2.c: Update template.

From-SVN: r237185

2016-06-07  François Dumont  <fdumont@gcc.gnu.org>

	* include/std/tuple (_Head_base<>): Default specialization condition at
	type declaration.

From-SVN: r237184

This patch adds support for the missing versions of the vec_mul altivec
builtins from the Power Architecture 64-Bit ELF V2 ABI OpenPOWER ABI for
Linux Supplement (16 July 2015 Version 1.1). There are many of the builtins
that are missing and this is part of a series of patches to add them.

There aren't instructions for the {un}signed char, {un}signed short, and
{un}signed int versions of vec_mul so the output code is built from other
built-ins and operations that do have instructions.

The new test case is an executable test which verifies that the generated
code produces expected values. C macros were used so that the same
test case could be used for all the various supported types.

Bootstrapped and tested on powerpc64le-unknown-linux-gnu and
powerpc64-unknown-linux-gnu with no regressions. Is this ok for trunk?

[gcc]

2016-06-07  Bill Seurer  <seurer@linux.vnet.ibm.com>

	* config/rs6000/altivec.h: Add __builtin_vec_mul.
	* config/rs6000/rs6000-builtin.def (vec_mul): Change vec_mul to a
	special case Altivec builtin.
	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Remove
	VSX_BUILTIN_VEC_MUL (replaced with special case code).
	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
	code for ALTIVEC_BUILTIN_VEC_MUL.
	* config/rs6000/rs6000.c (altivec_init_builtins): Add definition
	for __builtin_vec_mul.

[gcc/testsuite]

2016-06-07  Bill Seurer  <seurer@linux.vnet.ibm.com>

	* gcc.target/powerpc/vec-mul.c: New test.

From-SVN: r237183