small PIC addressing models

gcc/

	* config/aarch64/aarch64.c (POINTER_BYTES): New define.
	(aarch64_load_symref_appropriately): In the case of
	SYMBOL_SMALL_ABSOLUTE, use the mode of 'dest' instead of Pmode
	to generate new rtx; likewise to the case of SYMBOL_SMALL_GOT.
	(aarch64_expand_mov_immediate): In the case of SYMBOL_FORCE_TO_MEM,
	change to pass 'ptr_mode' to force_const_mem and zero-extend 'mem'
	if 'mode' doesn't equal to 'ptr_mode'.
	(aarch64_output_mi_thunk): Add an assertion on the alignment of
	'vcall_offset'; change to call aarch64_emit_move differently depending
	on whether 'Pmode' equals to 'ptr_mode' or not; use 'POINTER_BYTES'
	to calculate the upper bound of 'vcall_offset'.
	(aarch64_cannot_force_const_mem): Change to also return true if
	mode != ptr_mode.
	(aarch64_legitimize_reload_address): In the case of large
	displacements, add new local variable 'xmode' and an assertion
	based on it; change to use 'xmode' to generate the new rtx and
	reload.
	(aarch64_asm_trampoline_template): Change to generate the template
	differently depending on TARGET_ILP32 or not; change to use
	'POINTER_BYTES' in the argument passed to assemble_aligned_integer.
	(aarch64_trampoline_size): Removed.
	(aarch64_trampoline_init): Add new local constant 'tramp_code_sz'
	and replace immediate literals with it.  Change to use 'ptr_mode'
	instead of 'DImode' and call convert_memory_address if the mode
	of 'fnaddr' doesn't equal to 'ptr_mode'.
	(aarch64_elf_asm_constructor): Change to use assemble_aligned_integer
	to output symbol.
	(aarch64_elf_asm_destructor): Likewise.
	* config/aarch64/aarch64.h (TRAMPOLINE_SIZE): Change to be dependent
	on TARGET_ILP32 instead of aarch64_trampoline_size.
	* config/aarch64/aarch64.md (movsi_aarch64): Add new alternatives
	of 'mov' between WSP and W registers as well as 'adr' and 'adrp'.
	(loadwb_pair<GPI:mode>_<PTR:mode>): Rename to ...
	(loadwb_pair<GPI:mode>_<P:mode>): ... this.  Replace PTR with P.
	(storewb_pair<GPI:mode>_<PTR:mode>): Likewise; rename to ...
	(storewb_pair<GPI:mode>_<P:mode>): ... this.
	(add_losym): Change to 'define_expand' and call gen_add_losym_<mode>
	depending on the value of 'mode'.
	(add_losym_<mode>): New.
	(ldr_got_small_<mode>): New, based on ldr_got_small.
	(ldr_got_small): Remove.
	(ldr_got_small_sidi): New.
	* config/aarch64/iterators.md (P): New.
	(PTR): Change to 'ptr_mode' in the condition.

From-SVN: r201165

gcc/
	* config.gcc (aarch64*-*-*): Support --with-abi.
	(aarch64*-*-elf): Support --with-multilib-list.
	(aarch64*-*-linux*): Likewise.
	(supported_defaults): Add abi to aarch64*-*-*.
	* configure.ac: Mention AArch64 for --with-multilib-list.
	* configure: Re-generated.
	* config/aarch64/biarchilp32.h: New file.
	* config/aarch64/biarchlp64.h: New file.
	* config/aarch64/aarch64-elf.h (ENDIAN_SPEC): New define.
	(ABI_SPEC): Ditto.
	(MULTILIB_DEFAULTS): Ditto.
	(DRIVER_SELF_SPECS): Ditto.
	(ASM_SPEC): Update to also substitute -mabi.
	* config/aarch64/aarch64-elf-raw.h (LINK_SPEC): Add linker script
	file whose name depends on -mabi= and -mbig-endian.
	* config/aarch64/aarch64.h (LONG_TYPE_SIZE): Change to depend on
	TARGET_ILP32.
	(POINTER_SIZE): New define.
	(POINTERS_EXTEND_UNSIGNED): Ditto.
	(enum aarch64_abi_type): New enumeration tag.
	(AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
	(AARCH64_ABI_DEFAULT): Define to AARCH64_ABI_LP64 if undefined.
	(TARGET_ILP32): New define.
	* config/aarch64/aarch64.opt (mabi): New.
	(aarch64_abi): New.
	(ilp32, lp64): New values for -mabi.
	* config/aarch64/t-aarch64 (comma): New define.
	(MULTILIB_OPTIONS): Ditto.
	(MULTILIB_DIRNAMES): Ditto.
	* config/aarch64/t-aarch64-linux (MULTIARCH_DIRNAME): New define.
	* doc/invoke.texi: Document -mabi for AArch64.

From-SVN: r201164

	* config/avr/avr.md: Explain asm print modifier 'r' for REG.

From-SVN: r201163

2013-07-23   Ondřej Bílka  <neleai@seznam.cz>

        * decl.c: Fix comment typos.
        * interface.c: Likewise.
        * trans-array.c: Likewise.
        * trans.c: Likewise.

From-SVN: r201162

	* config/fpu-387.h (get_fpu_rounding_mode): Read rounding mode
	from SSE mxcsr register on x86_64.

From-SVN: r201161

2013-07-23  Paolo Carlini  <paolo.carlini@oracle.com>

	* include/std/random: Add back <cstdio> include.
	* src/c++11/random.cc: Don't include <cstdio> here.

From-SVN: r201160

	* elf.c (elf_syminfo): Loop over the elf_syminfo_data chain.

From-SVN: r201159

	* elf.c (backtrace_initialize): Pass elf_fileline_fn to
	dl_iterate_phdr callbacks.

From-SVN: r201158

2013-07-23  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/s390/linux-unwind.h: Use the proper dwarf to hard reg
	mapping for FPRs when creating the fallback framestate.

From-SVN: r201156

From-SVN: r201154

2013-07-23  Tom Tromey  <tromey@redhat.com>
	    Joseph Myers  <joseph@codesourcery.com>

c-family:
	* c-common.h (enum rid) <RID_GENERIC>: New constant.
	* c-common.c (c_common_reswords): Add _Generic.

c:
	* c-parser.c (struct c_generic_association): New.
	(c_generic_association_d): New typedef.
	(c_parser_generic_selection): New function.
	(c_parser_postfix_expression): Handle RID_GENERIC.

testsuite:
	* gcc.dg/c11-generic-1.c: New file.
	* gcc.dg/c11-generic-2.c: New file.

Co-Authored-By: Joseph Myers <joseph@codesourcery.com>

From-SVN: r201153

From-SVN: r201152

2013-07-22  Bill Schmidt  <wschmidt@vnet.linux.ibm.com>
	    Anton Blanchard <anton@au1.ibm.com>

	* config/rs6000/rs6000.c (rs6000_expand_vector_init): Fix
	endianness when selecting field to splat.


Co-Authored-By: Anton Blanchard <anton@au1.ibm.com>

From-SVN: r201149

2013-07-22  Eric Christopher  <echristo@gmail.com>

	    * dwarf2out.c (die_odr_checksum): New function to use
	    CHECKSUM_ macros and ULEB128 for DIE tag.
	    (generate_type_signature): Use.

From-SVN: r201148

	* config.gcc (sparc*-*-*): Accept leon3 processor.
	(sparc-leon*-*): Merge with sparc*-*-* and add leon3 support.
	* doc/invoke.texi (SPARC Options): Adjust -mfix-ut699 entry.
	* config/sparc/sparc-opts.h (enum processor_type): Add PROCESSOR_LEON3.
	* config/sparc/sparc.opt (enum processor_type): Add leon3.
	(mfix-ut699): Adjust comment.
	* config/sparc/sparc.h (TARGET_CPU_leon3): New define.
	(CPP_CPU32_DEFAULT_SPEC): Add leon3 support.
	(CPP_CPU_SPEC): Likewise.
	(ASM_CPU_SPEC): Likewise.
	* config/sparc/sparc.c (leon3_cost): New constant.
	(sparc_option_override): Add leon3 support.
	(mem_ref): New function.
	(sparc_gate_work_around_errata): Return true if -mfix-ut699 is enabled.
	(sparc_do_work_around_errata): Look into the instruction in the delay
	slot and adjust accordingly.  Add fix for the data cache nullify issues
	of the UT699.  Change insertion position for the NOP.
	* config/sparc/leon.md (leon_fpalu, leon_fpmds, write_buf): Delete.
	(leon3_load): New reservation.
	(leon_store): Bump latency to 2.
	(grfpu): New automaton.
	(grfpu_alu): New unit.
	(grfpu_ds): Likewise.
	(leon_fp_alu): Adjust.
	(leon_fp_mult): Delete.
	(leon_fp_div): Split into leon_fp_divs and leon_fp_divd.
	(leon_fp_sqrt): Split into leon_fp_sqrts and leon_fp_sqrtd.
	* config/sparc/sparc.md (cpu): Add leon3.
	* config/sparc/sync.md (atomic_exchangesi): Disable if -mfix-ut699.
	(swapsi): Likewise.
	(atomic_test_and_set): Likewise.
	(ldstub): Likewise.

From-SVN: r201147

	PR libstdc++/57914
	* libsupc++/atexit_thread.cc (run): Delete cleanup elts.

From-SVN: r201146

2013-07-22  Paolo Carlini  <paolo.carlini@oracle.com>

	* cp-tree.h (DERIVED_FROM_P): Pass tf_none to lookup_base, not
	tf_warning_or_error.

From-SVN: r201145

From-SVN: r201144

gcc/
2013-07-26  Jürgen Urban  <JuergenUrban@gmx.de>

	* config.gcc (mips*-*-*): Add --with-fpu support.  Make single the
	default for R5900 targets.
	* config/mips/mips.h (OPTION_DEFAULT_SPECS): Handle --with-fpu.
	(ISA_HAS_LDC1_SDC1): Set to false for TARGET_MIPS5900.
	* config/mips/mips.c (mips_option_override): Report an error for
	-march=r5900 -mhard-float -mdouble-float.  Use spu_single_format
	for -march=r5900 -mhard-float.

From-SVN: r201143

Really add testsuite/gfortran.dg/coarray_31.f90, which should be
in commit Rev. 201140.

From-SVN: r201142

From-SVN: r201141

re PR fortran/57906 (Coarray components: Assignment optimized away (gfortran.dg/coarray/lib_realloc_1.f90))

2013-07-22  Tobias Burnus  <burnus@net-b.de>

        PR fortran/57906
        PR fortran/52052
        * class.c (gfc_build_class_symbol): Set coarray_comp.
        * trans-array.c (structure_alloc_comps): For coarrays,
        directly use the data pointer address.

2013-07-22  Tobias Burnus  <burnus@net-b.de>

        PR fortran/57906
        PR fortran/52052
        * coarray/lib_realloc_1.f90: Permit optimization.
        * gfortran.dg/coarray_31.f90: New.

From-SVN: r201140

From-SVN: r201139

From-SVN: r201138

2013-07-22  Tobias Burnus  <burnus@net-b.de>

        PR fortran/57762
        * gfortran.dg/class_array_7.f03: Fix memory leak.

From-SVN: r201137

re PR c++/52816 ([C++11] Access to private members inside decltype in the signature of a member template causes access control error)

2013-07-22  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/52816
	* g++.dg/cpp0x/decltype56.C: New.

From-SVN: r201136

gcc/testsuite/
2013-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* gcc.dg/pr53265.c: Correct line number in dg-message.

From-SVN: r201135

From-SVN: r201134

2013-07-22  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/57920
	* src/c++11/random.cc (random_device::_M_getval): If possible, use
	read instead of std::fread.
	* include/std/random: Do not include <cstdio> unnecessarily.

From-SVN: r201133

        * df-problems.c (can_move_insns_across): Exit loop once we
        find a non-fixed, non-global register.

        * ipa-pure-const.c (propagate_nothrow): Exit loop after
        setting can_throw.

        * omega.c (omega_eliminate_red): Break after setting red_found.
        (omega_problem_has_red_equations): Similarly after setting found.
        (omega_query_variable): Similarly after setting coupled.

        * trans-decl.c (gfc_build_dummy_array_decl): Exit loop after
        setting PACKED_PARTIAL.

From-SVN: r201132

From-SVN: r201131

2013-07-22  Tobias Burnus  <burnus@net-b.de>

        * trans-array.c (gfc_array_allocate): Correct memory-leak patch.

From-SVN: r201129

instead of asking for ilp32.

From-SVN: r201128

2013-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/constraints.md (Pd): Allow TARGET_THUMB
	instead of TARGET_THUMB1.
	(Pz): New constraint.
	* config/arm/arm.md (arm_addsi3): Add alternatives for 16-bit
	encodings.
	(compare_negsi_si): Likewise.
	(compare_addsi2_op0): Likewise.
	(compare_addsi2_op1): Likewise.
	(addsi3_carryin_<optab>): Likewise.
	(addsi3_carryin_alt2_<optab>): Likewise.
	(addsi3_carryin_shift_<optab>): Disable cond_exec variant
	for arm_restrict_it.
	(subsi3_carryin): Likewise.
	(arm_subsi3_insn): Add alternatives for 16-bit encoding.
	(minmax_arithsi): Disable for arm_restrict_it.
	(minmax_arithsi_non_canon): Adjust for arm_restrict_it.
	(satsi_<SAT:code>): Disable cond_exec variant for arm_restrict_it.
	(satsi_<SAT:code>_shift): Likewise.
	(arm_shiftsi3): Add alternative for 16-bit encoding.
	(arm32_movhf): Disable for arm_restrict_it.
	(arm_cmpdi_unsigned): Add alternatives for 16-bit encoding.
	(arm_movtas_ze): Disable cond_exec variant for arm_restrict_it.

From-SVN: r201126

2013-07-22  Tobias Burnus  <burnus@net-b.de>

        * trans-array.c (gfc_array_allocate,
        gfc_trans_deferred_array): Plug memory leak.

From-SVN: r201125

	* config/arm/arm.md (attribute "insn"): Delete.
	(attribute "type"): Add "mov_imm", "mov_reg", "mov_shift",
	"mov_shift_reg", "mvn_imm", "mvn_reg", "mvn_shift" and "mvn_shift_reg".
	(not_shiftsi): Update for attribute change.
	(not_shiftsi_compare0): Likewise.
	(not_shiftsi_compare0_scratch): Likewise.
	(arm_one_cmplsi2): Likewise.
	(thumb1_one_cmplsi2): Likewise.
	(notsi_compare0): Likewise.
	(notsi_compare0_scratch): Likewise.
	(thumb1_movdi_insn): Likewise.
	(arm_movsi_insn): Likewise.
	(movhi_insn_arch4): Likewise.
	(movhi_bytes): Likewise.
	(arm_movqi_insn): Likewise.
	(thumb1_movqi_insn): Likewise.
	(arm32_movhf): Likewise.
	(thumb1_movhf): Likewise.
	(arm_movsf_soft_insn): Likewise.
	(thumb1_movsf_insn): Likewise.
	(thumb_movdf_insn): Likewise.
	(movsicc_insn): Likewise.
	(movsfcc_soft_insn): Likewise.
	(and_scc): Likewise.
	(cond_move): Likewise.
	(if_move_not): Likewise.
	(if_not_move): Likewise.
	(if_shift_move): Likewise.
	(if_move_shift): Likewise.
	(if_shift_shift): Likewise.
	(if_not_arith): Likewise.
	(if_arith_not): Likewise.
	(cond_move_not): Likewise.
	* config/arm/neon.md (neon_mov<mode>): Update for attribute change.
	(neon_mov<mode>): Likewise.
	* config/arm/vfp.md (arm_movsi_vfp): Update for attribute change.
	(thumb2_movsi_vfp): Likewise.
	(movsf_vfp): Likewise.
	(thumb2_movsf_vfp): Likewise.
	* config/arm/arm.c (xscale_sched_adjust_cost): Update for attribute change.
	(cortexa7_older_only): Likewise.
	(cortexa7_younger): Likewise.
	* config/arm/arm1020e.md (1020alu_op): Update for attribute change.
	(1020alu_shift_op): Likewise.
	(1020alu_shift_reg_op): Likewise.
	* config/arm/arm1026ejs.md (alu_op): Update for attribute change.
	(alu_shift_op): Likewise.
	(alu_shift_reg_op): Likewise.
	* config/arm/arm1136jfs.md (11_alu_op): Update for attribute change.
	(11_alu_shift_op): Likewise.
	(11_alu_shift_reg_op): Likewise.
	* config/arm/arm926ejs.md (9_alu_op): Update for attribute change.
	(9_alu_shift_reg_op): Likewise.
	* config/arm/cortex-a15.md (cortex_a15_alu): Update for attribute change.
	(cortex_a15_alu_shift): Likewise.
	(cortex_a15_alu_shift_reg): Likewise.
	* config/arm/cortex-a5.md (cortex_a5_alu): Update for attribute change.
	(cortex_a5_alu_shift): Likewise.
	* config/arm/cortex-a53.md (cortex_a53_alu): Update for attribute change.
	(cortex_a53_alu_shift): Likewise.
	* config/arm/cortex-a7.md (cortex_a7_alu_imm): Update for attribute change.
	(cortex_a7_alu_reg): Likewise.
	(cortex_a7_alu_shift): Likewise.
	* config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute change.
	(cortex_a8_alu_shift): Likewise.
	(cortex_a8_alu_shift_reg): Likewise.
	(cortex_a8_mov): Likewise.
	* config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute change.
	(cortex_a9_dp_shift): Likewise.
	* config/arm/cortex-m4.md (cortex_m4_alu): Update for attribute change.
	* config/arm/cortex-r4.md (cortex_r4_alu): Update for attribute change.
	(cortex_r4_mov): Likewise.
	(cortex_r4_alu_shift): Likewise.
	(cortex_r4_alu_shift_reg): Likewise.
	* config/arm/fa526.md (526_alu_op): Update for attribute change.
	(526_alu_shift_op): Likewise.
	* config/arm/fa606te.md (606te_alu_op): Update for attribute change.
	* config/arm/fa626te.md (626te_alu_op): Update for attribute change.
	(626te_alu_shift_op): Likewise.
	* config/arm/fa726te.md (726te_shift_op): Update for attribute change.
	(726te_alu_op): Likewise.
	(726te_alu_shift_op): Likewise.
	(726te_alu_shift_reg_op): Likewise.
	* config/arm/fmp626.md (mp626_alu_op): Update for attribute change.
	(mp626_alu_shift_op): Likewise.
	* config/arm/marvell-pj4.md (pj4_alu_e1): Update for attribute change.
	(pj4_alu_e1_conds): Likewise.
	(pj4_alu): Likewise.
	(pj4_alu_conds): Likewise.
	(pj4_shift): Likewise.
	(pj4_shift_conds): Likewise.
	(pj4_alu_shift): Likewise.
	(pj4_alu_shift_conds): Likewise.

From-SVN: r201124

	PR testsuite/52641
	* gcc.c-torture/execute/pr57124.x: Skip int16 platforms.
	* gcc.c-torture/execute/pr53366-1.x: New: Skip int16 platforms.

From-SVN: r201123

2013-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/predicates.md (shiftable_operator_strict_it):
	New predicate.
	* config/arm/thumb2.md (thumb_andsi_not_shiftsi_si):
	Disable cond_exec version for arm_restrict_it.
	(thumb2_smaxsi3): Convert to generate cond_exec.
	(thumb2_sminsi3): Likewise.
	(thumb32_umaxsi3): Likewise.
	(thumb2_uminsi3): Likewise.
	(thumb2_abssi2): Adjust constraints for arm_restrict_it.
	(thumb2_neg_abssi2): Likewise.
	(thumb2_mov_scc): Add alternative for 16-bit encoding.
	(thumb2_movsicc_insn): Adjust alternatives.
	(thumb2_mov_negscc): Disable for arm_restrict_it.
	(thumb2_mov_negscc_strict_it): New pattern.
	(thumb2_mov_notscc_strict_it): New pattern.
	(thumb2_mov_notscc): Disable for arm_restrict_it.
	(thumb2_ior_scc): Likewise.
	(thumb2_ior_scc_strict_it): New pattern.
	(thumb2_cond_move): Adjust for arm_restrict_it.
	(thumb2_cond_arith): Disable for arm_restrict_it.
	(thumb2_cond_arith_strict_it): New pattern.
	(thumb2_cond_sub): Adjust for arm_restrict_it.
	(thumb2_movcond): Likewise.
	(thumb2_extendqisi_v6): Disable cond_exec variant for arm_restrict_it.
	(thumb2_zero_extendhisi2_v6): Likewise.
	(thumb2_zero_extendqisi2_v6): Likewise.
	(orsi_notsi_si): Likewise.
	(orsi_not_shiftsi_si): Likewise.

From-SVN: r201122

	* config/avr/avr.c (avr_out_xload): No SBIS around LPM so that
	instruction sequence is 1 byte shorter.

From-SVN: r201121

	PR testsuite/52641
	* gcc.c-torture/execute/pr57344-2.x: New. Skip int16.
	* gcc.dg/pr53265.c: Add dg-require-effective-target size32plus.
	* gcc.dg/torture/pr53366-1.c: Same.
	* gcc.dg/torture/pr57381.c: Add dg-require-effective-target int32plus.
	* gcc.dg/torture/pr56488.c: Same.
	* gcc.dg/torture/pr57584.c: Same.
	* gcc.dg/tree-ssa/pr57385.c: Same.
	* gcc.dg/pr57154.c: Add dg-require-effective-target scheduling.

From-SVN: r201119