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  1. 30 Apr, 2018 9 commits
    • [ARC] Update movhi and movdi patterns. · 2295aa75 
      Allow signed 6-bit short immediates into st[d] instructions.

2017-10-19  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (arc_split_move): Allow signed 6-bit constants
	as source of std instructions.
	* config/arc/arc.md (movsi_insn): Update pattern predicate to
	allow 6-bit constants as source for store instructions.
	(movdi_insn): Update instruction pattern to allow 6-bit constants
	as source for store instructions.

testsuite/
2017-10-19  Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/store-merge-1.c: New test.
	* gcc.target/arc/add_n-combine.c: Update test.

From-SVN: r259762
      Claudiu Zissulescu committed
    • * doc/invoke.texi (-fdebug-types-section): Fix grammar. · e2df7e6d 
      From-SVN: r259761
      Jonathan Wakely committed
    • [patch] allow '-' for stdout dump · bd9918c4 
      https://gcc.gnu.org/ml/gcc-patches/2018-04/msg01303.html
	* dumpfile.c (dump_open): Allow '-' for stdout.
	* doc/invoke.texi (Developer Options): Document dump filename
	determination early.  Document stdin/stdout selection.

Co-Authored-By: Sandra Loosemore <sandra@codesourcery.com>

From-SVN: r259760
      Nathan Sidwell committed
    • * lto-partition.c (lto_balanced_map): Fix sanity check. · e693ebce 
      From-SVN: r259759
      Jan Hubicka committed
    • Microblaze Target: PIC data text relative · af1682fc 
      2018-04-30 Andrew Sadek  <andrew.sadek.se@gmail.com>

gcc/ChangeLog:
	* config/microblaze/microblaze.opt: add new option -mpic-data-text-rel.
	* config/microblaze/microblaze-protos.h (microblaze_constant_address_p):
	Add declaration.
	* gcc/config/microblaze/microblaze.h (microblaze_constant_address_p):
	CONSTANT_ADDRESS_P definition to microblaze_constant_address_p.
	* config/microblaze/microblaze.c (TARGET_PIC_DATA_TEXT_REL):
	New addressing mode for data-text relative position indepenedent code.
	(microblaze_classify_unspec): add 'UNSPEC_TEXT' case ->
	'ADDRESS_SYMBOLIC_TXT_REL'.
	(microblaze_classify_address): Add handling for UNSPEC + CONST_INT.
	(microblaze_legitimate_pic_operand): Exclude function calls from
	pic operands in case of TARGET_PIC_DATA_TEXT_REL option.
	(microblaze_legitimize_address): Generate 'UNSPEC_TEXT' for all possible
	addresses cases.
	(microblaze_address_insns): Add 'ADDRESS_SYMBOLIC_TXT_REL' case.
	(print_operand): Add 'ADDRESS_SYMBOLIC_TXT_REL' case.
	(print_operand_address): Add 'ADDRESS_SYMBOLIC_TXT_REL' case + handling
	for 'address + offset'.
	(microblaze_expand_prologue): Add new function prologue call for
	'r20' assignation.
	(microblaze_asm_generate_pic_addr_dif_vec): Override new target hook
	'TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC' to disable address diff vector
	table in case of TARGET_PIC_DATA_TEXT_REL.
	(expand_pic_symbol_ref): Add handling for 'UNSPEC_TEXT'.
	* gcc/config/microblaze/microblaze.md (TARGET_PIC_DATA_TEXT_REL):
	Add new macros 'UNSPEC_TEXT',
	'UNSPEC_SET_TEXT' + add rule for setting r20 in function prologue
	+ exclude function calls from 'UNSPEC_PLT' in case of data text
	relative mode.
	* doc/tm.texi.in (TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC): Add
	new target hook for generating address diff vector tables in case of
	flag_pic.
	* doc/tm.texi : Regenerate.
	* stmt.c (TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC): Append new condition
	'targetm.asm_out.generate_pic_addr_diff_vec' to flag_pic in case
	of addr diff vector generation.
	* target.def (TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC): Add
	target hook definition.
	* targhooks.h, gcc/targhooks.c (TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC):
	Add default function for generate_pic_addr_diff_vec -> flag_pic.
	* doc/invoke.texi (Add new pic option): Add new microblaze pic
	option for data text relative.

testsuite/ChangeLog:
	* gcc.target/microblaze/others/data_var1.c: Include
	PIC case of r20 base register.
	* gcc.target/microblaze/others/data_var2.c: Ditto.
	* gcc.target/microblaze/others/picdtr.c: Add new
	test case for -mpic-is-data-text-relative.
	* gcc.target/microblaze/others/sdata_var1.c: Add
	* gcc.target/microblaze/others/sdata_var2.c: Ditto.
	* gcc.target/microblaze/others/sdata_var3.c: Ditto.
	* gcc.target/microblaze/others/sdata_var4.c: Ditto.
	* gcc.target/microblaze/others/sdata_var5.c: Ditto.
	* gcc.target/microblaze/others/sdata_var6.c: Ditto.
	* gcc.target/microblaze/others/string_cst1_gpopt.c:	Ditto.
	* gcc.target/microblaze/others/string_cst2_gpopt.c: Ditto.

From-SVN: r259758
      Andrew Sadek committed
    • tree-chrec.h (evolution_function_is_constant_p): Remove redundant check. · 5885f027 
      2018-04-30  Richard Biener  <rguenther@suse.de>

	* tree-chrec.h (evolution_function_is_constant_p): Remove
	redundant check.
	* tree-cfg.c (tree_node_can_be_shared): Re-order checks.

From-SVN: r259756
      Richard Biener committed
    • re PR bootstrap/85571 (non-bootstrap-debug miscompare with trunk) · bece35ca 
      2018-04-30  Richard Biener  <rguenther@suse.de>

	PR bootstrap/85571
	* Makefile.tpl (STAGE3_CFLAGS): Use -fchecking=1.
	(STAGE3_TFLAGS): Likewise.
	(STAGEtrain_CFLAGS): Filter out -fchecking=1.
	(STAGEtrain_TFLAGS): Likewise.
	* Makefile.in: Regenerate.

	* dwarf2out.c (gen_producer_string): Ignore -fchecking[=].

From-SVN: r259755
      Richard Biener committed
    • re PR tree-optimization/28364 (poor optimization choices when iterating over a… · 2925cd9d 
      re PR tree-optimization/28364 (poor optimization choices when iterating over a std::string (probably not c++-specific))

2018-04-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/28364
	PR tree-optimization/85275
	* tree-ssa-loop-ch.c (ch_base::copy_headers): Stop after
	copying first exit test.

	* gcc.dg/tree-ssa/copy-headers-5.c: New testcase.
	* gcc.dg/tree-ssa/predcom-8.c: Likewise.
	* gcc.dg/tree-ssa/cunroll-13.c: Rewrite to gimple testcase.
	* gcc.dg/tree-ssa/ivopt_mult_1.c: XFAIL.
	* gcc.dg/tree-ssa/ivopt_mult_1g.c: Add gimple variant that
	still passes.
	* gcc.dg/tree-ssa/ivopt_mult_2.c: XFAIL.
	* gcc.dg/tree-ssa/ivopt_mult_2g.c: Add gimple variant that
	still passes.
	* gcc.dg/tree-ssa/ssa-dom-thread-7.c: Adjust.
	* gcc.dg/tree-ssa/20030710-1.c: Likewise.
	* gcc.dg/tree-ssa/20030711-1.c: Likewise.

From-SVN: r259754
      Richard Biener committed
    • Daily bump. · 03b42a71 
      From-SVN: r259753
      GCC Administrator committed
  3. 29 Apr, 2018 3 commits
    • lto-partition.c: Include sreal.h · ddb0b824 
      
	* lto-partition.c: Include sreal.h
	(add_symbol_to_partition_1): Use size instead of self_size
	for size estimate.
	(account_reference_p): New.
	(lto_balanced_map): Use 64bit arithmetics for size calculatoins; cleanup;
	fix accounting errors in boundary size; add debug output; combine cost
	as cost/size instead of cost/internal; reduce the partitioning error to
	+- 1/8 of the parttion size.

From-SVN: r259749
      Jan Hubicka committed
    • [openacc, testsuite] Fix undefined behaviour in atomic_capture-1.c · 8d70b61e 
      2018-04-29  Julian Brown  <julian@codesourcery.com>
	    Tom de Vries  <tom@codesourcery.com>

	PR testsuite/85527
	* testsuite/libgomp.oacc-c-c++-common/atomic_capture-1.c: Allow
	arbitrary order for iterations of atomic subtract check.

Co-Authored-By: Tom de Vries <tom@codesourcery.com>

From-SVN: r259748
      Julian Brown committed
    • Daily bump. · e7d32421 
      From-SVN: r259747
      GCC Administrator committed
  5. 28 Apr, 2018 4 commits
    • DWARF: Add .debug_addr table header for dwarf_version >= 5. · 171b0a01 
      GNU DebugFission didn't add table headers for the .debug_addr
tables, but DWARF5 does. The table header makes it possible
for a DWARF consumer to parse the address tables without having
to index all .debug_info CUs first.

We can keep using the .debug_addr section label as is, because the
DW_AT_[GNU_]addr_base attribute points at the actual address index,
which starts right after the table header. So the label is generated
at the correct location whether the header is added first or not.

Add DW_AT_addr_base instead of DW_AT_GNU_addr_base to the skeleton
CU DIE for DWARF5.

gcc/ChangeLog

	* dwarf2out.c (dwarf2out_finish): Add .debug_addr table header for
	dwarf_version >= 5.
	(dwarf_AT): Handle DW_AT_addr_base.
	(add_top_level_skeleton_die_attrs): Use dwarf_AT for DW_AT_addr_base.

From-SVN: r259743
      Mark Wielaard committed
    • re PR target/84431 (Suboptimal code for masked shifts (x86/x86-64)) · 6754dfa2 
      	PR target/84431
	* config/i386/i386.md (*ashl<dwi>3_doubleword_mask): New pattern.
	(*ashl<dwi>3_doubleword_mask_1): Ditto.
	(*<shift_insn><dwi>3_doubleword_mask): Ditto.
	(*<shift_insn><dwi>3_doubleword_mask_1): Ditto.

testsuite/ChangeLog:

	PR target/84431
	* gcc.target/i386/pr84431.c: New test.

From-SVN: r259739
      Uros Bizjak committed
    • tree-cfg.c (verify_gimple_phi): Take a gphi * argument. · 782e4764 
      2018-04-28  Richard Biener  <rguenther@suse.de>

	* tree-cfg.c (verify_gimple_phi): Take a gphi * argument.
	(verify_gimple_in_cfg): Rename visited_stmts to visited_throwing_stmts
	to reflect use.  Only add interesting stmts.

From-SVN: r259738
      Richard Biener committed
    • Daily bump. · 5c2cab46 
      From-SVN: r259737
      GCC Administrator committed
  7. 27 Apr, 2018 23 commits
  9. 26 Apr, 2018 1 commit
    • MIPS/GCC/testsuite: Fix data-sym-pool.c for n64 code · b4d62b40 
      With the soft-float n64 ABI and the data-sym-pool.c test case code like 
below is produced:

	.file	1 "data-sym-pool.c"
	.section .mdebug.abi64
	.previous
	.nan	legacy
	.module	softfloat
	.module	oddspreg
	.abicalls
	.option	pic0
	.text
	.align	2
	.globl	frob
	.set	mips16
	.set	nomicromips
	.ent	frob
	.type	frob, @function
frob:
	.frame	$17,16,$31		# vars= 0, regs= 1/0, args= 0, gp= 0
	.mask	0x00020000,-8
	.fmask	0x00000000,0
	daddiu	$sp,-16
	sd	$17,8($sp)
	move	$17,$sp
	ld	$2,.L3
	move	$sp,$17
	ld	$17,8($sp)
	daddiu	$sp,16
	jr	$31
	.type	__pool_frob_3, @object
__pool_frob_3:
	.align	3
.L3:
	.dword	305419896
	.type	__pend_frob_3, @function
__pend_frob_3:
	.insn
	.end	frob
	.size	frob, .-frob
	.ident	"GCC: (GNU) 8.0.1 20180410 (experimental)"

(we have no support for hard-float n64 MIPS16 code generation), which 
means that the test case will fail, as the regular expression pattern 
expects `lw' and `.word' rather than `ld' and `.dword' respectively to 
appear in assembly code generation.  Correct the pattern in an obvious 
way then making it accept both intructions and pseudo-ops.

	gcc/testsuite/
	* gcc.target/mips/data-sym-pool.c (dg-options): Match `ld' and
	`.dword' in addition to `lw' and `.word'.

From-SVN: r259691
      Maciej W. Rozycki committed