[AArch64] PR target/85512: Tighten SIMD right shift immediate constraints pt2

	PR target/85512
	* config/aarch64/constraints.md (Usg): Limit to 31.
	(Usj): Limit to 63.

From-SVN: r259699

gcc/ChangeLog

+2018-04-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	PR target/85512
+	* config/aarch64/constraints.md (Usg): Limit to 31.
+	(Usj): Limit to 63.
+
 2018-04-27  Jakub Jelinek  <jakub@redhat.com>
 
 	PR tree-optimization/85529

gcc/config/aarch64/constraints.md

@@ -158,14 +158,14 @@
   A constraint that matches an immediate right shift constant in SImode
   suitable for a SISD instruction."
   (and (match_code "const_int")
-       (match_test "IN_RANGE (ival, 1, 32)")))
+       (match_test "IN_RANGE (ival, 1, 31)")))
 
 (define_constraint "Usj"
   "@internal
   A constraint that matches an immediate right shift constant in DImode
   suitable for a SISD instruction."
   (and (match_code "const_int")
-       (match_test "IN_RANGE (ival, 1, 64)")))
+       (match_test "IN_RANGE (ival, 1, 63)")))
 
 (define_constraint "UsM"
   "@internal