* testsuite/util/testsuite_hooks.h (THROW): Define.
	* testsuite/util/replacement_memory_operators.h: Include
	testsuite_hooks.h and use THROW macro.
	* testsuite/util/testsuite_tr1.h: Likewise.
	* testsuite/20_util/allocator/1.cc: Use THROW macro.
	* testsuite/22_locale/locale/cons/12352.cc: Likewise.
	* testsuite/23_containers/vector/zero_sized_allocations.cc: Likewise.
	* testsuite/30_threads/lock_guard/cons/1.cc: Replace dynamic exception
	specification with noexcept-specifier.
	* testsuite/ext/pool_allocator/allocate_chunk.cc: Include
	testsuite_hooks.h and use THROW macro.
	* testsuite/ext/profile/replace_new.cc: Likewise.

From-SVN: r243353

	* include/ext/bitmap_allocator.h (bitmap_allocator::_S_refill_pool)
	(bitmap_allocator::_M_allocate_single_object)
	(bitmap_allocator::_M_get): Use _GLIBCXX_THROW macro.

From-SVN: r243352

	* testsuite/18_support/bad_exception/59392.cc: Disable for C++17.

From-SVN: r243351

	* testsuite/18_support/headers/new/synopsis.cc: Add C++14 and C++17
	declarations.
	* testsuite/18_support/headers/new/synopsis_cxx98.cc: New test.

From-SVN: r243349

GCC caches the whether a function is a leaf in crtl->is_leaf. Using this
in the backend is best as leaf_function_p may not work correctly (eg. while
emitting prolog or epilog code).  There are many reads of crtl->is_leaf
before it is initialized.  Many targets do in targetm.frame_pointer_required
(eg. arm, aarch64, i386, mips, sparc), which is called before register 
allocation by ira_setup_eliminable_regset and sched_init.

Additionally, SHRINK_WRAPPING_ENABLED calls targetm.have_simple_return,
which evaluates the condition of the simple_return instruction.  On ARM
this results in a call to use_simple_return_p which requires crtl->is_leaf
to be set correctly.

To fix this, initialize crtl->is_leaf in ira_setup_eliminable_regset and
early on in ira.  A bootstrap did not find any uninitialized reads of
crtl->is_leaf on Thumb-2.  A follow-up patch will remove incorrect uses
of leaf_function_p from the ARM backend.

    gcc/
	* gcc/ira.c (ira_setup_eliminable_regset): Initialize crtl->is_leaf.
	(ira): Move initialization of crtl->is_leaf earlier.

From-SVN: r243347

Improve TI mode address offsets - these may either use LDP of 64-bit or
LDR of 128-bit, so we need to use the correct intersection of offsets.
When splitting a large offset into base and offset, use a signed 9-bit 
unscaled offset.

Remove the Ump constraint on movti and movtf instructions as this blocks
the reload optimizer from merging address CSEs (is this supposed to work
only on 'm' constraints?).  The result is improved codesize, especially
wrf and gamess in SPEC2006.

    gcc/
	* config/aarch64/aarch64.md (movti_aarch64): Change Ump to m.
	(movtf_aarch64): Likewise.
	* config/aarch64/aarch64.c (aarch64_classify_address):
	Use correct intersection of offsets.
	(aarch64_legitimize_address_displacement): Use 9-bit signed offsets.
	(aarch64_legitimize_address): Use 9-bit signed offsets for TI/TF mode.
	Use 7-bit signed scaled mode for modes > 16 bytes.

From-SVN: r243346

gcc/

	PR rtl-optimization/78561
	* config/rs6000/rs6000.c (rs6000_reg_live_or_pic_offset_p) Use
	constant_pool_empty_p in place of get_pool_size_upper_bound.
	(rs6000_stack_info): Likewise.
	(rs6000_emit_prologue): Likewise.
	(rs6000_elf_declare_function_name): Likewise.
	(rs6000_set_up_by_prologue): Likewise.
	(rs6000_can_eliminate): Likewise.
	* output.h (get_pool_size_upper_bound): Delete.
	(constant_pool_empty_p): New.
	* varasm.c (get_pool_size_upper_bound): Delete
	(constant_pool_empty_p): New.

From-SVN: r243345

2016-12-07  Martin Jambor  <mjambor@suse.cz>

	PR c++/78589
	* error.c (dump_decl): Use dump_function_name to dump
	!DECL_LANG_SPECIFIC function decls with no or self-referencing
	abstract origin.

From-SVN: r243344

	* pt.c (tsubst <{NON,}TYPE_ARGUMENT_PACK>: Simplify control flow
	and avoid re-tsubsting type.

From-SVN: r243343

	* cp-tree.h (enum cp_tree_index): Add CPTI_AUTO_IDENTIFIER &
	CPTI_DECLTYPE_AUTO_IDENTIFIER.
	(auto_identifier, decltype_auto_identifier): New.
	*decl.c (initialize_predefined_identifiers): Add 'auto' and
	'decltype(auto)'.
	(grokdeclarator): Use cached identifier.
	* pt.c (make_decltype_auto, make_auto, make_constrained_auto,
	is_auto): Likewise.

From-SVN: r243342

	* gcc-interface/decl.c (gnat_to_gnu_entity): When they are global,
	consider ___XR GNAT encodings variables for renamings as static so
	they have a location in the debug info.

From-SVN: r243341

decl.c (gnat_to_gnu_entity): Translate System.Address into ptr_type_node for every foreign convention.

	* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Variable>: Translate
	System.Address into ptr_type_node for every foreign convention.
	(gnat_to_gnu_subprog_type): Likewise for result and parameter types.
	(gnat_to_gnu_param): Do not do it here for GCC builtins.
	(intrin_return_compatible_p): Likewise.

From-SVN: r243340

From-SVN: r243338

	* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Enumeration_Subtype>:
	Also call finish_character_type on Character subtypes.
	* gcc-interface/utils.c (finish_character_type): Deal with subtypes.

From-SVN: r243336

	PR tree-optimization/78691
	* match.pd ((convert1 (minmax ((convert2 (x) c)))) -> minmax (x c)):
	Require integral type for the outer expression.
	gcc/testsuite
	PR tree-optimization/78691
	* gcc.target/i386/pr78691-i386.c: New test.
	* gcc.target/powerpc/pr78691-ppc.c: New test.

From-SVN: r243335

	* gcc.target/i386/pr70322-1.c: Add -mno-stackrealign to dg-options.
	* gcc.target/i386/pr70322-2.c: Likewise.
	* gcc.target/i386/pr70322-3.c: Likewise.
	* gcc.target/i386/pr70322-4.c: Likewise.

From-SVN: r243334

gcc
	* config/aarch64/aarch64.c
	(aarch64_builtin_support_vector_misalignment): New.
	(TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Define.
gcc/testsuite
	* gcc.target/aarch64/pr71727.c : New Testcase.

From-SVN: r243333

In r243317 I accidentally introduced an assumption in a selftest
in i386.c that Pmode == DImode.  This patch conditionalizes the
overzealous string comparison to avoid breaking the build on
32-bit i386.c targets.

gcc/ChangeLog:
	PR bootstrap/78705
	* config/i386/i386.c (selftest::ix86_test_dumping_memory_blockage):
	Conditionalize the string comparison on Pmode == DImode.

From-SVN: r243332

From-SVN: r243328

	PR tree-optimization/67955
	* tree-ssa-alias.c (same_addr_size_stores_p): New function.
	(stmt_kills_ref_p): Use it.

	PR tree-optimization/67955
	* gcc.dg/tree-ssa/dse-points-to.c: New test.

From-SVN: r243325

From-SVN: r243324

	PR middle-end/78700
	* calls.c (expand_call): Move back call to prepare_call_address.

From-SVN: r243322

    
    Add a new flag on the Var_expression class that indicates
    whether the var reference appears in an "lvalue" context
    (for example, on the LHS of an assignment stmt) or an
    "rvalue" context (for example, as an argument of a call).
    
    Add a traversal pass that visits assignment stmt LHS subtrees
    so as to mark things prior to backend gen. Select the right
    context value in other places where Backend::var_expression is
    called.
    
    Reviewed-on: https://go-review.googlesource.com/33990

	* go-gcc.cc (Gcc_backend::var_expression): Add Varexpr_context
	parameter.

From-SVN: r243321

[gcc]
2016-12-06  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/78658
	* config/rs6000/rs6000.md (zero_extendqi<mode>2): Use ^ instead of
	?* constraints for the ISA 3.0 patterns, so the register allocator
	is more likely to allocate QImode/HImode to vector registers for
	conversion to floating point unless a reload is needed.
	(zero_extendhi<mode>2): Likewise.
	(float<QHI:mode><FP_ISA3:mode>2_internal): Properly deal with the
	first alternative which is converting QImode/HImode to floating
	point and the QImode/HImode value is in a vector register, and
	does not allocate the second pseudo register.  Remove zero
	extending into traditional floating point registers, since the
	instruction used only works on traditional altivec registers.
	(floatuns<QHI:mode><FP_ISA3:mode>2_internal): Likewise.

[gcc/testsuite]
2016-12-06  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/78658
	* gcc.target/powerpc/pr78658.c: New test.

From-SVN: r243320

gcc/ChangeLog:
	* config/i386/i386.c: Include print-rtl.h.
	(selftest::ix86_test_dumping_memory_blockage): New function.
	(selftest::ix86_run_selftests): Call it.
	* print-rtl-function.c (print_rtx_function): Create an
	rtx_reuse_manager and use it.
	* print-rtl.c: Include "rtl-iter.h".
	(rtx_writer::rtx_writer): Add reuse_manager param.
	(rtx_reuse_manager::rtx_reuse_manager): New ctor.
	(uses_rtx_reuse_p): New function.
	(rtx_reuse_manager::preprocess): New function.
	(rtx_reuse_manager::has_reuse_id): New function.
	(rtx_reuse_manager::seen_def_p): New function.
	(rtx_reuse_manager::set_seen_def): New function.
	(rtx_writer::print_rtx): If "in_rtx" has a reuse ID, print it as a
	prefix the first time in_rtx is seen, and print reuse_rtx
	subsequently.
	(print_inline_rtx): Supply NULL for new reuse_manager param.
	(debug_rtx): Likewise.
	(print_rtl): Likewise.
	(print_rtl_single): Likewise.
	(rtx_writer::print_rtl_single_with_indent): Likewise.
	* print-rtl.h: Include bitmap.h when building for host.
	(rtx_writer::rtx_writer): Add reuse_manager param.
	(rtx_writer::m_rtx_reuse_manager): New field.
	(class rtx_reuse_manager): New class.
	* rtl-tests.c (selftest::assert_rtl_dump_eq): Add reuse_manager
	param and use it when constructing rtx_writer.
	(selftest::test_dumping_rtx_reuse): New function.
	(selftest::rtl_tests_c_tests): Call it.
	* selftest-rtl.h (class rtx_reuse_manager): New forward decl.
	(selftest::assert_rtl_dump_eq): Add reuse_manager param.
	(ASSERT_RTL_DUMP_EQ): Supply NULL for reuse_manager param.
	(ASSERT_RTL_DUMP_EQ_WITH_REUSE): New macro.

From-SVN: r243317

2016-12-06  Vladimir Makarov  <vmakarov@redhat.com>

	target/77761
	* lra-lives.c (process_bb_lives): Update biggest mode for
	implicitly used hard reg.

2016-12-06  Vladimir Makarov  <vmakarov@redhat.com>

	target/77761
	* testsuite/gcc.target/i386/pr77761.c: New.

From-SVN: r243316

	* config/i386/predicates.md (general_gr_operand): New predicate.
	* config/i386/i386.md (TImode and DImode push_operand splitter):
	Use general_gr_operand.  Macroize using DWI mode macro.
	(TImode and DImode nonimmediate_operand splitter): Use
	nonimmediate_gr_operand and general_gr_operand.  Macroize using
	DWI mode macro.
	(TF/XF/DFmode push_operand splitter): Use general_gr_operand.
	(TFmode nonimmediate_operand splitter): Use nonimmediate_gr_operand
	and general_gr_operand.
	(XFmode nonimmediate_operand splitter): Ditto.
	(DFmode nonimmediate_operand splitter): Ditto.
	* config/i386/mmx.md (MMXMODE nonimmediate_operand splitter): Ditto.

From-SVN: r243315

Added #ifdef case for when void* is 16 bits so it compiles in AVR
target.

2016-12-06  Felipe Magno de Almeida  <felipe@expertisesolutions.com.br>

	* src/c++11/cow-stdexcept.cc: Add special case for 16 bit pointers.

From-SVN: r243310

Enable libstdc++ compilation in AVR targets with AVR-Libc. Most
floating point math functions are already defined in AVR-Libc, so
defines are in place to avoid multiple definition of these functions.

2016-12-06  Felipe Magno de Almeida  <felipe@expertisesolutions.com.br>

	* crossconfig.m4: Add avr target for cross-compilation.
	* configure: Regenerate.

From-SVN: r243309

2016-12-06  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

	PR fortran/78659
	* resolve.c (resolve_fl_namelist): Remove unneeded error.
	PR fortran/78659
	* gfortran.dg/alloc_comp_constraint_1.f90: Update test.
	* gfortran.dg/alloc_comp_constraint_7.f90: New test.
	* gfortran.dg/namelist_34.f90: Update test.
	* gfortran.dg/namelist_63.f90: Update test.

From-SVN: r243308

	* config/arm/arm-cores.def (cortex-m23, cortex-m33): Move into
	alphabetical order with respect to other ARMv8 processors.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm-tune.md: Likewise.

From-SVN: r243306

	* python/libstdcxx/v6/printers.py (StdVariantPrinter): Update for new
	data member name.
	* testsuite/libstdc++-prettyprinters/cxx17.cc: Remove redundant test.

From-SVN: r243304

	* include/bits/shared_ptr_base.h
	(__shared_ptr_access<T, L, false, true>::operator->()): Fix assertion.

From-SVN: r243303

gcc/
	* config/mips/mips.c (mips_expand_builtin_insn): Check input
	ranges of literal integer arguments.

gcc/testsuite/

	* gcc.target/mips/msa-builtins-err.c: New test.

From-SVN: r243301

gcc/fortran/ChangeLog:

2016-12-06  Andre Vehreschild  <vehre@gcc.gnu.org>

	PR fortran/78226
	* class.c (finalize_component): Add missing locus information.
	(finalization_scalarizer): Likewise.
	(finalization_get_offset): Likewise.
	(finalizer_insert_packed_call): Likewise.
	(generate_finalization_wrapper): Likewise.

From-SVN: r243300

From-SVN: r243299

Constrain optional's __constexpr_addressof in its return type and use a constexpr addressof for optional, if available.

Constrain optional's __constexpr_addressof in its return type
and use a constexpr addressof for optional, if available.
* include/experimental/optional (__constexpr_addressof):
Constrain in the return type instead of in a template parameter.
(_Has_addressof_mem)
(_Has_addressof_free, _Has_addressof, __constexpr_addressof):
Guard with #ifndef __cpp_lib_addressof_constexpr.
(operator->()): Use std::__addressof if it's constexpr.

From-SVN: r243298

	* include/std/variant (visit): Make visit constexpr. Also cleanup
	__get_alternative and __storage, since we don't support reference/void
	alternatives any more.
	* testsuite/20_util/variant/compile.cc: Add tests.

From-SVN: r243295

	* include/bits/enable_special_members.h: Make
	_Enable_default_constructor constexpr.
	* include/std/variant (variant::emplace, variant::swap, std::swap,
	std::hash): Sfinae on emplace and std::swap; handle __poison_hash bases
	of duplicated types.
	* testsuite/20_util/variant/compile.cc: Add tests.
	* testsuite/20_util/variant/hash.cc: Add tests.

From-SVN: r243294

	* include/std/variant (std::get, operator==): Implement constexpr
	comparison and get<>.
	* testsuite/20_util/variant/compile.cc: Tests.

From-SVN: r243293