[gcc]
2016-12-06 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78658
* config/rs6000/rs6000.md (zero_extendqi<mode>2): Use ^ instead of
?* constraints for the ISA 3.0 patterns, so the register allocator
is more likely to allocate QImode/HImode to vector registers for
conversion to floating point unless a reload is needed.
(zero_extendhi<mode>2): Likewise.
(float<QHI:mode><FP_ISA3:mode>2_internal): Properly deal with the
first alternative which is converting QImode/HImode to floating
point and the QImode/HImode value is in a vector register, and
does not allocate the second pseudo register. Remove zero
extending into traditional floating point registers, since the
instruction used only works on traditional altivec registers.
(floatuns<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
[gcc/testsuite]
2016-12-06 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78658
* gcc.target/powerpc/pr78658.c: New test.
From-SVN: r243320
