This last patch adds the the __ssat16 and __usat16 intrinsics that perform
"clipping" to a particular bitwidth on packed SIMD values, setting the Q bit
as appropriate.

	* config/arm/arm.md (arm_<simd32_op>): New define_expand.
	(arm_<simd32_op><add_clobber_q_name>_insn): New define_insn.
	* config/arm/arm_acle.h (__ssat16, __usat16): Define.
	* config/arm/arm_acle_builtins.def: Define builtins for the above.
	* config/arm/iterators.md (USSAT16): New int_iterator.
	(simd32_op): Handle UNSPEC_SSAT16, UNSPEC_USAT16.
	(sup): Likewise.
	* config/arm/predicates.md (ssat16_imm): New predicate.
	(usat16_imm): Likewise.
	* config/arm/unspecs.md (UNSPEC_SSAT16, UNSPEC_USAT16): Define.

	* gcc.target/arm/acle/simd32.c: Update test.

From-SVN: r277919

This patch implements some more Q-setting intrinsics of the
multiply-accumulate
variety, but these are in the SIMD32 family in that they treat their
operands as packed SIMD values, but that's not important at the RTL level.


	* config/arm/arm.md (arm_<simd32_op><add_clobber_q_name>_insn):
	New define_insns.
	(arm_<simd32_op>): New define_expands.
	* config/arm/arm_acle.h (__smlad, __smladx, __smlsd, __smlsdx,
	__smuad, __smuadx): Define.
	* config/arm/arm_acle_builtins.def: Define builtins for the above.
	* config/arm/iterators.md (SIMD32_TERNOP_Q): New int_iterator.
	(SIMD32_BINOP_Q): Likewise.
	(simd32_op): Handle the above.
	* config/arm/unspecs.md: Define unspecs for the above.

	* gcc.target/arm/acle/simd32.c: Update test.

From-SVN: r277918

This patch adds in plumbing for the ACLE intrinsics that set the GE bits in
APSR.  These are special SIMD instructions in Armv6 that pack bytes or
halfwords into the 32-bit general-purpose registers and set the GE bits in
APSR to indicate if some of the "lanes" of the result have overflowed or
have some other instruction-specific property.
These bits can then be used by the SEL instruction (accessed through the
__sel intrinsic) to select lanes for further processing.

This situation is similar to the Q-setting intrinsics: we have to track
the GE fake register, detect when a function reads it through __sel and restrict
existing patterns that may generate GE-clobbering instruction from
straight-line C code when reading the GE bits matters.

	* config/arm/aout.h (REGISTER_NAMES): Add apsrge.
	* config/arm/arm.md (APSRGE_REGNUM): Define.
	(arm_<simd32_op>): New define_insn.
	(arm_sel): Likewise.
	* config/arm/arm.h (FIXED_REGISTERS): Add entry for apsrge.
	(CALL_USED_REGISTERS): Likewise.
	(REG_ALLOC_ORDER): Likewise.
	(FIRST_PSEUDO_REGISTER): Update value.
	(ARM_GE_BITS_READ): Define.
	* config/arm/arm.c (arm_conditional_register_usage): Clear
	APSRGE_REGNUM from operand_reg_set.
	(arm_ge_bits_access): Define.
	* config/arm/arm-builtins.c (arm_check_builtin_call): Handle
	ARM_BUIILTIN_sel.
	* config/arm/arm-protos.h (arm_ge_bits_access): Declare prototype.
	* config/arm/arm-fixed.md (add<mode>3): Convert to define_expand.
	FAIL if ARM_GE_BITS_READ.
	(*arm_add<mode>3): New define_insn.
	(sub<mode>3): Convert to define_expand.  FAIL if ARM_GE_BITS_READ.
	(*arm_sub<mode>3): New define_insn.
	* config/arm/arm_acle.h (__sel, __sadd8, __ssub8, __uadd8, __usub8,
	__sadd16, __sasx, __ssax, __ssub16, __uadd16, __uasx, __usax,
	__usub16): Define.
	* config/arm/arm_acle_builtins.def: Define builtins for the above.
	* config/arm/iterators.md (SIMD32_GE): New int_iterator.
	(simd32_op): Handle the above.
	* config/arm/unspecs.md (UNSPEC_GE_SET): Define.
	(UNSPEC_SEL, UNSPEC_SADD8, UNSPEC_SSUB8, UNSPEC_UADD8, UNSPEC_USUB8,
	UNSPEC_SADD16, UNSPEC_SASX, UNSPEC_SSAX, UNSPEC_SSUB16, UNSPEC_UADD16,
	UNSPEC_UASX, UNSPEC_USAX, UNSPEC_USUB16): Define.

	* gcc.target/arm/acle/simd32.c: Update test.
	* gcc.target/arm/acle/simd32_sel.c: New test.

From-SVN: r277917

This patch implements some more Q-setting intrinsics form the SMLA* group.
These can set the saturation bit on overflow in the accumulation step.
Like earlier, these have non-Q-setting RTL forms as well for when the
Q-bit read
is not needed.

	* config/arm/arm.md (arm_smlabb_setq): New define_insn.
	(arm_smlabb): New define_expand.
	(*maddhisi4tb): Rename to...
	(maddhisi4tb): ... This.
	(*maddhisi4tt): Rename to...
	(maddhisi4tt): ... This.
	(arm_smlatb_setq): New define_insn.
	(arm_smlatb): New define_expand.
	(arm_smlatt_setq): New define_insn.
	(arm_smlatt): New define_expand.
	(arm_<smlaw_op><add_clobber_name>_insn): New define_insn.
	(arm_<smlaw_op>): New define_expand.
	* config/arm/arm_acle.h (__smlabb, __smlatb, __smlabt, __smlatt,
	__smlawb, __smlawt): Define.
	* config/arm_acle_builtins.def: Define builtins for the above.
	* config/arm/iterators.md (SMLAWBT): New int_iterator.
	(slaw_op): New int_attribute.
	* config/arm/unspecs.md (UNSPEC_SMLAWB, UNSPEC_SMLAWT): Define.

	* gcc.target/arm/acle/dsp_arith.c: Update test.

From-SVN: r277916

This patch implements some more Q-bit-setting intrinsics from ACLE.
With the plumbing from patch 1 in place they are a simple builtin->RTL
affair.

	* config/arm/arm.md (arm_<ss_op>): New define_expand.
	(arm_<ss_op><add_clobber_q_name>_insn): New define_insn.
	* config/arm/arm_acle.h (__qadd, __qsub, __qdbl): Define.
	* config/arm/arm_acle_builtins.def: Add builtins for qadd, qsub.
	* config/arm/iterators.md (SSPLUSMINUS): New code iterator.
	(ss_op): New code_attr.

	* gcc.target/arm/acle/dsp_arith.c: New test.

From-SVN: r277915

This patch adds the plumbing for and an implementation of the saturation
intrinsics from ACLE, in particular the __ssat, __usat intrinsics.
These intrinsics set the Q sticky bit in APSR if an overflow occurred.
ACLE allows the user to read that bit (within the same function, it's not
defined across function boundaries) using the __saturation_occurred
intrinsic
and reset it using __set_saturation_occurred.
Thus, if the user cares about the Q bit they would be using a flow such as:

__set_saturation_occurred (0); // reset the Q bit
...
__ssat (...) // Do some calculations involving __ssat
...
if (__saturation_occurred ()) // if Q bit set handle overflow
   ...

For the implementation this has a few implications:
* We must track the Q-setting side-effects of these instructions to make
sure
saturation reading/writing intrinsics are ordered properly.
This is done by introducing a new "apsrq" register (and associated
APSRQ_REGNUM) in a similar way to the "fake"" cc register.

* The RTL patterns coming out of these intrinsics can have two forms:
one where they set the APSRQ_REGNUM and one where they don't.
Which one is used depends on whether the function cares about reading the Q
flag. This is detected using the TARGET_CHECK_BUILTIN_CALL hook on the
__saturation_occurred, __set_saturation_occurred occurrences.
If no Q-flag read is present in the function we'll use the simpler
non-Q-setting form to allow for more aggressive scheduling and such.
If a Q-bit read is present then the Q-setting form is emitted.
To avoid adding two patterns for each intrinsic to the MD file we make
use of define_subst to auto-generate the Q-setting forms

* Some existing patterns already produce instructions that may clobber the
Q bit, but they don't model it (as we didn't care about that bit up till
now).
Since these patterns can be generated from straight-line C code they can
affect
the Q-bit reads from intrinsics. Therefore they have to be disabled when
a Q-bit read is present.  These are mostly patterns in arm-fixed.md that are
not very common anyway, but there are also a couple of widening
multiply-accumulate patterns in arm.md that can set the Q-bit during
accumulation.

There are more Q-setting intrinsics in ACLE, but these will be
implemented in
a more mechanical fashion once the infrastructure in this patch goes in.

	* config/arm/aout.h (REGISTER_NAMES): Add apsrq.
	* config/arm/arm.md (APSRQ_REGNUM): Define.
	(add_setq): New define_subst.
	(add_clobber_q_name): New define_subst_attr.
	(add_clobber_q_pred): Likewise.
	(maddhisi4): Change to define_expand.  Split into mult and add if
	ARM_Q_BIT_READ.
	(arm_maddhisi4): New define_insn.
	(*maddhisi4tb): Disable for ARM_Q_BIT_READ.
	(*maddhisi4tt): Likewise.
	(arm_ssat): New define_expand.
	(arm_usat): Likewise.
	(arm_get_apsr): New define_insn.
	(arm_set_apsr): Likewise.
	(arm_saturation_occurred): New define_expand.
	(arm_set_saturation): Likewise.
	(*satsi_<SAT:code>): Rename to...
	(satsi_<SAT:code><add_clobber_q_name>): ... This.
	(*satsi_<SAT:code>_shift): Disable for ARM_Q_BIT_READ.
	* config/arm/arm.h (FIXED_REGISTERS): Mark apsrq as fixed.
	(CALL_USED_REGISTERS): Mark apsrq.
	(FIRST_PSEUDO_REGISTER): Update value.
	(REG_ALLOC_ORDER): Add APSRQ_REGNUM.
	(machine_function): Add q_bit_access.
	(ARM_Q_BIT_READ): Define.
	* config/arm/arm.c (TARGET_CHECK_BUILTIN_CALL): Define.
	(arm_conditional_register_usage): Clear APSRQ_REGNUM from
	operand_reg_set.
	(arm_q_bit_access): Define.
	* config/arm/arm-builtins.c: Include stringpool.h.
	(arm_sat_binop_imm_qualifiers,
	arm_unsigned_sat_binop_unsigned_imm_qualifiers,
	arm_sat_occurred_qualifiers, arm_set_sat_qualifiers): Define.
	(SAT_BINOP_UNSIGNED_IMM_QUALIFIERS,
	UNSIGNED_SAT_BINOP_UNSIGNED_IMM_QUALIFIERS, SAT_OCCURRED_QUALIFIERS,
	SET_SAT_QUALIFIERS): Likewise.
	(arm_builtins): Define ARM_BUILTIN_SAT_IMM_CHECK.
	(arm_init_acle_builtins): Initialize __builtin_sat_imm_check.
	Handle 0 argument expander.
	(arm_expand_acle_builtin): Handle ARM_BUILTIN_SAT_IMM_CHECK.
	(arm_check_builtin_call): Define.
	* config/arm/arm.md (ssmulsa3, usmulusa3, usmuluha3,
	arm_ssatsihi_shift, arm_usatsihi): Disable when ARM_Q_BIT_READ.
	* config/arm/arm-protos.h (arm_check_builtin_call): Declare prototype.
	(arm_q_bit_access): Likewise.
	* config/arm/arm_acle.h (__ssat, __usat, __ignore_saturation,
	__saturation_occurred, __set_saturation_occurred): Define.
	* config/arm/arm_acle_builtins.def: Define builtins for ssat, usat,
	saturation_occurred, set_saturation_occurred.
	* config/arm/unspecs.md (UNSPEC_Q_SET): Define.
	(UNSPEC_APSR_READ): Likewise.
	(VUNSPEC_APSR_WRITE): Likewise.
	* config/arm/arm-fixed.md (ssadd<mode>3): Convert to define_expand.
	(*arm_ssadd<mode>3): New define_insn.
	(sssub<mode>3): Convert to define_expand.
	(*arm_sssub<mode>3): New define_insn.
	(ssmulsa3): Convert to define_expand.
	(*arm_ssmulsa3): New define_insn.
	(usmulusa3): Convert to define_expand.
	(*arm_usmulusa3): New define_insn.
	(ssmulha3): FAIL if ARM_Q_BIT_READ.
	(arm_ssatsihi_shift, arm_usatsihi): Disable for ARM_Q_BIT_READ.
	* config/arm/iterators.md (qaddsub_clob_q): New mode attribute.

	* gcc.target/arm/acle/saturation.c: New test.
	* gcc.target/arm/acle/sat_no_smlatb.c: Likewise.
	* lib/target-supports.exp (check_effective_target_arm_qbit_ok_nocache):
	Define..
	(check_effective_target_arm_qbit_ok): Likewise.
	(add_options_for_arm_qbit): Likewise.

From-SVN: r277914

2019-11-07  Martin Liska  <mliska@suse.cz>

	PR c++/92354
	* cgraph.c (delete_function_version): Clear global
	variable version_info_node if equal to deleted
	function.
2019-11-07  Martin Liska  <mliska@suse.cz>

	PR c++/92354
	* g++.target/i386/pr92354.C: New test.

From-SVN: r277913

2019-11-07  Martin Liska  <mliska@suse.cz>

	* fold-const.c (operand_compare::operand_equal_p): Add comparison
	of CONSTRUCTOR_NO_CLEARING.
	(operand_compare::hash_operand): Likewise.

From-SVN: r277912

From-SVN: r277911

2019-11-07  Martin Liska  <mliska@suse.cz>

	* all source files: Reapply all revisions mentioned in LOCAL_PATCHES.

From-SVN: r277910

2019-11-07  Martin Liska  <mliska@suse.cz>

	* merge.sh: Update to use llvm-project git repository.
	* all source files: Merge from upstream
	82588e05cc32bb30807e480abd4e689b0dee132a.

From-SVN: r277909

gcc/
	Support 64-bit double and 64-bit long double configurations.

	PR target/92055
	* config.gcc (tm_defines) [avr]: Set from --with-double=,
	--with-long-double=.
	* config/avr/t-multilib: Remove.
	* config/avr/t-avr: Output of genmultilib.awk is now fully
	dynamically generated and no more part of the repo.
	(HAVE_DOUBLE_MULTILIB, HAVE_LONG_DOUBLE_MULTILIB): New variables.
	Pass them down to...
	* config/avr/genmultilib.awk: ...here and handle them.
	* gcc/config/avr/avr.opt (-mdouble=, avr_double). New option and var.
	(-mlong-double=, avr_long_double). New option and var.
	* common/config/avr/avr-common.c (opts.h, diagnostic.h): Include.
	(TARGET_OPTION_OPTIMIZATION_TABLE) <-mdouble=, -mlong-double=>:
	Set default as requested by --with-double=
	(TARGET_HANDLE_OPTION): Define to this...
	(avr_handle_option): ...new hook worker.
	* config/avr/avr.h (DOUBLE_TYPE_SIZE): Define to avr_double.
	(LONG_DOUBLE_TYPE_SIZE): Define to avr_long_double.
	(avr_double_lib): New proto for spec function.
	(EXTRA_SPEC_FUNCTIONS) <double-lib>: Add.
	(DRIVER_SELF_SPECS): Call %:double-lib.
	* config/avr/avr.c (avr_option_override): Assert
	sizeof(long double) >= sizeof(double) for the target.
	* config/avr/avr-c.c (avr_cpu_cpp_builtins)
	[__HAVE_DOUBLE_MULTILIB__, __HAVE_LONG_DOUBLE_MULTILIB__]
	[__HAVE_DOUBLE64__, __HAVE_DOUBLE32__, __DEFAULT_DOUBLE__=]
	[__HAVE_LONG_DOUBLE64__, __HAVE_LONG_DOUBLE32__]
	[__HAVE_LONG_DOUBLE_IS_DOUBLE__, __DEFAULT_LONG_DOUBLE__=]:
	New built-in define depending on --with-double=, --with-long-double=.
	* config/avr/driver-avr.c (avr_double_lib): New spec function.
	* doc/invoke.tex (AVR Options) <-mdouble=,-mlong-double=>: Doc.
	* doc/install.texi (Cross-Compiler-Specific Options)
	<--with-double=, --with-long-double=>: Doc.

libgcc/
	Support 64-bit double and 64-bit long double configurations.

	PR target/92055
	* config/avr/t-avr (HOST_LIBGCC2_CFLAGS): Only add -DF=SF if
	long double is a 32-bit type.
	* config/avr/t-avrlibc: Copy double64 and long-double64
	multilib(s) from the vanilla one.
	* config/avr/t-copy-libgcc: New Makefile snip.

From-SVN: r277908

2019-11-07  Richard Biener  <rguenther@suse.de>

	* dbgcnt.def (gimple_unroll): New.
	* tree-ssa-loop-ivcanon.c (try_unroll_loop_completely): Check
	gimple_unroll debug counter before applying transform.
	(try_peel_loop): Likewise.

From-SVN: r277907

2019-11-07  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

testsuite/
	* gcc.dg/tree-ssa/pr92163.c: Add dg-require-effective-target fopenacc.

From-SVN: r277906

re PR libfortran/90374 (Fortran 2018: Support d0.d, e0.d, es0.d, en0.d, g0.d and ew.d e0 edit descriptors for output)

2019-11-06  Jerry DeLisle  <jvdelisle@gcc.ngu.org>

	PR fortran/90374
	* io.c (check_format): Allow zero width for D, E, EN, and ES
	specifiers as default and when -std=F2018 is given. Retain
	existing errors when using the -fdec family of flags.

	* libgfortran/io/format.c (parse_format_list): Relax format checking for
	zero width as default and when -std=f2018.
	io/format.h (format_token): Move definition to io.h.
	io/io.h (format_token): Add definition here to allow access to
	this definition at higher levels. Rename the declaration of
	write_real_g0 to write_real_w0 and add a new format_token
	argument, allowing higher level functions to pass in the
	token for handling of g0 vs the other zero width specifiers.
	io/transfer.c (formatted_transfer_scalar_write): Add checks for
	zero width and call write_real_w0 to handle it.
	io/write.c (write_real_g0): Remove.
	(write_real_w0): Add new, same as previous write_real_g0 except
	check format token to handle the g0 case.

	* gfortran.dg/fmt_error_10.f: Modify for new constraints.
	* gfortran.dg/fmt_error_7.f: Add dg-options "-std=f95".
	* gfortran.dg/fmt_error_9.f: Modify for new constraints.
	* gfortran.dg/fmt_zero_width.f90: New test.

From-SVN: r277905

gcc/testsuite/ChangeLog:

	2019-11-07  Xiong Hu Luo  <luoxhu@linux.ibm.com>

	* gcc.target/powerpc/pr72804.c: Move inline options from
	dg-require-effective-target to dg-options.

From-SVN: r277904

This patch is another piece of preparation for C2x attributes support.

C2x attributes require unbounded lookahead in the parser, because the
token sequence '[[' that starts a C2x attribute is also valid in
Objective-C in some of the same contexts, so it is necessary to see
whether the matching ']]' are consecutive tokens or not to determine
whether those tokens start an attribute.

Unbounded lookahead means lexing an unbounded number of tokens before
they are parsed.  c_lex_one_token does various context-sensitive
processing of tokens that cannot be done at that lookahead time,
because it depends on information (such as whether particular
identifiers are typedefs) that may be different at the time it is
relevant than at the time the lookahead is needed (recall that more or
less arbitrary C code, including declarations and statements, can
appear inside expressions in GNU C).

Most of that context-sensitive processing is not a problem, simply
because it is not needed for lookahead purposes so can be deferred
until the tokens lexed during lookahead are parsed.  However, the
earliest piece of context-sensitive processing is the handling of
string literals based on flags passed to c_lex_with_flags, which
determine whether adjacent literals are concatenated and whether
translation to the execution character set occurs.

Because the choice of whether to translate to the execution character
set is context-sensitive, this means that unbounded lookahead requires
the C parser to move to the approach used by the C++ parser, where
string literals are generally not translated or concatenated from
within c_lex_with_flags, but only later in the parser once it knows
whether translation is needed.  (Translation requires the tokens in
their form before concatenation.)

Thus, this patch makes that change to the C parser.  Flags in the
parser are still used for two special cases similar to C++: the
handling of an initial #pragma pch_preprocess, and arranging for
strings inside attributes not to be translated (the latter is made
more logically correct by saving and restoring the flags, as in the
C++ parser, rather than assuming that the state outside the attribute
was always to translate string literals, which might not be the case
in corner cases involving declarations and attributes inside
attributes).

The consequent change to pragma_lex to use c_parser_string_literal
makes it disallow wide strings and disable translation in that
context, which also follows C++ and is more logically correct than the
previous state without special handling in that regard.  Translation
to the execution character set is always disabled when string
constants are handled in the GIMPLE parser.

Although the handling of strings is now a lot closer to that in C++,
there are still some differences, in particular regarding the handling
of locations.  See c-c++-common/Wformat-pr88257.c, which has different
expected multiline diagnostic output for C and C++, for example; I'm
not sure whether the C or C++ output is better there (C++ has a more
complete range than C, C mentions a macro definition location that C++
doesn't), but I tried to keep the locations the same as those
previously used by the C front end, as far as possible, to minimize
the testsuite changes needed, rather than possibly making them closer
to those used with C++.

The only changes needed for tests of user-visible diagnostics were for
the wording of one diagnostic changing to match C++ (as a consequence
of having a check for wide strings based on a flag in a general
string-handling function rather than in a function specific to asm).
However, although locations are extremely similar to what they were
before, I couldn't make them completely identical in all cases.  (My
understanding of the implementation reason for the differences is as
follows: lex_string uses src_loc from each cpp_token; the C parser is
using the virtual location from cpp_get_token_with_location as called
by c_lex_with_flags, and while passing that through
linemap_resolve_location with LRK_MACRO_DEFINITION_LOCATION, as this
patch does, produces something very close to what lex_string uses,
it's not completely identical in some cases.)

This results in changes being needed to two of the gcc.dg/plugin tests
that use a plugin to test details of how string locations are handled.
Because the tests being changed are for ICEs and the only change is to
the details of the particular non-user-visible error that code gives
in cases it can't handle (one involving __FILE__, one involving a
string literal from stringizing), I think it's OK to change that
non-user-visible error and that the new errors are no worse than the
old ones.  So these particular errors are now different for C and C++
(some other messages in those tests already had differences between C
and C++).

Bootstrapped with no regressions on x86_64-pc-linux-gnu.

gcc/c:
	* c-parser.c (c_parser): Remove lex_untranslated_string.  Add
	lex_joined_string and translate_strings_p.
	(c_lex_one_token): Pass 0 or C_LEX_STRING_NO_JOIN to
	c_lex_with_flags.
	(c_parser_string_literal): New function.
	(c_parser_static_assert_declaration_no_semi): Use
	c_parser_string_literal.  Do not set lex_untranslated_string.
	(c_parser_asm_string_literal): Use c_parser_string_literal.
	(c_parser_simple_asm_expr): Do not set lex_untranslated_string.
	(c_parser_gnu_attributes): Set and restore translate_strings_p
	instead of lex_untranslated_string.
	(c_parser_asm_statement): Do not set lex_untranslated_string.
	(c_parser_asm_operands): Likewise.
	(c_parser_has_attribute_expression): Set and restore
	translate_strings_p instead of lex_untranslated_string.
	(c_parser_postfix_expression): Use c_parser_string_literal.
	(pragma_lex): Likewise.
	(c_parser_pragma_pch_preprocess): Set lex_joined_string.
	(c_parse_file): Set translate_strings_p.
	* gimple-parser.c (c_parser_gimple_postfix_expression)
	(c_parser_gimple_or_rtl_pass_list): Use c_parser_string_literal.
	* c-parser.c (c_parser_string_literal): Declare function.

gcc/testsuite:
	* gcc.dg/asm-wide-1.c, gcc.dg/diagnostic-token-ranges.c,
	gcc.dg/plugin/diagnostic-test-string-literals-1.c,
	gcc.dg/plugin/diagnostic-test-string-literals-2.c: Update expected
	diagnostics.

From-SVN: r277903

ISO C++ paper D1907R1 proposes "structural type" as an alternative to the
current notion of "strong structural equality", which has various problems.
I'm implementing it to give people a chance to try it.

The build_base_field changes are to make it easier for structural_type_p to
see whether a base is private or protected.

	* tree.c (structural_type_p): New.
	* pt.c (invalid_nontype_parm_type_p): Use it.
	* class.c (build_base_field_1): Take binfo.  Copy TREE_PRIVATE.
	(build_base_field): Pass binfo.

From-SVN: r277902

Here unify was getting confused by the VIEW_CONVERT_EXPR we add in
finish_id_expression_1 to make class NTTP const when they're used in an
expression.

Tested x86_64-pc-linux-gnu, applying to trunk.

	* pt.c (unify): Handle VIEW_CONVERT_EXPR.

From-SVN: r277901

gcc/cp/

2019-11-06  Andrew Sutton  <asutton@lock3software.com>

	* constraint.cc (build_parameter_mapping): Use
	current_template_parms when the declaration is not available.
	(norm_info::norm_info) Make explicit.
	(normalize_constraint_expression): Factor into a separate overload
	that takes arguments, and use that in the original function.
	(tsubst_nested_requirement): Use satisfy_constraint instead of
	trying to evaluate this as a constant expression.
	(finish_nested_requirement): Keep the normalized constraint and the
	original normalization arguments with the requirement.
	(diagnose_nested_requirement): Use satisfy_constraint. Tentatively
	implement more comprehensive diagnostics, but do not enable.
	* parser.c (cp_parser_requires_expression): Relax requirement that
	requires-expressions can live only inside templates.
	* pt.c (any_template_parm_r): Look into type of PARM_DECL.

2019-11-06  Jason Merrill  <jason@redhat.com>

	* pt.c (use_pack_expansion_extra_args_p): Still do substitution if
	all packs are simple pack expansions.
	(add_extra_args): Check that the extra args aren't dependent.

gcc/testsuite/
	* lib/prune.exp: Ignore "in requirements" in diagnostics.
	* g++.dg/cpp2a/requires-18.C: New test.
	* g++.dg/cpp2a/requires-19.C: New test.

From-SVN: r277900

From-SVN: r277899

When multiple hard registers are required to hold the frame pointer,
ensure that the registers after the first are marked as non-allocatable,
live and eliminable as well.

2019-11-07  Kwok Cheung Yeung  <kcy@codesourcery.com>

	gcc/
	* ira.c (setup_alloc_regs): Setup no_unit_alloc_regs for
	frame pointer in multiple registers.
	(ira_setup_eliminable_regset): Setup eliminable_regset,
	ira_no_alloc_regs and regs_ever_live for frame pointer in
	multiple registers.

From-SVN: r277895

gcc/ChangeLog:

2019-11-06  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* config/rs6000/vsx.md (xxswapd_<mode>): Add support for V2DF and
	V2DI modes.

From-SVN: r277893

The test works by checking that a known framework path is accessible
when the '-F' option is given.  We need to find a framework path that
exists across a range of Darwin versions, and parseable by GCC.  This
adjusts the test to use a header path that exists and is parsable from
Darwin9 through Darwin19.

gcc/testsuite/ChangeLog:

2019-11-06  Iain Sandoe  <iain@sandoe.co.uk>

	* gcc.dg/framework-1.c: Adjust test header path.

From-SVN: r277892

No real use cases have ever arisen for constraints on non-templated
functions, and handling of them has never been entirely clear, so the
committee agreed to accept this national body comment proposing that we
remove them.

	* decl.c (grokfndecl): Reject constraints on non-templated function.

From-SVN: r277891

	* ggc-common.c (ggc_prune_overhead_list): Do not delete surviving
	allocations.
	* mem-stats.h (mem_alloc_description<T>::release_object_overhead):
	Do not silently ignore summary corruptions.

From-SVN: r277890

	* include/Makefile.in: Regenerate.
	* libsupc++/Makefile.in: Regenerate.
	* libsupc++/compare (__3way_builtin_ptr_cmp): Define helper.
	(compare_three_way): Add missing implementation.

From-SVN: r277889

Now that operator<=> is supported, these operators can be generated by
the compiler.

	* include/bits/iterator_concepts.h (unreachable_sentinel_t): Remove
	redundant equality operators.
	* testsuite/util/testsuite_iterators.h (test_range::sentinel):
	Likewise.

From-SVN: r277888

This change lets grok_op_properties print its useful "ISO C++ prohibits
overloading operator ?:" message instead of the cryptic error message about
a missing type-specifier before '?' token.

2019-11-06  Matthias Kretz  <m.kretz@gsi.de>

	* parser.c (cp_parser_operator): Parse operator?: as an
	attempt to overload the conditional operator.

From-SVN: r277887

With a later patch I saw a case in which we peeled a single iteration
for gaps but didn't need to peel further iterations to make up a full
vector.  We then tried to vectorise the single-iteration epilogue.

2019-11-06  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vect-loop.c (vect_analyze_loop): Only try to vectorize
	the epilogue if there are peeled iterations for it to handle.

From-SVN: r277886

Do not split long immediate constants for predicated instructions.

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (arc_split_ior): Add asserts.
	(arc_split_mov_const): Likewise.
	(arc_check_ior_const): Do not match known short immediate values.
	* config/arc/arc.md (movsi): Don't split predicated instructions.
	(iorsi): Likewise.

testsuite/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>
	Sahahb Vahedi  <shahab@synopsys.com>
	Cupertino Miranda  <cmiranda@synopsys.com>

	* gcc.target/arc/or-cnst-size2.c: New test.

Co-Authored-By: Sahahb Vahedi <shahab@synopsys.com>

From-SVN: r277885

Update -mea option documentation.

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.opt (mea): Update help string.
	* doc/invoke.texi(ARC): Update mea option info.

From-SVN: r277884

Clean up sign/zero extend patterns.

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (zero_extendqihi2_i): Cleanup pattern.
	(zero_extendqisi2_ac): Likewise.
	(zero_extendhisi2_i): Likewise.
	(extendqihi2_i): Likewise.
	(extendqisi2_ac): Likewise.
	(extendhisi2_i): Likewise.

From-SVN: r277883

2019-11-06  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.c (vectorizable_reduction): Remember reduction
	PHI.  Use STMT_VINFO_REDUC_IDX to skip the reduction operand.
	Simplify single_defuse_cycle condition.

From-SVN: r277882

With later patches, we're able to vectorise the epilogues of these tests
on AArch64 and so get two instances of "vectorizing stmts using SLP".
Although it would be possible with a bit of effort to predict when
this happens, it doesn't seem important whether we get 1 vs. 2
occurrences.  All that matters is zero vs. nonzero.

2019-11-06  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
	* gcc.dg/vect/slp-9.c: Use scan-tree-dump rather than
	scan-tree-dump-times.
	* gcc.dg/vect/slp-widen-mult-s16.c: Likewise.
	* gcc.dg/vect/slp-widen-mult-u8.c: Likewise.

From-SVN: r277881

The number of iterations of an epilogue loop is always smaller than the
VF of the main loop.  vect_analyze_loop_costing was taking this into
account when deciding whether the loop is cheap enough to vectorise,
but that has no effect with the unlimited cost model.  We need to use
a separate check for correctness as well.

This can happen if the sizes returned by autovectorize_vector_sizes
happen to be out of order, e.g. because the target prefers smaller
vectors.  It can also happen with later patches if two vectorisation
attempts happen to end up with the same VF.

2019-11-06  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vect-loop.c (vect_analyze_loop_2): When vectorizing an
	epilogue loop, make sure that the VF is small enough or that
	the epilogue loop can be fully-masked.

From-SVN: r277880

Once vect_analyze_loop has found a valid loop_vec_info X, we carry
on searching for alternatives if (1) X doesn't satisfy simdlen or
(2) we want to vectorize the epilogue of X.  I have a patch that
optionally adds a third reason: we want to see if there are cheaper
alternatives to X.

This patch restructures vect_analyze_loop so that it's easier
to add more reasons for continuing.  There's supposed to be no
behavioural change.

If we wanted to, we could allow vectorisation of epilogues once
loop->simdlen has been reached by changing "loop->simdlen" to
"simdlen" in the new vect_epilogues condition.  That should be
a separate change though.

2019-11-06  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vect-loop.c (vect_analyze_loop): Break out of the main
	loop when we've finished, rather than returning directly from
	the loop.  Use a local variable to track whether we're still
	searching for the preferred simdlen.  Make vect_epilogues
	record whether the next iteration should try to treat the
	loop as an epilogue.

From-SVN: r277879

Currently for hard float we need to check for
 __ARC_FPU_SP__ || __ARC_FPU_DP__ and for soft float inverse of that.
So define single convenience macros for either cases.

gcc/
xxxx-xx-xx  Vineet Gupta  <vgupta@synopsyscom>

	* config/arc/arc-c.c (arc_cpu_cpp_builtins): Add
          __arc_hard_float__, __ARC_HARD_FLOAT__,
          __arc_soft_float__, __ARC_SOFT_FLOAT__

From-SVN: r277878

gcc/ChangeLog:
2019-11-06  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR tree-optimization/92317
	* tree-vect-loop-manip.c (slpeel_update_phi_nodes_for_guard2): Also
	update phi's with constant phi arguments.

gcc/testsuite/ChangeLog:
2019-11-06  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR tree-optimization/92317
	* gcc/testsuite/g++.dg/opt/pr92317.C: New test.

From-SVN: r277877

This was first submitted many years ago
https://gcc.gnu.org/ml/gcc-patches/2010-10/msg02468.html

The command line option -fcallgraph-info is added and makes the
compiler generate another output file (xxx.ci) for each compilation
unit (or LTO partitoin), which is a valid VCG file (you can launch
your favorite VCG viewer on it unmodified) and contains the "final"
callgraph of the unit.  "final" is a bit of a misnomer as this is
actually the callgraph at RTL expansion time, but since most
high-level optimizations are done at the Tree level and RTL doesn't
usually fiddle with calls, it's final in almost all cases.  Moreover,
the nodes can be decorated with additional info: -fcallgraph-info=su
adds stack usage info and -fcallgraph-info=da dynamic allocation info.


for  gcc/ChangeLog
From  Eric Botcazou  <ebotcazou@adacore.com>, Alexandre Oliva  <oliva@adacore.com>

	* common.opt (-fcallgraph-info[=]): New option.
	* doc/invoke.texi (Developer options): Document it.
	* opts.c (common_handle_option): Handle it.
	* builtins.c (expand_builtin_alloca): Record allocation if
	-fcallgraph-info=da.
	* calls.c (expand_call): If -fcallgraph-info, record the call.
	(emit_library_call_value_1): Likewise.
	* flag-types.h (enum callgraph_info_type): New type.
	* explow.c: Include stringpool.h.
	(set_stack_check_libfunc): Set SET_SYMBOL_REF_DECL on the symbol.
	* function.c (allocate_stack_usage_info): New.
	(allocate_struct_function): Call it for -fcallgraph-info.
	(prepare_function_start): Call it otherwise.
	(record_final_call, record_dynamic_alloc): New.
	* function.h (struct callinfo_callee): New.
	(CALLEE_FROM_CGRAPH_P): New.
	(struct callinfo_dalloc): New.
	(struct stack_usage): Add callees and dallocs.
	(record_final_call, record_dynamic_alloc): Declare.
	* gimplify.c (gimplify_decl_expr): Record dynamically-allocated
	object if -fcallgraph-info=da.
	* optabs-libfuncs.c (build_libfunc_function): Keep SYMBOL_REF_DECL.
	* print-tree.h (print_decl_identifier): Declare.
	(PRINT_DECL_ORIGIN, PRINT_DECL_NAME, PRINT_DECL_UNIQUE_NAME): New.
	* print-tree.c: Include print-tree.h.
	(print_decl_identifier): New function.
	* toplev.c: Include print-tree.h.
	(callgraph_info_file): New global variable.
	(callgraph_info_external_printed): Likewise.
	(output_stack_usage): Rename to...
	(output_stack_usage_1): ... this.  Make it static, add cf
	parameter.  If -fcallgraph-info=su, print stack usage to cf.
	If -fstack-usage, use print_decl_identifier for
	pretty-printing.
	(INDIRECT_CALL_NAME): New.
	(dump_final_node_vcg_start): New.
	(dump_final_callee_vcg, dump_final_node_vcg): New.
	(output_stack_usage): New.
	(lang_dependent_init): Open and start file if
	-fcallgraph-info.  Allocated callgraph_info_external_printed.
	(finalize): If callgraph_info_file is not null, finish it,
	close it, and release callgraph_info_external_printed.

for  gcc/ada/ChangeLog

	* gcc-interface/misc.c (callgraph_info_file): Delete.

Co-Authored-By: Alexandre Oliva <oliva@adacore.com>

From-SVN: r277876