[PR90859] Document status quo for "[OMP] Mappings for VLA different depending on 'target { c && { ! lp64 } }'"

	gcc/testsuite/
	PR middle-end/90859
	* c-c++-common/goacc/firstprivate-mappings-1.c: Update.

From-SVN: r272452

	gcc/testsuite/
	* c-c++-common/goacc/firstprivate-mappings-1.c: New file.
	* g++.dg/goacc/firstprivate-mappings-1.C: Likewise.
	libgomp/
	* testsuite/libgomp.oacc-c++/firstprivate-mappings-1.C: New file.
	* testsuite/libgomp.oacc-c-c++-common/firstprivate-mappings-1.c:
	Likewise.

From-SVN: r272451

..., which got garbled in r230275.

	include/
	* gomp-constants.h (enum gomp_map_kind): Fix description of
	'GOMP_MAP_FIRSTPRIVATE'.

From-SVN: r272450

	libgomp/
	* testsuite/libgomp.fortran/allocatable3.f90: Add missing results
	check.

From-SVN: r272449

	libgomp/
	* testsuite/libgomp.oacc-fortran/allocatable-array-1.f90: New
	file.

From-SVN: r272448

Test what OpenMP 5.0 has to say on this topic.  And, do the same for OpenACC.

	libgomp/
	PR fortran/90743
	* oacc-parallel.c (GOACC_parallel_keyed): Handle NULL mapping
	case.
	* testsuite/libgomp.fortran/target-allocatable-1-1.f90: New file.
	* testsuite/libgomp.fortran/target-allocatable-1-2.f90: Likewise.
	* testsuite/libgomp.oacc-fortran/allocatable-1-1.f90: Likewise.
	* testsuite/libgomp.oacc-fortran/allocatable-1-2.f90: Likewise.

From-SVN: r272447

	gcc/testsuite/
	PR testsuite/90861
	* c-c++-common/goacc/declare-pr90861.c: New file.
	libgomp/
	PR testsuite/90861
	* testsuite/libgomp.oacc-c-c++-common/declare-vla.c: Update.

From-SVN: r272446

	gcc/testsuite/
	PR testsuite/90868
	* c-c++-common/goacc/declare-1.c: Update.
	* c-c++-common/goacc/declare-2.c: Likewise.

From-SVN: r272445

	gcc/
	PR middle-end/90862
	* omp-low.c (check_omp_nesting_restrictions): Handle
	GF_OMP_TARGET_KIND_OACC_DECLARE.
	gcc/testsuite/
	PR middle-end/90862
	* c-c++-common/goacc/declare-1.c: Update.
	* c-c++-common/goacc/declare-2.c: Likewise.
	libgomp/
	PR middle-end/90862
	* testsuite/libgomp.oacc-c-c++-common/declare-1.c: Update.

From-SVN: r272444

re PR c++/84698 (ICE when using noexcept(noexcept()) declaration on global friend function of template class)

	PR c++/84698
	* g++.dg/cpp0x/noexcept42.C: New test.

From-SVN: r272443

	PR c++/71548
	* g++.dg/cpp0x/variadic177.C: New test.

From-SVN: r272438

	* config/i386/i386.md (@cmp<mode>_1): Rename from cmp<mode>_1.
	(@add<mode>3_carry): Rename from add<mode>3_carry.
	(@sub<mode>3_carry_ccc): Rename from sub<mode>3_carry_ccc.
	(@sub<mode>3_carry_ccgz): Rename form sub<mode>3_carry_ccgz.
	(@copysign<mode>3_const): Rename from copysign<mode>3_const.
	(@copysign<mode>3_var): Rename from copysign<mode>3_var.
	(@xorsign<mode>3_1): Rename from xorsign<mode>3_1.
	(@x86_shift<mode>_adj_1): Rename from x86_shift<mode>_adj_1.
	(@x86_shift<mode>_adj_2): Rename from x86_shift<mode>_adj_2.
	(@x86_shift<mode>_adj_3): Rename from x86_shift<mode>_adj_3.
	(cmpstrnsi): Use gen_cmp_1.
	(lwp_slwpcb): Use gen_lwp_slwpcb_1.
	(@lwp_slwpcb<mode>_1): Rename from lwp_slwpcb<mode>_1.
	(@umonitor_<mode>): Rename from umonitor_<mode>.
	* config/i386/i386-expand.c (ix86_expand_copysign):
	Use gen_copysign3_const and gen_copysign3_var.
	(ix86_expand_xorsign): Use gen_xorsign3_1.
	(ix86_expand_branch): Use gen_sub3_carry_ccc,
	gen_sub3_carry_ccgz and gen_cmp1.
	(ix86_expand_int_addcc): Use gen_sub3_carry and gen_add3_carry.
	(ix86_split_ashl): Use gen_x86_shift_adj_1 and gen_x86_shift_adj_2.
	(ix86_split_ashr): Use gen_x86_shift_adj_1 and gen_x86_shift_adj_3.
	(ix86_split_lshr): Ditto.
	(ix86_expand_builtin) <case IX86_BUILTIN_UMONITOR>: Use gen_umonitor.

From-SVN: r272432

From-SVN: r272431

	* constexpr.c (eval_and_check_array_index): Split out from...
	(cxx_eval_array_reference): ...here.
	(cxx_eval_store_expression): Use it here, too.
	(diag_array_subscript): Take location.  Strip location wrapper.

From-SVN: r272430

	* constexpr.c (cxx_eval_constant_expression): Handle conversion from
	and then to the same type.

From-SVN: r272429

	* tree.c (build_constructor): Add MEM_STAT_DECL.

gcc/cp/
	* constexpr.c (unshare_constructor): Add MEM_STAT_DECL.

From-SVN: r272428

The SVE ACLE patches need to introduce a new CC_NZC mode for the
conditions that can be tested after a PTRUE.  In particular, LT needs
to map to "mi"/"first" and GE to "pl"/"nfrst", instead of the normal
CC mapping.

Another advantage of using a separate mode is that we can print the SVE
names of the conditions, which makes the output a bit easier to read.
It therefore seems like an independent improvement that can go in now.

The patch also avoids using (compare X (const_int 0)), because that gets
folded away when used with LTU and GEU ("cc"/"last" and "cs"/"nlast").
Just using an unspec should be OK.

The full set of conditions can't be tested without other SVE ACLE patches.

2019-06-18  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-modes.def (CC_NZC): New CC_MODE.
	* config/aarch64/aarch64-sve.md (*<optab><mode>3_cc)
	(ptest_ptrue<mode>, while_ult<GPI:mode><PRED_ALL:mode>)
	(*while_ult<GPI:mode><PRED_ALL:mode>_cc, *cmp<cmp_op><mode>)
	(*cmp<cmp_op><mode>_ptest, *cmp<cmp_op><mode>_cc)
	(*pred_cmp<cmp_op><mode>_combine, *pred_cmp<cmp_op><mode>)
	(vec_cmp<mode><vpred>, vec_cmpu<mode><vpred>, cbranch<mode>4):
	Use CC_NZC instead of CC.
	* config/aarch64/aarch64.md (condjump): Print a '.' in SVE conditions.
	* config/aarch64/aarch64.c (aarch64_sve_condition_codes): New variable.
	(aarch64_print_operand): Handle E_CC_NZCmode.
	(aarch64_emit_sve_ptrue_op_cc): Use gen_set_clobber_cc_nzc instead
	of gen_set_clobber_cc.

gcc/testsuite/
	* gcc.target/aarch64/sve/struct_vect_18.c: Allow branches to
	contain dots.
	* gcc.target/aarch64/sve/struct_vect_19.c: Likewise.
	* gcc.target/aarch64/sve/struct_vect_20.c: Likewise.
	* gcc.target/aarch64/sve/struct_vect_21.c: Likewise.
	* gcc.target/aarch64/sve/struct_vect_22.c: Likewise.
	* gcc.target/aarch64/sve/struct_vect_23.c: Likewise.
	* gcc.target/aarch64/sve/unroll-1.c: Likewise.
	* gcc.target/aarch64/sve/while_1.c: Check for b.any.

From-SVN: r272427

2019-06-18  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve.md: Tabify file.

From-SVN: r272426

Following on from the previous ptrue patch.

2019-06-18  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-protos.h (aarch64_pfalse_reg): Declare.
	* config/aarch64/aarch64.c (aarch64_pfalse_reg): New function.
	* config/aarch64/aarch64-sve.md: Use it.

From-SVN: r272425

This is the first step to canonicalising predicate constants so that
they can be reused between modes.

2019-06-18  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-protos.h (aarch64_ptrue_reg): Declare.
	* config/aarch64/aarch64.c (aarch64_ptrue_reg): New functions.
	(aarch64_expand_sve_widened_duplicate, aarch64_expand_sve_mem_move)
	(aarch64_maybe_expand_sve_subreg_move, aarch64_evpc_rev_local)
	(aarch64_expand_sve_vec_cmp_int): Use it.
	(aarch64_expand_sve_vec_cmp_float): Likewise.
	* config/aarch64/aarch64-sve.md: Likewise throughout.

From-SVN: r272424

This patch makes the binary IFN_COND patterns use the same approach
as the ternary patterns, with one pattern handling the cases in
which the "else" value isn't tied to one of the other inputs.

2019-06-18  Richard Sandiford  <richard.sandiford@arm.com>
	    Kugan Vivekanandarajah  <kuganv@linaro.org>

gcc/
	* config/aarch64/aarch64-sve.md (*cond_<optab><mode>_0): Delete.
	(*cond_<optab><mode>_z): Fold into...
	(*cond_<optab><mode>_any): ...here.  Also handle cases in which
	operand 4 can be tied to operand 0 (either inherently or via RA).

From-SVN: r272423

	* gcc.target/i386/pr81563.c (dg-final): Check that no
	registers are restored from %esp.

From-SVN: r272422

2019-06-18  Richard Biener  <rguenther@suse.de>

	PR debug/90900
	* cfgexpand.c (expand_debug_expr): Treat NOTE_P DECL_RTL
	as if optimized away.

	* gcc.dg/gomp/pr90900.c: New testcase.

From-SVN: r272421

gcc/testsuite/ChangeLog:

	* gcc.dg/pr90866-2.c: Remove a pointless declaration
	to avoid compilation errors on arm-none-eabi.

From-SVN: r272418

PR ada/80590

	* sem_ch5.adb (Analyze_Loop_Statement): Avoid exception propagation
	during normal processing.

From-SVN: r272417

	* include/c_global/cstddef (std::byte): Perform arithmetic operations
	in unsigned int to avoid promotion (LWG 2950).

From-SVN: r272415

Move the ifunc symbol tests into a separate file with dg-require-ifunc.
And added a base pcs ifunc symbol to the test for completeness.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/pcs_attribute-2.c: Remove ifunc usage.
	* gcc.target/aarch64/pcs_attribute-3.c: New test.

From-SVN: r272414

Parametrize some define_insn to simplify code in define_expands generating
those insns.

Build and reg-tested on x86_64 with nvptx accelerator.

2019-06-18  Tom de Vries  <tdevries@suse.de>

	* config/nvptx/nvptx-protos.h (gen_set_softstack_insn): Remove.
	* config/nvptx/nvptx.c (gen_set_softstack_insn): Remove.
	* config/nvptx/nvptx.md (define_insn "set_softstack_<mode>"): Rename to ...
	(define_insn "@set_softstack_<mode>"): ... this.
	(define_insn "omp_simt_enter_<mode>"): Rename to ...
	(define_insn "@omp_simt_enter_<mode>"): ... this.
	(define_insn "omp_simt_exit_<mode>"): Rename to ...
	(define_insn "@omp_simt_exit_<mode>"): ... this.

From-SVN: r272413

Atm we see:
...
libgcc/config/nvptx/crt0.c:36:1: warning: no previous prototype for \
  ‘__main’ [-Wmissing-prototypes]
...

Fix this by adding the prototype.

Build and reg-tested on nvptx.
Build and reg-tested on x86_64 with nvptx accelerator.

2019-06-18  Tom de Vries  <tdevries@suse.de>

	* config/nvptx/crt0.c (__main): Declare.

From-SVN: r272412

r272233 introduced a large number of execution failures on SVE.
The patch hard-coded an IV step of VF, but for SLP groups it needs
to be VF * group size.

Also, iv_precision had type widest_int but only needs to be unsigned int.

2019-06-18  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vect-loop-manip.c (vect_set_loop_masks_directly): Remove
	vf parameter.  Restore the previous iv step of nscalars_step,
	but give it iv_type rather than compare_type.  Tweak code order
	to match the comments.
	(vect_set_loop_condition_masked): Update accordingly.
	* tree-vect-loop.c (vect_verify_full_masking): Use "unsigned int"
	for iv_precision.  Tweak comment formatting.

From-SVN: r272411

2019-06-18  Iain Sandoe  <iain@sandoe.co.uk>

        * config/darwin.c: Strip trailing whitespace.

From-SVN: r272410

    
For very old toolchains, the compiler generated extra symbols that mark the
start of each FDE.  We no longer need this (since xcode 3 era).

Since we have detection of the linker version, we can use that directly to
determine if support is needed.

2019-06-18  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin.c (darwin_emit_unwind_label): New default to false.
	(darwin_override_options): Set darwin_emit_unwind_label as needed.

From-SVN: r272409

2019-06-18  Martin Jambor  <mjambor@suse.cz>

	PR ipa/90889
	* ipa-cp.c (ignore_edge_p): Do not ignore edges when only the
	caller does not have flag_ipa_cp set.

From-SVN: r272408

This patch adds support in the vectorizer for masking fold left reductions.
This avoids the need to insert a conditional assignement with some identity
value.

From-SVN: r272407

For some Darwin versions the absence of the rethrow_primary_exception
symbol causes almost all sanitizer tests to fail.
The symbol is not present in libstdc++ and, therefore is is correct to
remove the reference to it for all platforms.  We do this by adding a
new guard "ASAN_HAS_CXA_RETHROW_PRIMARY_EXCEPTION".

libsanitizer/

2019-06-18  Iain Sandoe  <iain@sandoe.co.uk>

	PR libsanitizer/87880
	* asan/asan_interceptors.h:
	(ASAN_INTERCEPT___CXA_RETHROW_PRIMARY_EXCEPTION): New.
	* asan/Makefile.am (DEFS): Add 
	ASAN_HAS_CXA_RETHROW_PRIMARY_EXCEPTION, defined to 0.
	* asan/Makefile.in: Regenerated.
	* asan/libtool-version: Bump version.

From-SVN: r272406

    Add one target hook predict_doloop_p, it return true if we can predict it
    is possible to use a low-overhead loop, it can help ivopts to make some
    better decisions.

    PR middle-end/80791
    * target.def (predict_doloop_p): New hook.
    * targhooks.h (default_predict_doloop_p): New declaration.
    * targhooks.c (default_predict_doloop_p): New function.
    * doc/tm.texi.in (TARGET_PREDICT_DOLOOP_P): New hook.
    * doc/tm.texi: Regenerate.
    * config/rs6000/rs6000.c (rs6000_predict_doloop_p): New function.
    (TARGET_PREDICT_DOLOOP_P): New macro.
    * tree-ssa-loop-ivopts.c (generic_predict_doloop_p): New function.

From-SVN: r272405

From-SVN: r272404

	* omp-low.c (struct omp_context): Add scan_inclusive field.
	(scan_omp_1_stmt) <case GIMPLE_OMP_SCAN>: Set ctx->scan_inclusive
	if inclusive scan.
	(struct omplow_simd_context): Add lastlane member.
	(lower_rec_simd_input_clauses): Add rvar argument, handle inscan
	reductions.  Build 2 or 3 argument .GOMP_SIMD_LANE calls rather than
	1 or 2 argument.
	(lower_rec_input_clauses): Handle inscan reductions in simd contexts.
	(lower_lastprivate_clauses): Set TREE_THIS_NOTRAP on the ARRAY_REF.
	(lower_omp_scan): New function.
	(lower_omp_1) <case GIMPLE_OMP_SCAN>: Use lower_omp_scan.
	* tree-ssa-dce.c (eliminate_unnecessary_stmts): For IFN_GOMP_SIMD_LANE
	check 3rd argument if present rather than 2nd.
	* tree-vectorizer.h (struct _loop_vec_info): Add scan_map member.
	(struct _stmt_vec_info): Change simd_lane_access_p from bool into
	2-bit bitfield.
	* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
	scan_map.  For IFN_GOMP_SIMD_LANE check 3rd argument if present rather
	than 2nd.
	(_loop_vec_info::~_loop_vec_info): Delete scan_map.
	* tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Allow two
	different STMT_VINFO_SIMD_LANE_ACCESS_P refs if they have the same
	init.
	(vect_find_stmt_data_reference): Encode in ->aux the 2nd
	IFN_GOMP_SIMD_LANE argument.
	(vect_analyze_data_refs): Set STMT_VINFO_SIMD_LANE_ACCESS_P from the
	encoded ->aux value.
	* tree-vect-stmts.c: Include attribs.h.
	(vectorizable_call): Adjust comment about IFN_GOMP_SIMD_LANE.
	(scan_operand_equal_p, check_scan_store, vectorizable_scan_store): New
	functions.
	(vectorizable_load): For STMT_VINFO_SIMD_LANE_ACCESS_P tests use != 0.
	(vectorizable_store): Handle STMT_VINFO_SIMD_LANE_ACCESS_P > 1.
cp/
	* semantics.c (finish_omp_clauses): For OMP_CLAUSE_REDUCTION_INSCAN
	set need_copy_assignment.
testsuite/
	* gcc.dg/vect/vect-simd-8.c: New test.
	* gcc.dg/vect/vect-simd-9.c: New test.
	* g++.dg/vect/simd-2.cc: New test.
	* g++.dg/gomp/scan-1.C: New test.

From-SVN: r272399

	PR target/62055
	* config/i386/i386.md (*nabstf2_1): New insn pattern.
	(*nabs<mode>2_1): Ditto.
	(nabs sse-reg splitter): New splitter.
	* config/i386/sse.md (*nabs<mode>2): New insn_and_split pattern.

testsuite/ChangeLog:

	PR target/62055
	* gcc.target/i386/fnabs.c: New test.

From-SVN: r272396

	* parser.c (cp_parser_std_attribute): Detect excessive arguments.

	* g++.dg/cpp0x/gen-attrs-67.C: New test.

From-SVN: r272395