gcc/ChangeLog:
	* config/aarch64/cortex-a57-fma-steering.c
	(aarch64_register_fma_steering): Remove "static" from arguments
	to register_pass.

From-SVN: r233146

This patch fixes an exponential issue in ccmp.c.  When deciding which ccmp
expansion to use, the tree nodes gs0 and gs1 are fully expanded twice.  If
they contain more CCMP opportunities, their subtrees are also expanded twice.
When the trees are complex the expansion takes exponential time and memory.
As a workaround in GCC6 compute the cost of the first expansion early, and
only try the alternative expansion if the cost is low enough.  This rarely
affects real code, eg. SPECINT2006 has identical codesize.

2016-02-04  Wilco Dijkstra  <wdijkstr@arm.com>

    gcc/
	PR target/69619
	* ccmp.c (expand_ccmp_expr_1): Avoid evaluating gs0/gs1
	twice when complex.

    gcc/testsuite/
	PR target/69619
	* gcc.dg/pr69619.c: Add new test.

From-SVN: r233145

We don't document the -mno-xxx variants for other flags here, and the
paragraph here specifically says "Each has a corresponding -mno- option
to disable use of these instructions".  Drop the -mno-fma4 line.

From-SVN: r233144

In PR 69577 we have:

      A: (set (reg:V2TI X) ...)
      B: (set (subreg:TI (reg:V2TI X) 0) ...)

X gets allocated to an AVX register, as usual for V2TI.  The problem is
that the movti for B doesn't then preserve the other half of X, even
though the subreg semantics are supposed to guarantee that.

If instead the same value had been set by:

      A': (set (subreg:TI (reg:V2TI X) 16) ...)
      B: (set (subreg:TI (reg:V2TI X) 0) ...)

the subreg in A' would have prevented the use of AVX registers for X,
since you can't directly access the high part.

IMO these are really the same thing.  An alternative way to view it
is that the original sequence is equivalent to:

      A: (set (reg:V2TI X) ...)
      B1: (set (subreg:TI (reg:V2TI X) 0) ...)
      B2: (set (subreg:TI (reg:V2TI X) 16) (subreg:TI (reg:V2TI X) 16))

in which B2 is a no-op and therefore implicit.  The handling ought
to be the same regardless of whether there is an rtl insn that
explicitly assigns to (subreg:TI (reg:V2TI X) 16).

This patch implements that idea.  Hopefully the comments explain
what's going on.

Tested on x86_64-linux-gnu, aarch64-linux-gnu and arm-linux-gnueabihf.

gcc/
	PR rtl-optimization/69577
	* reginfo.c (record_subregs_of_mode): Add a partial_def parameter.
	(find_subregs_of_mode): Update accordingly.  Iterate over partial
	definitions.

gcc/testsuite/
	PR rtl-optimization/69577
	* gcc.target/i386/pr69577.c: New test.

From-SVN: r233143

	* config/arm/arm-protos.h (neon_reinterpret): Remove.
	* config/arm/arm.c (neon_reinterpret): Remove.
	* config/arm/arm_neon_builtins.def (vreinterpretv8qi, vreinterpretv4hi,
	vreinterpretv2si, vreinterpretv2sf, vreinterpretdi, vreinterpretv16qi,
	vreinterpretv8hi, vreinterpretv4si, vreinterpretv4sf, vreinterpretv2di,
	vreinterpretti): Remove.
	* config/arm/neon.md (neon_vreinterpretv8qi<mode>,
	neon_vreinterpretv4hi<mode>, neon_vreinterpretv2si<mode>,
	neon_vreinterpretv2sf<mode>, neon_vreinterpretdi<mode>,
	neon_vreinterpretti<mode>, neon_vreinterpretv16qi<mode>,
	neon_vreinterpretv8hi<mode>, neon_vreinterpretv4si<mode>,
	neon_vreinterpretv4sf<mode>, neon_vreinterpretv2di<mode>): Remove.
	* config/arm/arm_neon.h (vreinterpret_p8_p16, vreinterpret_p8_f32,
	vreinterpret_p8_p64, vreinterpret_p8_s64, vreinterpret_p8_u64,
	vreinterpret_p8_s8, vreinterpret_p8_s16, vreinterpret_p8_s32,
	vreinterpret_p8_u8, vreinterpret_p8_u16, vreinterpret_p8_u32,
	vreinterpret_p16_p8, vreinterpret_p16_f32, vreinterpret_p16_p64,
	vreinterpret_p16_s64, vreinterpret_p16_u64, vreinterpret_p16_s8,
	vreinterpret_p16_s16, vreinterpret_p16_s32, vreinterpret_p16_u8,
	vreinterpret_p16_u16, vreinterpret_p16_u32, vreinterpret_f32_p8,
	vreinterpret_f32_p16, vreinterpret_f32_p64, vreinterpret_f32_s64,
	vreinterpret_f32_u64, vreinterpret_f32_s8, vreinterpret_f32_s16,
	vreinterpret_f32_s32, vreinterpret_f32_u8, vreinterpret_f32_u16,
	vreinterpret_f32_u32, vreinterpret_p64_p8, vreinterpret_p64_p16,
	vreinterpret_p64_f32, vreinterpret_p64_s64, vreinterpret_p64_u64,
	vreinterpret_p64_s8, vreinterpret_p64_s16, vreinterpret_p64_s32,
	vreinterpret_p64_u8, vreinterpret_p64_u16, vreinterpret_p64_u32,
	vreinterpret_s64_p8, vreinterpret_s64_p16, vreinterpret_s64_f32,
	vreinterpret_s64_p64, vreinterpret_s64_u64, vreinterpret_s64_s8,
	vreinterpret_s64_s16, vreinterpret_s64_s32, vreinterpret_s64_u8,
	vreinterpret_s64_u16, vreinterpret_s64_u32, vreinterpret_u64_p8,
	vreinterpret_u64_p16, vreinterpret_u64_f32, vreinterpret_u64_p64,
	vreinterpret_u64_s64, vreinterpret_u64_s8, vreinterpret_u64_s16,
	vreinterpret_u64_s32, vreinterpret_u64_u8, vreinterpret_u64_u16,
	vreinterpret_u64_u32, vreinterpret_s8_p8, vreinterpret_s8_p16,
	vreinterpret_s8_f32, vreinterpret_s8_p64, vreinterpret_s8_s64,
	vreinterpret_s8_u64, vreinterpret_s8_s16, vreinterpret_s8_s32,
	vreinterpret_s8_u8, vreinterpret_s8_u16, vreinterpret_s8_u32,
	vreinterpret_s16_p8, vreinterpret_s16_p16, vreinterpret_s16_f32,
	vreinterpret_s16_p64, vreinterpret_s16_s64, vreinterpret_s16_u64,
	vreinterpret_s16_s8, vreinterpret_s16_s32, vreinterpret_s16_u8,
	vreinterpret_s16_u16, vreinterpret_s16_u32, vreinterpret_s32_p8,
	vreinterpret_s32_p16, vreinterpret_s32_f32, vreinterpret_s32_p64,
	vreinterpret_s32_s64, vreinterpret_s32_u64, vreinterpret_s32_s8,
	vreinterpret_s32_s16, vreinterpret_s32_u8, vreinterpret_s32_u16,
	vreinterpret_s32_u32, vreinterpret_u8_p8, vreinterpret_u8_p16,
	vreinterpret_u8_f32, vreinterpret_u8_p64, vreinterpret_u8_s64,
	vreinterpret_u8_u64, vreinterpret_u8_s8, vreinterpret_u8_s16,
	vreinterpret_u8_s32, vreinterpret_u8_u16, vreinterpret_u8_u32,
	vreinterpret_u16_p8, vreinterpret_u16_p16, vreinterpret_u16_f32,
	vreinterpret_u16_p64, vreinterpret_u16_s64, vreinterpret_u16_u64,
	vreinterpret_u16_s8, vreinterpret_u16_s16, vreinterpret_u16_s32,
	vreinterpret_u16_u8, vreinterpret_u16_u32, vreinterpret_u32_p8,
	vreinterpret_u32_p16, vreinterpret_u32_f32, vreinterpret_u32_p64,
	vreinterpret_u32_s64, vreinterpret_u32_u64, vreinterpret_u32_s8,
	vreinterpret_u32_s16, vreinterpret_u32_s32, vreinterpret_u32_u8,
	vreinterpret_u32_u16, vreinterpretq_p8_p16, vreinterpretq_p8_f32,
	vreinterpretq_p8_p64, vreinterpretq_p8_p128, vreinterpretq_p8_s64,
	vreinterpretq_p8_u64, vreinterpretq_p8_s8, vreinterpretq_p8_s16,
	vreinterpretq_p8_s32, vreinterpretq_p8_u8, vreinterpretq_p8_u16,
	vreinterpretq_p8_u32, vreinterpretq_p16_p8, vreinterpretq_p16_f32,
	vreinterpretq_p16_p64, vreinterpretq_p16_p128, vreinterpretq_p16_s64,
	vreinterpretq_p16_u64, vreinterpretq_p16_s8, vreinterpretq_p16_s16,
	vreinterpretq_p16_s32, vreinterpretq_p16_u8, vreinterpretq_p16_u16,
	vreinterpretq_p16_u32, vreinterpretq_f32_p8, vreinterpretq_f32_p16,
	vreinterpretq_f32_p64, vreinterpretq_f32_p128, vreinterpretq_f32_s64,
	vreinterpretq_f32_u64, vreinterpretq_f32_s8, vreinterpretq_f32_s16,
	vreinterpretq_f32_s32, vreinterpretq_f32_u8, vreinterpretq_f32_u16,
	vreinterpretq_f32_u32, vreinterpretq_p64_p8, vreinterpretq_p64_p16,
	vreinterpretq_p64_f32, vreinterpretq_p64_p128, vreinterpretq_p64_s64,
	vreinterpretq_p64_u64, vreinterpretq_p64_s8, vreinterpretq_p64_s16,
	vreinterpretq_p64_s32, vreinterpretq_p64_u8, vreinterpretq_p64_u16,
	vreinterpretq_p64_u32, vreinterpretq_p128_p8, vreinterpretq_p128_p16,
	vreinterpretq_p128_f32, vreinterpretq_p128_p64, vreinterpretq_p128_s64,
	vreinterpretq_p128_u64, vreinterpretq_p128_s8, vreinterpretq_p128_s16,
	vreinterpretq_p128_s32, vreinterpretq_p128_u8, vreinterpretq_p128_u16,
	vreinterpretq_p128_u32, vreinterpretq_s64_p8, vreinterpretq_s64_p16,
	vreinterpretq_s64_f32, vreinterpretq_s64_p64, vreinterpretq_s64_p128,
	vreinterpretq_s64_u64, vreinterpretq_s64_s8, vreinterpretq_s64_s16,
	vreinterpretq_s64_s32, vreinterpretq_s64_u8, vreinterpretq_s64_u16,
	vreinterpretq_s64_u32, vreinterpretq_u64_p8, vreinterpretq_u64_p16,
	vreinterpretq_u64_f32, vreinterpretq_u64_p64, vreinterpretq_u64_p128,
	vreinterpretq_u64_s64, vreinterpretq_u64_s8, vreinterpretq_u64_s16,
	vreinterpretq_u64_s32, vreinterpretq_u64_u8, vreinterpretq_u64_u16,
	vreinterpretq_u64_u32, vreinterpretq_s8_p8, vreinterpretq_s8_p16,
	vreinterpretq_s8_f32, vreinterpretq_s8_p64, vreinterpretq_s8_p128,
	vreinterpretq_s8_s64, vreinterpretq_s8_u64, vreinterpretq_s8_s16,
	vreinterpretq_s8_s32, vreinterpretq_s8_u8, vreinterpretq_s8_u16,
	vreinterpretq_s8_u32, vreinterpretq_s16_p8, vreinterpretq_s16_p16,
	vreinterpretq_s16_f32, vreinterpretq_s16_p64, vreinterpretq_s16_p128,
	vreinterpretq_s16_s64, vreinterpretq_s16_u64, vreinterpretq_s16_s8,
	vreinterpretq_s16_s32, vreinterpretq_s16_u8, vreinterpretq_s16_u16,
	vreinterpretq_s16_u32, vreinterpretq_s32_p8, vreinterpretq_s32_p16,
	vreinterpretq_s32_f16, vreinterpretq_s32_f32, vreinterpretq_s32_p64,
	vreinterpretq_s32_p128, vreinterpretq_s32_s64, vreinterpretq_s32_u64,
	vreinterpretq_s32_s8, vreinterpretq_s32_s16, vreinterpretq_s32_u8,
	vreinterpretq_s32_u16, vreinterpretq_s32_u32, vreinterpretq_u8_p8,
	vreinterpretq_u8_p16, vreinterpretq_u8_f32, vreinterpretq_u8_p64,
	vreinterpretq_u8_p128, vreinterpretq_u8_s64, vreinterpretq_u8_u64,
	vreinterpretq_u8_s8, vreinterpretq_u8_s16, vreinterpretq_u8_s32,
	vreinterpretq_u8_u16, vreinterpretq_u8_u32, vreinterpretq_u16_p8,
	vreinterpretq_u16_p16, vreinterpretq_u16_f32, vreinterpretq_u16_p64,
	vreinterpretq_u16_p128, vreinterpretq_u16_s64, vreinterpretq_u16_u64,
	vreinterpretq_u16_s8, vreinterpretq_u16_s16, vreinterpretq_u16_s32,
	vreinterpretq_u16_u8, vreinterpretq_u16_u32, vreinterpretq_u32_p8,
	vreinterpretq_u32_p16, vreinterpretq_u32_f32, vreinterpretq_u32_p64,
	vreinterpretq_u32_p128, vreinterpretq_u32_s64, vreinterpretq_u32_u64,
	vreinterpretq_u32_s8, vreinterpretq_u32_s16, vreinterpretq_u32_s32,
	vreinterpretq_u32_u8, vreinterpretq_u32_u16): Rewrite using casts.

From-SVN: r233142

	* be.po, da.po, de.po, el.po, es.po, fi.po, fr.po, hr.po, id.po,
	ja.po, nl.po, ru.po, sr.po, sv.po, tr.po, uk.po, vi.po, zh_CN.po,
	zh_TW.po: Update.

From-SVN: r233141

	* be.po, ca.po, da.po, de.po, el.po, eo.po, es.po, fi.po, fr.po,
	id.po, ja.po, nl.po, pr_BR.po, ru.po, sr.po, sv.po, tr.po, uk.po,
	vi.po, zh_CN.po, zh_TW.po: Update.

From-SVN: r233140

Fix PR sanitizer/69276

	* g++.dg/asan/pr69276.C: New test.
	PR sanitizer/PR69276
	* asan.c (has_stmt_been_instrumented_p): Instrument gimple calls
	that are gimple_store_p.
	(maybe_instrument_call): Likewise.

From-SVN: r233137

aarch64.c (aarch64_legitimize_address): Force register scaling out of memory reference and comment why.


	* config/aarch64/aarch64.c (aarch64_legitimize_address): Force
	register scaling out of memory reference and comment why.

From-SVN: r233136

	* class.c (find_flexarrays): Don't declare dom variable.
	(diagnose_flexarray): Likewise.

From-SVN: r233135

	PR target/65932
	PR target/67714
	* gcc.target/arm/wmul-3.c: Simplify test to generate just
	a single smulbb instruction.
	* gcc.target/amr/wmul-1.c: Add -mtune=cortex-a9 to dg-options.
	* gcc.target/amr/wmul-2.c: Likewise.

From-SVN: r233134

	PR target/65932
	PR target/67714
	* cse.c (cse_insn): Pass NULL to fold_rtx when initially
	folding the source of a SET.

From-SVN: r233133

	PR target/65932
	PR target/67714
	* config/arm/arm.c (arm_new_rtx_costs, MULT case): Properly extract
	the operands of the SIGN_EXTENDs from a SMUL[TB][TB] rtx.

From-SVN: r233132

	PR target/65932
	PR target/67714
	* gcc.c-torture/execute/pr67714.c: New test.

From-SVN: r233131

2016-02-04  Jim Wilson  <jim.wilson@linaro.org>

	PR target/65932
	PR target/67714
	* config/arm/arm.h (PROMOTE_MODE): Don't set UNSIGNEDP for QImode and
	HImode.

From-SVN: r233130

2016-02-04  Christian Bruel  <christian.bruel@st.com>

	* config/arm/arm-c.c (arm_reset_previous_fndecl): Style fix and typo.
	* config/arm/arm.c (arm_set_current_function): Likewise.

From-SVN: r233129

	PR target/69454
	* config/i386/i386.c (convert_scalars_to_vector): Remove
	stack alignment fixes.
	(ix86_option_override_internal): Disable TARGET_STV if stack
	might not be aligned enough.
	(ix86_minimum_alignment): Assert that TARGET_STV is false.

	* gcc.target/i386/pr69454-1.c: New test.
	* gcc.target/i386/pr69454-2.c: New test.

From-SVN: r233128

2016-02-04  Victoria Stepanyan  <victoria.stepanyan@amd.com>

        * gcc/config/i386/x86-tune.def: Disable default prefetching
        for -march=znver1.

From-SVN: r233127

PR c++/69251 - [6 Regression] ICE in unify_array_domain on a flexible array
               member
PR c++/69253 - [6 Regression] ICE in cxx_incomplete_type_diagnostic initializing
               a flexible array member with empty string
PR c++/69290 - [6 Regression] ICE on invalid initialization of a flexible array
               member
PR c++/69277 - [6 Regression] ICE mangling a flexible array member
PR c++/69349 - template substitution error for flexible array members

gcc/testsuite/ChangeLog:
2016-02-03  Martin Sebor  <msebor@redhat.com>

	PR c++/69251
	PR c++/69253
	PR c++/69290
	PR c++/69277
	PR c++/69349
	* g++.dg/ext/flexarray-mangle-2.C: New test.
	* g++.dg/ext/flexarray-mangle.C: New test.
	* g++.dg/ext/flexarray-subst.C: New test.
	* g++.dg/ext/flexary11.C: New test.
	* g++.dg/ext/flexary12.C: New test.
	* g++.dg/ext/flexary13.C: New test.
	* g++.dg/ext/flexary14.C: New test.
	* g++.dg/other/dump-ada-spec-2.C: Adjust.

gcc/cp/ChangeLog:
2016-02-03  Martain Sebor  <msebor@redhat.com>

	PR c++/69251
	PR c++/69253
	PR c++/69290
	PR c++/69277
	PR c++/69349
	* class.c (walk_subobject_offsets): Avoid testing the upper bound
	of a flexible array member for equality to null.
	(find_flexarrays): Remove spurious whitespace introduced in r231665.
	(diagnose_flexarrays): Avoid checking the upper bound of arrays.
	(check_flexarrays): Same.
	* decl.c (compute_array_index_type): Avoid special case for flexible
	array members.
	(grokdeclarator): Avoid calling compute_array_index_type for flexible
	array members.
	* error.c (dump_type_suffix): Revert changes introduced in r231665
	and rendered unnecessary by the changes above.
	* pt.c (tsubst):  Same.
	* tree.c (build_ctor_subob_ref): Handle flexible array members.
	* typeck2.c (digest_init_r): Revert changes introduced in r231665.
	(process_init_constructor_array): Same.
	(process_init_constructor_record): Same.

From-SVN: r233126

	* gcc.target/i386/iamcu/test_passing_unions.c (check_union_passing6):
	Define only if CHECK_FLOAT128 is defined.
	(main): Properly initialize u5.

From-SVN: r233124

2016-02-03  Michael Meissner  <meissner@linux.vnet.ibm.com>
	    Vladimir Makarov  <vmakarov@redhat.com>

	PR target/69461
	* config/rs6000/rs6000.c (rs6000_legitimate_address_p): Fix thinko
	in validating fused toc addresses.


Co-Authored-By: Vladimir Makarov <vmakarov@redhat.com>

From-SVN: r233120

From-SVN: r233119

re PR c/69627 (Conditional jump or move depends on uninitialised value(s) in (anonymous namespace)::layout::get_state_at_point)

	PR c/69627
	* diagnostic-show-locus.c (layout::get_state_at_point): Don't read
	range->m_caret fields if range->m_show_caret_p is false.

	* gcc.dg/pr69627.c: New test.

From-SVN: r233114

re PR target/69644 (ICE with -O on __sync_bool_compare_and_swap with short in extract_insn, at recog.c:2286)

	PR target/69644
	* config/rs6000/rs6000.c (rs6000_expand_atomic_compare_and_swap):
	Force oldval into register if it does not satisfy reg_or_short_operand
	predicate.  Fix up formatting.

	* gcc.dg/pr69644.c: New test.

From-SVN: r233113

	* lib/compat.exp (compat-get-options-main): Add dg-timeout-factor
	support for struct-layout-1.exp.

From-SVN: r233112

2016-02-03  Andreas Tobler  <andreast@gcc.gnu.org>

    PR bootstrap/69611
    * config/rs6000/sfp-machine.h: Guard __sfp_exceptions with
    __FLOAT128__ to compile only for __float128 capable targets.

From-SVN: r233111

    
    Reviewed-on: https://go-review.googlesource.com/19200

From-SVN: r233110

From-SVN: r233109

gcc/cp/ChangeLog:

	PR c++/69056
	* pt.c (try_one_overload): Handle comparing argument packs so
	that there is no conflict if we deduced more arguments of an
	argument pack than were explicitly specified.

gcc/testsuite/ChangeLog:

	PR c++/69056
	g++.dg/cpp0x/pr69056.C: New test.

From-SVN: r233108

2016-02-03  Vladimir Makarov  <vmakarov@redhat.com>
	    Alexandre Oliva  <aoliva@redhat.com>

	PR target/69461
	* lra-constraints.c (simplify_operand_subreg): Check additionally
	address validity after potential reloading.
	(process_address_1): Check insns validity.  In case of failure do
	nothing.

2016-02-03  Vladimir Makarov  <vmakarov@redhat.com>
	    Alexandre Oliva  <aoliva@redhat.com>

	PR target/69461
	* gcc.target/powerpc/pr69461.c: New.


Co-Authored-By: Alexandre Oliva <aoliva@redhat.com>

From-SVN: r233107

	* lib/tsan-dg.exp (tsan_init): Move check if tsan executable
	works from here ...
	(check_effective_target_fsanitize_thread): ... to here.  Do not
	specify additional compile flags for the test source.
	* lib/asan-dg.exp (check_effective_target_fsanitize_address): Do not
	specify additional compile flags for the test source.

From-SVN: r233106

PR target/69118

gcc/
	* config/i386/sse.md (define_insn "avx512f_maskcmp<mode>3"):
	Fix target.

From-SVN: r233103

Fix the ccmp_1.c test back to use '0' as regular expressions don't work
correctly. '0' is right due to compare with zero now printing as
'CMP w0, 0' rather than 'CMP w0, wzr'.

2016-02-03  Wilco Dijkstra  <wdijkstr@arm.com>

gcc/testsuite/
	* gcc.target/aarch64/ccmp_1.c: Fix test issue.

From-SVN: r233102

gcc/testsuite/ChangeLog:

2016-02-03  Andre Vehreschild  <vehre@gcc.gnu.org>

	PR fortran/67451
	PR fortran/69418
	* gfortran.dg/coarray_allocate_2.f08: New test.
	* gfortran.dg/coarray_allocate_3.f08: New test.
	* gfortran.dg/coarray_allocate_4.f08: New test.


gcc/fortran/ChangeLog:

2016-02-03  Andre Vehreschild  <vehre@gcc.gnu.org>

	PR fortran/67451
	PR fortran/69418
	* trans-expr.c (gfc_copy_class_to_class): For coarrays just the
	pointer is passed.  Take it as is without trying to deref the
	_data component.
	* trans-stmt.c (gfc_trans_allocate): Take care of coarrays as
	argument to source=-expression.

From-SVN: r233101

	* gcc.dg/vect/vect-outer-1-big-array.c: Drop vect_multiple_sizes;
	use same scan-tree-dump-times on all platforms.
	* gcc.dg/vect/vect-outer-1.c: Likewise.
	* gcc.dg/vect/vect-outer-1a-big-array.c: Likewise.
	* gcc.dg/vect/vect-outer-1a.c: Likewise.
	* gcc.dg/vect/vect-outer-1b-big-array.c: Likewise.
	* gcc.dg/vect/vect-outer-1b.c: Likewise.
	* gcc.dg/vect/vect-outer-2b.c: Likewise.
	* gcc.dg/vect/vect-outer-3b.c: Likewise.
	* gcc.dg/vect/vect-reduc-dot-s8b.c: Likewise.

From-SVN: r233100

    
    This fixes the long-standing bug in which the testing package misreports
    the file/line of an error.
    
    Reviewed-on: https://go-review.googlesource.com/19179

From-SVN: r233098

    
    Reviewed-on: https://go-review.googlesource.com/19177

From-SVN: r233097

From-SVN: r233096

vector-compare-4.c

This testcase fails on 32-bit powerpc-linux with

Excess errors:
/home/segher/src/gcc/gcc/testsuite/c-c++-common/vector-compare-4.c:31:1: warning: GCC vector returned by reference: non-standard ABI extension with no compatibility guarantee

Fix this as in vector-compare-2.c .


testsuite/
	* c-c++-common/vector-compare-4.c: Prune "non-standard ABI extension"
	warning.

From-SVN: r233093

	* wide-int.cc (canonize_uhwi): New function.
	(wi::divmod_internal): Use it.

From-SVN: r233092