re PR target/69644 (ICE with -O on __sync_bool_compare_and_swap with short in…

re PR target/69644 (ICE with -O on __sync_bool_compare_and_swap with short in extract_insn, at recog.c:2286)

	PR target/69644
	* config/rs6000/rs6000.c (rs6000_expand_atomic_compare_and_swap):
	Force oldval into register if it does not satisfy reg_or_short_operand
	predicate.  Fix up formatting.

	* gcc.dg/pr69644.c: New test.

From-SVN: r233113

gcc/ChangeLog

+2016-02-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/69644
+	* config/rs6000/rs6000.c (rs6000_expand_atomic_compare_and_swap):
+	Force oldval into register if it does not satisfy reg_or_short_operand
+	predicate.  Fix up formatting.
+
 2016-02-03  Vladimir Makarov  <vmakarov@redhat.com>
 	    Alexandre Oliva  <aoliva@redhat.com>
 

gcc/config/rs6000/rs6000.c

@@ -22275,6 +22275,9 @@ rs6000_expand_atomic_compare_and_swap (rtx operands[])
   else if (reg_overlap_mentioned_p (retval, oldval))
     oldval = copy_to_reg (oldval);
 
+  if (mode != TImode && !reg_or_short_operand (oldval, mode))
+    oldval = copy_to_mode_reg (mode, oldval);
+
   mem = rs6000_pre_atomic_barrier (mem, mod_s);
 
   label1 = NULL_RTX;
@@ -22289,10 +22292,8 @@ rs6000_expand_atomic_compare_and_swap (rtx operands[])
 
   x = retval;
   if (mask)
-    {
-      x = expand_simple_binop (SImode, AND, retval, mask,
-			       NULL_RTX, 1, OPTAB_LIB_WIDEN);
-    }
+    x = expand_simple_binop (SImode, AND, retval, mask,
+			     NULL_RTX, 1, OPTAB_LIB_WIDEN);
 
   cond = gen_reg_rtx (CCmode);
   /* If we have TImode, synthesize a comparison.  */

gcc/testsuite/ChangeLog

+2016-02-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/69644
+	* gcc.dg/pr69644.c: New test.
+
 2016-02-03  Mike Stump  <mikestump@comcast.net>
 
 	* lib/compat.exp (compat-get-options-main): Add dg-timeout-factor

gcc/testsuite/gcc.dg/pr69644.c

+/* PR target/69644 */
+/* { dg-do compile } */
+
+int
+main ()
+{
+  unsigned short x = 0x8000;
+  if (!__sync_bool_compare_and_swap (&x, 0x8000, 0) || x)
+    __builtin_abort ();
+  return 0;
+}