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riscv-gcc-1
Commit eb74cda0 by Uros Bizjak
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* ChangeLog: Remove duplicate entry. 

From-SVN: r235591
parent 4d03dc2f
Showing with 0 additions and 6 deletions
gcc/ChangeLog
......@@ -381,12 +381,6 @@
2016-04-27 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.c (ix86_spill_class): Enable for TARGET_SSE2 when
inter-unit moves to/from vector registers are enabled. Do not disable
for TARGET_MMX.
2016-04-27 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md
(lea arith with mem operand + setcc peephole2): Set operator mode.
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