arc.h (SYMBOL_FLAG_CMEM): Define.

2016-04-28  Joern Rennecke  <joern.rennecke@embecosm.com>
            Andrew Burgess  <andrew.burgess@embecosm.com>
gcc:
        * config/arc/arc.h (SYMBOL_FLAG_CMEM): Define.
        (TARGET_NPS_CMEM_DEFAULT): Provide default definition.
        * config/arc/arc.c (arc_address_cost): Return 0 for cmem_address.
        (arc_encode_section_info): Set SYMBOL_FLAG_CMEM where indicated.
        * config/arc/arc.opt (mcmem): New option.
        * config/arc/arc.md (*extendqihi2_i): Add r/Uex alternative,
        supply length for r/m alternative.
        (*extendqisi2_ac): Likewise.
        (*extendhisi2_i): Add r/Uex alternative, supply length for r/m and
        r/Uex alternative.
        (movqi_insn): Add r/Ucm and Ucm/?Rac alternatives.
        (movhi_insn): Likewise.
        (movsi_insn): Add r/Ucm,Ucm/w alternatives.
        (*zero_extendqihi2_i): Add r/Ucm alternative.
        (*zero_extendqisi2_ac): Likewise.
        (*zero_extendhisi2_i): Likewise.
        * config/arc/constraints.md (Uex): New memory constraint.
        (Ucm): New define_constraint.
        * config/arc/predicates.md (long_immediate_loadstore_operand):
        Return 0 for MEM with cmem_address address.
        (cmem_address_0): New predicates.
        (cmem_address_1): Likewise.
        (cmem_address_2): Likewise.
        (cmem_address): Likewise.
gcc/testsuite:
        * gcc.target/arc/cmem-1.c: New file.
        * gcc.target/arc/cmem-2.c: New file.
        * gcc.target/arc/cmem-3.c: New file.
        * gcc.target/arc/cmem-4.c: New file.
        * gcc.target/arc/cmem-5.c: New file.
        * gcc.target/arc/cmem-6.c: New file.
        * gcc.target/arc/cmem-7.c: New file.
        * gcc.target/arc/cmem-ld.inc: New file.
        * gcc.target/arc/cmem-st.inc: New file.

Co-Authored-By: Andrew Burgess <andrew.burgess@embecosm.com>

From-SVN: r235590

gcc/ChangeLog

+2016-04-28  Joern Rennecke  <joern.rennecke@embecosm.com>
+	    Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/arc/arc.h (SYMBOL_FLAG_CMEM): Define.
+	(TARGET_NPS_CMEM_DEFAULT): Provide default definition.
+	* config/arc/arc.c (arc_address_cost): Return 0 for cmem_address.
+	(arc_encode_section_info): Set SYMBOL_FLAG_CMEM where indicated.
+	* config/arc/arc.opt (mcmem): New option.
+	* config/arc/arc.md (*extendqihi2_i): Add r/Uex alternative,
+	supply length for r/m alternative.
+	(*extendqisi2_ac): Likewise.
+	(*extendhisi2_i): Add r/Uex alternative, supply length for r/m and
+	r/Uex alternative.
+	(movqi_insn): Add r/Ucm and Ucm/?Rac alternatives.
+	(movhi_insn): Likewise.
+	(movsi_insn): Add r/Ucm,Ucm/w alternatives.
+	(*zero_extendqihi2_i): Add r/Ucm alternative.
+	(*zero_extendqisi2_ac): Likewise.
+	(*zero_extendhisi2_i): Likewise.
+	* config/arc/constraints.md (Uex): New memory constraint.
+	(Ucm): New define_constraint.
+	* config/arc/predicates.md (long_immediate_loadstore_operand):
+	Return 0 for MEM with cmem_address address.
+	(cmem_address_0): New predicates.
+	(cmem_address_1): Likewise.
+	(cmem_address_2): Likewise.
+	(cmem_address): Likewise.
+
 2016-04-28  Segher Boessenkool  <segher@kernel.crashing.org>
 
 	* config/rs6000/rs6000.c (machine_function): Rename
 	insn_chain_scanned_p to spe_insn_chain_scanned_p.
 	(rs6000_stack_info): Adjust.
 
-2016-04-28  Andrew Burgess  <andrew.burgess@embecosm.com>
+2016-04-28  Joern Rennecke  <joern.rennecke@embecosm.com>
+	    Andrew Burgess  <andrew.burgess@embecosm.com>
 
 	* config/arc/constraints.md (Usd): Convert to define_constraint.
 	(Us<): Likewise.

gcc/config/arc/arc.c

@@ -1843,6 +1843,8 @@ arc_address_cost (rtx addr, machine_mode, addr_space_t, bool speed)
     case LABEL_REF :
     case SYMBOL_REF :
     case CONST :
+      if (TARGET_NPS_CMEM && cmem_address (addr, SImode))
+	return 0;
       /* Most likely needs a LIMM.  */
       return COSTS_N_INSNS (1);
 
@@ -4337,6 +4339,24 @@ arc_encode_section_info (tree decl, rtx rtl, int first)
 
       SYMBOL_REF_FLAGS (symbol) = flags;
     }
+  else if (TREE_CODE (decl) == VAR_DECL)
+    {
+      rtx symbol = XEXP (rtl, 0);
+
+      tree attr = (TREE_TYPE (decl) != error_mark_node
+		   ? DECL_ATTRIBUTES (decl) : NULL_TREE);
+
+      tree sec_attr = lookup_attribute ("section", attr);
+      if (sec_attr)
+	{
+	  const char *sec_name
+	    = TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (sec_attr)));
+	  if (strcmp (sec_name, ".cmem") == 0
+	      || strcmp (sec_name, ".cmem_shared") == 0
+	      || strcmp (sec_name, ".cmem_private") == 0)
+	    SYMBOL_REF_FLAGS (symbol) |= SYMBOL_FLAG_CMEM;
+	}
+    }
 }
 
 /* This is how to output a definition of an internal numbered label where

gcc/config/arc/arc.h

@@ -37,6 +37,7 @@ along with GCC; see the file COPYING3.  If not see
 #define SYMBOL_FLAG_SHORT_CALL	(SYMBOL_FLAG_MACH_DEP << 0)
 #define SYMBOL_FLAG_MEDIUM_CALL	(SYMBOL_FLAG_MACH_DEP << 1)
 #define SYMBOL_FLAG_LONG_CALL	(SYMBOL_FLAG_MACH_DEP << 2)
+#define SYMBOL_FLAG_CMEM	(SYMBOL_FLAG_MACH_DEP << 3)
 
 /* Check if this symbol has a long_call attribute in its declaration */
 #define SYMBOL_REF_LONG_CALL_P(X)	\
@@ -321,6 +322,14 @@ along with GCC; see the file COPYING3.  If not see
 #define MULTILIB_DEFAULTS { "mARC700" }
 #endif
 
+#ifndef UNALIGNED_ACCESS_DEFAULT
+#define UNALIGNED_ACCESS_DEFAULT 0
+#endif
+
+#ifndef TARGET_NPS_CMEM_DEFAULT
+#define TARGET_NPS_CMEM_DEFAULT 0
+#endif
+
 /* Target machine storage layout.  */
 
 /* We want zero_extract to mean the same

gcc/config/arc/arc.opt

@@ -469,3 +469,11 @@ Specify thread pointer register number
 
 mtp-regno=none
 Target RejectNegative Var(arc_tp_regno,-1)
+
+mcmem
+Target Report Var(TARGET_NPS_CMEM) Init(TARGET_NPS_CMEM_DEFAULT)
+Enable use of NPS400 xld/xst extension.
+
+munaligned-access
+Target Report Var(unaligned_access) Init(UNALIGNED_ACCESS_DEFAULT)
+Enable unaligned word and halfword accesses to packed data.

gcc/config/arc/constraints.md

@@ -269,6 +269,13 @@
   (and (match_code "mem")
        (match_test "compact_store_memory_operand (op, VOIDmode)")))
 
+(define_memory_constraint "Uex"
+  "@internal
+   A valid memory operand for limm-free extend instructions"
+  (and (match_code "mem")
+       (match_test "!cmem_address (XEXP (op, 0), SImode)")
+       (not (match_operand 0 "long_immediate_loadstore_operand"))))
+
 ; Don't use define_memory_constraint here as the relocation patching
 ; for small data symbols only works within a ld/st instruction and
 ; define_memory_constraint may result in the address being calculated
@@ -303,6 +310,12 @@
        (match_test "REG_P (XEXP (XEXP (op, 0), 0))")
        (match_test "REGNO (XEXP (XEXP (op, 0), 0)) == SP_REG")))
 
+(define_constraint "Ucm"
+  "@internal
+  cmem access"
+  (and (match_code "mem")
+       (match_test "TARGET_NPS_CMEM && cmem_address (XEXP (op, 0), VOIDmode)")))
+
 ;; General constraints
 
 (define_constraint "Cbr"
@@ -430,4 +443,3 @@
 (define_memory_constraint "ATO"
   "A memory with only a base register"
   (match_operand 0 "mem_noofs_operand"))
-

gcc/config/arc/predicates.md

@@ -123,6 +123,8 @@
   int size = GET_MODE_SIZE (GET_MODE (op));
 
   op = XEXP (op, 0);
+  if (TARGET_NPS_CMEM && cmem_address (op, SImode))
+    return 0;
   switch (GET_CODE (op))
     {
     case SYMBOL_REF :
@@ -819,3 +821,20 @@
 (define_predicate "double_register_operand"
   (ior (match_test "even_register_operand (op, mode)")
        (match_test "arc_double_register_operand (op, mode)")))
+
+(define_predicate "cmem_address_0"
+  (and (match_code "symbol_ref")
+       (match_test "SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_CMEM")))
+
+(define_predicate "cmem_address_1"
+  (and (match_code "plus")
+       (match_test "cmem_address_0 (XEXP (op, 0), SImode)")))
+
+(define_predicate "cmem_address_2"
+  (and (match_code "const")
+       (match_test "cmem_address_1 (XEXP (op, 0), SImode)")))
+
+(define_predicate "cmem_address"
+  (ior (match_operand:SI 0 "cmem_address_0")
+       (match_operand:SI 0 "cmem_address_1")
+       (match_operand:SI 0 "cmem_address_2")))

gcc/testsuite/ChangeLog

+2016-04-28  Joern Rennecke  <joern.rennecke@embecosm.com>
+	    Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* gcc.target/arc/cmem-1.c: New file.
+	* gcc.target/arc/cmem-2.c: New file.
+	* gcc.target/arc/cmem-3.c: New file.
+	* gcc.target/arc/cmem-4.c: New file.
+	* gcc.target/arc/cmem-5.c: New file.
+	* gcc.target/arc/cmem-6.c: New file.
+	* gcc.target/arc/cmem-7.c: New file.
+	* gcc.target/arc/cmem-ld.inc: New file.
+	* gcc.target/arc/cmem-st.inc: New file.
+
 2016-04-28  Jakub Jelinek  <jakub@redhat.com>
 
 	PR target/70821

gcc/testsuite/gcc.target/arc/cmem-1.c

+/* { dg-do compile } */
+/* { dg-options "-mcpu=nps400 -mcmem" } */
+
+#define CMEM_SECTION_ATTR __attribute__ ((section (".cmem")));
+
+#include "cmem-st.inc"
+
+/* { dg-final { scan-assembler "xst " } } */
+/* { dg-final { scan-assembler "xstw " } } */
+/* { dg-final { scan-assembler "xstb " } } */

gcc/testsuite/gcc.target/arc/cmem-2.c

+/* { dg-do compile } */
+/* { dg-options "-mcpu=nps400 -mcmem" } */
+
+#define CMEM_SECTION_ATTR __attribute__ ((section (".cmem")));
+
+#include "cmem-ld.inc"
+
+/* { dg-final { scan-assembler "xld " } } */
+/* { dg-final { scan-assembler "xldw " } } */
+/* { dg-final { scan-assembler "xldb " } } */

gcc/testsuite/gcc.target/arc/cmem-3.c

+/* { dg-do compile } */
+/* { dg-options "-mcpu=nps400 -mcmem" } */
+
+#define CMEM_SECTION_ATTR __attribute__ ((section (".cmem_private")));
+
+#include "cmem-st.inc"
+
+/* { dg-final { scan-assembler "xst " } } */
+/* { dg-final { scan-assembler "xstw " } } */
+/* { dg-final { scan-assembler "xstb " } } */

gcc/testsuite/gcc.target/arc/cmem-4.c

+/* { dg-do compile } */
+/* { dg-options "-mcpu=nps400 -mcmem" } */
+
+#define CMEM_SECTION_ATTR __attribute__ ((section (".cmem_private")));
+
+#include "cmem-ld.inc"
+
+/* { dg-final { scan-assembler "xld " } } */
+/* { dg-final { scan-assembler "xldw " } } */
+/* { dg-final { scan-assembler "xldb " } } */

gcc/testsuite/gcc.target/arc/cmem-5.c

+/* { dg-do compile } */
+/* { dg-options "-mcpu=nps400 -mcmem" } */
+
+#define CMEM_SECTION_ATTR __attribute__ ((section (".cmem_shared")));
+
+#include "cmem-st.inc"
+
+/* { dg-final { scan-assembler "xst " } } */
+/* { dg-final { scan-assembler "xstw " } } */
+/* { dg-final { scan-assembler "xstb " } } */

gcc/testsuite/gcc.target/arc/cmem-6.c

+/* { dg-do compile } */
+/* { dg-options "-mcpu=nps400 -mcmem" } */
+
+#define CMEM_SECTION_ATTR __attribute__ ((section (".cmem_shared")));
+
+#include "cmem-ld.inc"
+
+/* { dg-final { scan-assembler "xld " } } */
+/* { dg-final { scan-assembler "xldw " } } */
+/* { dg-final { scan-assembler "xldb " } } */

gcc/testsuite/gcc.target/arc/cmem-7.c

+/* { dg-do compile } */
+/* { dg-options "-mcpu=nps400 -mcmem" } */
+
+struct some_struct
+{
+  unsigned char a;
+};
+
+unsigned char other_func (unsigned char);
+
+unsigned char
+some_function ()
+{
+  static struct some_struct ss __attribute__ ((section (".cmem")));
+  static struct some_struct tt;
+
+  ss.a = other_func (ss.a);
+  tt.a = other_func (tt.a);
+
+  return 0;
+}
+
+/* { dg-final { scan-assembler "xldb \[^\n\]*@ss" } } */
+/* { dg-final { scan-assembler "xstb \[^\n\]*@ss" } } */
+/* { dg-final { scan-assembler-not "xldb \[^\n\]*@tt" } } */
+/* { dg-final { scan-assembler-not "xstb \[^\n\]*@tt" } } */

gcc/testsuite/gcc.target/arc/cmem-ld.inc

+
+struct foo_type
+{
+  unsigned int a;
+  unsigned short b;
+  unsigned char c;
+};
+
+struct foo_type foo __attribute__ ((section (".cmem")));
+
+unsigned int
+f ()
+{
+  unsigned int tmp = foo.a + foo.b + foo.c;
+  return tmp;
+}

gcc/testsuite/gcc.target/arc/cmem-st.inc

+
+struct foo_type
+{
+  unsigned int a;
+  unsigned short b;
+  unsigned char c;
+};
+
+struct foo_type foo CMEM_SECTION_ATTR
+
+int
+f ()
+{
+  foo.a = 3;
+  foo.b = 2;
+  foo.c = 1;
+  return 0;
+}