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riscv-gcc-1
Commit e9aff0f6 by Joern Rennecke
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Adjust last change to plus_constant change. 

From-SVN: r193895
parent 0ccfc3ab
Showing with 2 additions and 2 deletions
gcc/config/epiphany/predicates.md
...@@ -165,7 +165,7 @@ ...@@ -165,7 +165,7 @@
(match_code "reg,subreg,mem,const_int,const_double,const_vector") (match_code "reg,subreg,mem,const_int,const_double,const_vector")
{ {
if (GET_CODE (op) == MEM && misaligned_operand (op, mode) if (GET_CODE (op) == MEM && misaligned_operand (op, mode)
&& !address_operand (plus_constant (XEXP (op, 0), 4), SImode)) && !address_operand (plus_constant (Pmode, XEXP (op, 0), 4), SImode))
return 0; return 0;
return general_operand (op, mode); return general_operand (op, mode);
}) })
...@@ -192,7 +192,7 @@ ...@@ -192,7 +192,7 @@
} }
case MEM : case MEM :
if (GET_MODE_SIZE (mode) == 8 && misaligned_operand (op, mode) if (GET_MODE_SIZE (mode) == 8 && misaligned_operand (op, mode)
&& !address_operand (plus_constant (XEXP (op, 0), 4), SImode)) && !address_operand (plus_constant (Pmode, XEXP (op, 0), 4), SImode))
return 0; return 0;
return address_operand (XEXP (op, 0), mode); return address_operand (XEXP (op, 0), mode);
default : default :
......
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